A new RTD-FET logic family

We describe a new family of clocked logic gates based on the resonant-tunneling diode (RTD). Pairs of RTDs form storage latches, and these are connected by networks consisting of field-effect transistors (FETs), saturated resistors, and RTDs. The design, operation, and expected performance of both a shift register and a matched filter using this logic are discussed. Simulations show that the RTD circuits can achieve higher performance in terms of speed and power in many signal processing applications. Compared to circuits using III-V FETs alone, the RTD circuits are expected to run nearly twice as fast at the same power or at the same speed with reduced power. Compared to circuits using Lincoln Laboratory's fully depleted silicon-on-insulator CMOS, implementation using state-of-the-art RTDs should operate five times faster when both technologies follow the CMOS design rules     

Antimonide-based compound semiconductors for electronic devices: A review

Several research groups have been actively pursuing antimonide-based electronic devices in recent years. The advantage of narrow-bandgap Sb-based devices over conventional GaAs- or InP-based devices is the attainment of high-frequency operation with much lower power consumption. This paper will review the progress on three antimonide-based electronic devices: high electron mobility transistors (HEMTs), resonant tunneling diodes (RTDs), and heterojunction bipolar transistors (HBTs). Progress on the HEMT includes the demonstration of Ka- and W-band low-noise amplifier circuits that operate at less than one-third the power of similar InP-based circuits. The RTDs exhibit excellent figures of merit but, like their InP- and GaAs-based counterparts, are waiting for a viable commercial application. Several approaches are being investigated for HBTs, with circuits reported using InAs and InGaAs bases.     

High-speed and low-power operation of a resonant tunneling logicgate MOBILE

High-speed operations up to 35 Gb/s were demonstrated for a resonant tunneling (RT) logic gate monostable-bistable transition logic element (MOBILE). The test circuit consisted of a MOBILE and a DCFL-type output buffer, and it was fabricated using InP-based resonant tunneling diode/HEMT integration technology. This operation bit rate is close to the cutoff frequency of the 0.7-μm gate HEMTs used in the circuit, and was obtained after improvement of the output buffer design. This result indicates the high-speed potential of the MOBILE, though the speed is still limited by the buffer. The power dissipation of the MOBILE was also discussed based on a simple equivalent circuit model of RTDs. This revealed that the power dissipation is as small as 2 mW/gate over a wide range of operation bit rates     

RTD多值逻辑(MVL)电路

RTD具有双稳和自锁特性,用RTD构成电路可节省大量器件,这一优点在构建多值逻辑电路(MVL RTD)时显得尤为突出。在引用"遏止"概念的基础上介绍了几种典型的MVL RTD电路,包括多幅输入脉冲信号具有选幅功能的文字逻辑门、能提供三个不同电平输出的三态反相器、将一输入斜坡电压信号变成脉冲输出信号的折线量化器等电路;用"遏止"概念分析了异或门电路的工作原理。     

Influence of the Source–Gate Distance on the AlGaN/GaN HEMT Performance

In this paper, we present Monte Carlo simulation results on the source-gate (S-G) scaling effects in GaN-based HEMTs. The results show that a downscaling of the S-G distance can improve device performance, enhancing the output current and the device transconductance. The main reason for this effect is related to the peculiar dynamic of electrons in the GaN-based HEMTs, which leads to a nonsaturated velocity regime in the source access region, even for high drain applied voltages. On the contrary, the gate-drain distance does not affect the output current within the analyzed device geometries. Based on these results, new optimization strategies for GaN HEMTs could be defined     

QMOS digital logic circuit design

This paper presents results of work to explore the feasibility of using resonant tunnelling diodes (RTDs) and conventional MOSFETs for the development of digital logic circuits. Based on the use of RTDs and MOSFETs, two different logic design styles—fixed pull-down and fixed pull-up—are proposed and evaluated. Fixed pull-up gates perform better than their CMOS counterparts with similar device sizes. Since the proposed fixed pull-down style avoids the use of series MOSFETs, for large fan-in gates it yields significantly better performance than the corresponding CMOS gates.     

Optoelectronic materials and devices

The development of epitaxial growth techniques, such as molecular beam epitaxy and metal-organic vapour phase epitaxy, allows us to control the growth of individual semiconductor layers on an atomic scale. These achievements provide a strong basis for fabricating new forms of active device with ‘tailor made’ characteristics. Novel electronic devices have been proposed and demonstrated in various fields. These include HBTs, HEMTs and RTDs. As well as these devices there has been enormous development in photonic and optoelectronic devices.     

一种基于RTD和HEMT的单片集成逻辑电路

介绍了一种基于共振隧穿二极管(RTD)和高电子迁移率晶体管(HEMT)的单片集成电路.采用分子束外延技术在GaAs底层上重叠生长了RTD和HEMT结构.RTD室温下的峰谷电流比为5.2∶1,峰值电流密度为22.5kA/cm2.HEMT采用1μm栅长,阈值电压为-1V.设计电路称为单稳态-双稳态转换逻辑单元(MOBILE).实验结果显示了该电路逻辑运行成功,运行频率可达2GHz以上.     

Design of a DTCTGAL circuit and its application

By research on the switch-signal theory for multiple-valued logic circuits, the theory of three essential elements and the principle of adiabatic circuits, a design scheme for a double power clock ternary clocked transmission gate adiabatic logic (DTCTGAL) circuit is presented. The energy injection and recovery can be conducted by the bootstrapped NMOSFET, which makes the circuit maintain the characteristics of energy recovery as well as multiple-valued input and output. An XOR/XNOR circuit based on DTCTGAL is also presented using this design scheme. Finally, using the parameters of a TSMC 0.25 μm CMOS device, PSPICE simulation results indicate that the proposed circuits have correct logic and significant low power characteristics.     

Operation Limits for RTD-Based MOBILE Circuits

Resonant-tunneling-diode (RTD)-based MOnostable–BIstable Logic Element (MOBILE) circuits operate properly in a certain frequency range. They exhibit both a minimum operating frequency and a maximum one. From a design point of view, it should be desirable to have gates with a correct operation from dc up to the maximum operating frequency (i.e., without the minimum bound). This paper undertakes this problem by analyzing how transistors and RTDs interact in RTD-based circuits. Two malfunctions have been identified: the incorrect evaluation of inputs and the lack of self-latching operation. The difficulty to study these problems in an analytical way has been overcome by resorting to series expansions for both the RTD and the heterojunction field-effect transistor $I$–$V$ characteristics in the points of interest. We have obtained analytical expression linking representative device parameters and technological setup, for a MOBILE-based circuit to operate correctly.      

Monolithic integrated resonant tunneling diode and heterostructure junction field effect transistor circuits

We have developed a simple technology for monolithic integration of resonant tunneling diodes (RTDs) and heterostructure junction-modulated field effect transistors (HJFETs). We have achieved good device performance with this technology: HJFETs had transconductances of 290 mS/mm and current densities of 310 mA/mm for a 1.5 μm gate length; RTDs had room temperature peak to valley ratios greater than 20:1 with current densities of 42 kA/cm². With this technology, we have demonstrated a monolithically integrated RTD + HJFET state holding circuit that can serve as a building block circuit for self-timed logic units. This circuit is resistor-free and operates at room temperature. The state holding circuit showed large noise margins of 1.21 V and 0.71 V, respectively, for input low and input high, for a 1.7 V input voltage swing. We have examined the transient response of the circuit and investigated the effect of circuit design parameters on propagation delay. We identify the RTD valley current as the limiting factor on propagation delay. We discuss the suitability of RTD + HJFET circuits such as our state holding circuit for highly dense integrated circuits.     

Logic Suitability of 50-nm In0.7 Ga0.3As HEMTs for Beyond-CMOS Applications

We have experimentally studied the suitability of nanometer-scale In_0.7Ga_0.3As high-electron mobility transistors (HEMTs) as an n-channel device for a future high-speed and low-power logic technology for beyond-CMOS applications. To this end, we have fabricated 50- to 150-nm gate-length In_0.7Ga_0.3As HEMTs with different gate stack designs. This has allowed us to investigate the role of Schottky barrier height (Phi_B) and insulator thickness (t_ins) on the logic characteristics of In_0.7Ga_0.3As HEMTs. The best 50-nm HEMTs with the highest Phi_B and the smallest t_ins exhibit an I_ON/I_OFF ratio in excess of 10⁴ and a subthreshold slope (S) below 86 mV/dec. These nonoptimized 50-nm In_0.7Ga_0.3As HEMTs also show a logic gate delay (CV/I) of around 1 ps at a supply voltage of 0.5 V, while maintaining an I_ON/I_OFF ratio above 10⁴, which is comparable to state-of-the-art Si MOSFETs. As one of the alternatives for beyond-CMOS technologies, we believe that InAs-rich InGaAs HEMTs hold a considerable promise.     

CMOS负阻单元逻辑电路及其发展前景

在回顾了多值逻辑(MVL)电路的优点、分析了共振隧穿器件(RTD)电路的特点和比较了各种类型负阻器件性能的基础上,提出了利用CMOS型负阻单元作为基础性器件设计并实现CMOS型逻辑电路的新概念,并指出了此研究领域的几个重点研究内容和方向。     

共振隧穿二极管研究进展

简要评述共振隧穿二极管（ＲＴＤ）器件研究进展。重点探讨以下问题：为什么ＲＴＤ研究经久不衰？器件理论模型达到何等水平？器件特性、结构和材料方面有哪些关键？围绕这些问题,介绍了有关基本概念,对ＲＴＤ器件物理模型和特性近来的研究成果和前景进行了分析,并提要性地和同类的其它量子器件作了比较。     

Simulation study of compact quantising circuits usingmultiple-resonant tunnelling transistors

The authors have applied a simple modelling approach for multiple resonant tunnelling transistors (mRTTs) which includes four resonant tunnelling diodes (RTDs) within the transistor structure. Unique features of this model, corresponding to device features compatible for integrated circuits, allow far tuning and matching the devices for optimum circuit performance. Two circuits are presented for analogue to quaternary conversion with analysis of their transfer characteristics; this analysis is consistent with the simulation results and implies that circuits of physical devices may be successfully implemented     

F等离子体处理增强型及耗尽型AlGaN/GaN HEMT集成SRAM单元电路和电平转换电路

我们设计并且制备了GaN基增强型/耗尽型（E/D 模）直接耦合6管静态随机存取存储器（SRAM）单元电路和电平转换电路。利用氟等离子处理工艺,使用适中的AlGaN势垒层厚度异质结材料,增强型和耗尽型铝镓氮/氮化镓 HEMTs被集成在了同一个晶片上。六管SRAM单元由对称的两个E/D模反相器和增强型开关管组成。在1V的工作电压下,SRAM单元电路的输出高电平和低电平分别为0.95V和0.07V。电平转换电路的工作电压为+6V和-6V,通过4个串联的镍-铝镓氮/氮化镓肖特基二极管使电压降低。通过轮流控制电平转换电路的两个反相器模块的开关状态,电平转换电路输出两路电压,分别为-0.5V和-5V。电平转换器的翻转电压为0.76V。SRAM单元电路和电平转换电路都能正确地工作,展现了氮化镓基E/D模数字和模拟集成电路的潜力。提出了几条设计上的考虑,以避免阈值电压的漂移对电路工作造成的影响。     

改进型三值RTD量化器的设计

共振隧穿二极管RTD本身所特有的负阻微分特性使其成为天然的多值器件。介绍了三值RTD和三值RTD+HEMT的伏安特性以及三值RTD量化器和开关序列的工作原理,以RTD开关序列模型为指导思想设计出改进型三值RTD量化器电路,比原电路结构简单,仿真结果验证了设计的正确性。该设计方法不仅可以用于实现更简单和更灵活的三值RTD量化器,还能用于更高值的多值RTD逻辑电路的设计中。     

Neuron firing operations by a new basic logic element

This paper proposes a new basic logic element for neural logic applications and demonstrates the function of neuron firing. A key device for the logic operation is the insulated-gate pn-junction device on an SOI substrate. The basic element offers an interface quite compatible to that of conventional CMOS circuits     

Small geometry depleted base bipolar transistors (BSIT)—VLSI devices?

An essential characteristic of devices which are viable candidates for VLSI circuits is that they must have electrical characteristics which can tolerate process variations. Conventional bipolar junction transistors (BJT) are well known to be limited by punchthrough when vertical basewidths axe decreased; these devices are, however, relatively tolerant of linewidth variations. The depleted base bipolar transistor represents a limiting case when the metallurgical basewidth is allowed to shrink to zero. Such devices, also called bipolar static induction transistors (BSIT), have been proposed as candidates for VLSI logic circuits. This paper describes the basic device physics of depleted base transistors and presents experimental verification of the theoretical modeling. The two essential conclusions that are drawn are that such devices can only achieve performance (in terms of transconductance) comparable to BJT's when an electrical p-type base exists (n-p-n device) and secondly, that BSIT's have characteristics which are extremely sensitive to process variations (linewidths, junction depths, and doping profiles). As a consequence, we conclude that while pure bipolar transistors may play an important role in VLSI circuits, depleted base structures such as the BSlT, are unlikely candidates for such applications.