首页 | 本学科首页   官方微博 | 高级检索  
相似文献
 共查询到20条相似文献,搜索用时 15 毫秒
1.
A new electromigration failure mechanism in flip-chip solder joints is reported. The solder joints failed by local melting of a PbSn eutectic solder. Local melting occurred due to a sequence of events induced by the microstructure changes in the flip-chip solder joint. The formation of a depression in the current-crowding region of a solder joint induced the local electrical resistance to increase. The rising local resistance resulted in a larger Joule heating, which, in turn, raised the local temperature. When the local temperature rose above the eutectic temperature of the PbSn solder, the solder joint melted and consequently failed. The results of this study suggest that a dynamic, coupled simulation that takes into account the microstructure evolution, current density distribution, and temperature distribution may be needed to fully solve this problem.  相似文献   

2.
SnPb-SnAgCu mixed solder joints with Sn-Pb soldering Sn-Ag-Cu Pb-free components are inevitably occurred in the high reliability applications. In this study, the interfacial behaviors in Sn-37Pb and Sn-3.0Ag-0.5Cu mixed solder joints was addressed and compared with Sn-37Pb solder joints and Sn-3.0Ag-0.5Cu solder joints with the influence from isothermal aging and electromigration. Considering the difference on the melting point between Sn-3.0Ag-0.5Cu and Sn-37Pb solder, two mixed solder joints: partial mixing and full mixing between Sn-Pb and Sn-Ag-Cu solders were reached with the peak reflowing temperature of 190 and 250 °C, respectively. During isothermal aging, the intermetallic compound (IMC) layer increased with aging time and its growth was diffusion controlled. There was also no obvious affect from the solder composition on IMC growth. After electromigration with the current density of 2.0 × 103 A/cm2, Sn-37Pb solder joints showed the shortest lifetime with the cracks observed at the cathode for the stressing time < 250 h. In Sn-3.0Ag-0.5Cu Pb-free solder joints, current stressing promoted the growth of IMC layer at the interfaces, but the growing rate of IMC at the anode interface was far faster than that at the cathode interface. Therefore, there existed an obvious polarity effect on IMC growth in Sn-Ag-Cu Pb-free solder joints. After Sn-37Pb was mixed with Sn-3.0Ag-0.5Cu Pb-free solder, whether the partial mixing or the full mixing between Sn-Pb and Sn-Ag-Cu can obviously depress both the crack formation at the cathode side and the IMC growth at the anode.  相似文献   

3.
The mechanical shear fatigue test has been performed to study the effect of silver content on the fatigue properties of Sn-xAg-0.5Cu (x=1, 2, 3, and 4) for flip-chip interconnections. The strength of the solder alloy increases with increasing silver content, preventing shear plastic deformation of the solder bump. The flip-chip joints made using higher silver content solder, such as 3%Ag and 4%Ag, exhibit longer fatigue life for all conditions. The fatigue ductility of the solder decreases with an increase in the silver content. The fatigue endurance of 1%Ag solder is superior to other solders over the plastic strain range of 3%, even though the strength of the solder is the lowest in the solders tested. Based on this study, the 3Ag solder may exhibit good fatigue performance for all conditions, and the 1Ag solder is optimum for severe strain conditions.  相似文献   

4.
Electromigration reliability of solder interconnects is dominated by current density and temperature inside the interconnects. For flip-chip packages, current densities around the regions where the traces connect a solder bump increase significantly due to the differences in feature sizes and electric resistivities between the solder bump and its adjacent traces. This current-crowding effect along with induced Joule heating accelerates electromigration failures. In this paper, the effects of current crowding and Joule heating in a flip-chip package are examined and quantified by three-dimensional electrothermal coupling analysis. We apply a volumetric averaging technique to cope with the current-crowding singularity. The volumetrically averaged current density and the maximum temperature in a solder bump are integrated into Black’s equation to calibrate the experimental electromigration fatigue lives. An erratum to this article is available at .  相似文献   

5.
The effect of Al-trace dimension on electromigration of flip-chip solder joints was investigated. The Al trace dimension was found to have a significant influence on the electromigration failure time. When joints with Al traces 100 μm wide were stressed by 1.0 A at 100°C, failure times were 35 h, 1,700 h, and >3,000 h for joints with Al traces that were 2,550 μm, 1,700 μm, and 850 μm long, respectively. Solder joints with Al traces 40 μm wide and 2,550 μm long failed instantly at 0.6 A. The Joule heating effect was found to be responsible for the huge difference in failure time.  相似文献   

6.
Two substrate surface finishes, Au/Ni and organic solderable preservative (OSP), were used to study the effect of the surface finish on the reliability of flip-chip solder joints under electromigration at 150°C ambient temperature. The solder used was eutectic PbSn, and the applied current density was 5×103 A/cm2 at the contact window of the chip. The under bump metallurgy (UBM) on the chip was sputtered Cu/Ni. It was found that the mean-time-to-failure (MTTF) of the OSP joints was six times better than that of the Au/Ni joints (3080 h vs. 500 h). Microstructure examinations uncovered that the combined effect of current crowding and the accompanying local Joule heating accelerated the local Ni UBM consumption near the point of electron entrance. Once Ni was depleted at a certain region, this region became nonconductive, and the flow of the electrons was diverted to the neighboring region. This neighboring region then became the place where electrons entered the joint, and the local Ni UBM consumption was accelerated. This process repeated itself, and the Ni-depleted region extended further on, creating an ever-larger nonconductive region. The solder joint eventually, failed when the nonconductive region became too large, making the effective current density very high. Accordingly, the key factor determining the MTTF was the Ni consumption rate. The joints with the OSP surface finish had a longer MTTF because Cu released from the substrate was able to reduce the Ni consumption rate.  相似文献   

7.
电迁移对Sn3.0Ag0.5Cu无铅焊点剪切强度的影响   总被引:1,自引:1,他引:0  
通过热风回流焊制备了Cu/Sn3.0Ag0.5Cu/Cu对接互连焊点,测试了未通电及6.5 A直流电下通电36 h和48 h后焊点的剪切强度.结果表明,电迁移显著地降低了焊点的剪切强度,电迁移36 h使剪切抗力降低约30%,电迁移48 h降低约50%.SEM观察断口和界面形貌表明,界面金属间化合物增厚使断裂由韧性向脆性...  相似文献   

8.
The reliability concern in flip-chip-on-board (FCOB) technology is the high thermal mismatch deformation between the silicon die and the printed circuit board that results in large solder joint stresses and strains causing fatigue failure. Accelerated thermal cycling (ATC) test is one of the reliability tests performed to evaluate the fatigue strength of the solder interconnects. Finite element analysis (FEA) was employed to simulate thermal cycling loading for solder joint reliability in electronic assemblies. This study investigates different methods of implementing thermal cycling analysis, namely using the "dwell creep" and "full creep" methods based on a phenomenological approach to modeling time independent plastic and time dependent creep deformations. There are significant differences between the "dwell creep" and "full creep" analysis results for the flip chip solder joint strain responses and the predicted fatigue life. Comparison was made with a rate dependent viscoplastic analysis approach. Investigations on thermal cycling analysis of the temperature range, (ΔT) effects on the predicted fatigue lives of solder joints are reported  相似文献   

9.
倒装焊复合SnPb焊点应变应力分析   总被引:2,自引:1,他引:1  
近年来,在微电子工业中,轻、薄、短、小是目前电子封装技术发展的趋势。因此,倒装焊技术应用越来越广,而焊点的可靠性在倒装焊技术中变得越来越重要。采用有限元软件,模拟、分析了焊点高度和下填料对焊点在热载荷作用下的应力应变值。  相似文献   

10.
The microstructural investigation and thermomechanical reliability evaluation of the Sn-3.0Ag-0.5Cu solder bumped flip-chip package were carried out during the thermal shock test of the package. In the initial reaction, the reaction product between the solder and Cu mini bump of chip side was Cu6Sn5 intermetallic compound (IMC) layer, while the two phases which were (Cu,Ni)6Sn5 and (Ni,Cu)3Sn4 were formed between the solder and electroless Ni-P layer of the package side. The cracks occurred at the corner solder joints after the thermal shocks of 400 cycles. The primary failure mechanism of the solder joints in this type of package was confirmed to be thermally-activated solder fatigue failure. The premature brittle interfacial failure sometimes occurred in the package side, but nearly all of the failed packages showed the occurrence of the typical fatigue cracks. The finite-element analyses were conducted to interpret the failure mechanisms of the packages, and revealed that the cracks were induced by the accumulation of the plastic work and viscoplastic shear strains.  相似文献   

11.
The anisotropy of lithium intercalation into the silicon anodes of Li-ion batteries is studied on microstructures having the form of a grid with 0.5-μm-thick vertical walls and on silicon wafers of varied orientation. Electrochemical lithiation is performed at room temperature in the galvanostatic mode. The charging curves of the microstructure and flat Si anodes are examined. Secondary-ion mass spectroscopy is used to determine the distribution of intercalated Li atoms across the wafer thickness. The experimental data are analyzed in terms of the two-phase model in which the lithiation process is limited by the propagation velocity of the front between the amorphous alloy with a high Li content and the crystalline Si substrate. The relationship between the rates of Li intercalation into different crystallographic planes: (110), (111), and (100), is found to be V110: V111: V100 = 3.1: 1.1: 1.0. It is demonstrated that microstructure anodes with (110) walls have the highest cycle life and withstand ~600 cycles when charged and discharged at a rate of 0.36 C.  相似文献   

12.
Sb掺杂对SnAgCu无铅焊点电迁移可靠性的影响   总被引:3,自引:1,他引:2  
向Sn3.8Ag0.7Cu无铅焊膏中添加质量分数为1%的Sb金属粉末,研究了其焊点在电流密度为0.34×104A/cm2、环境温度150℃下的电迁移行为。通电245h后,阴极处钎料基体与Cu6Sn5IMC之间出现一条平均宽度为16.9μm的裂纹,阳极界面出现凸起带,钎料基体内部也产生了裂纹。结果表明:1%Sb的添加使焊点形成了SnSb脆性相,在高电流密度和高温环境下产生裂纹,缩短了焊点寿命,降低了电迁移可靠性。  相似文献   

13.
The effects of minimal rare earth (RE) element additions on the microstructure of Sn-Ag-Cu solder joint, especially the intermetallic compounds (IMCs), were investigated. The range of RE content in Sn-Ag-Cu alloys varied from 0 wt.% to 0.25 wt.%. Experimental results showed that IMCs could be dramatically repressed with the appropriate addition of RE, resulting in a fine microstructure. However, there existed an effective range for the RE addition. The best RE content was found to be 0.1 wt.% in the current study. In addition to the typical morphology of Ag3Sn and Cu6Sn5 IMCs, other types of IMCs that have irregular morphology and uncertain constituents were also observed. The IMCs with large plate shape mainly contained Ag and Sn, but the content of Ag was much lower than that of Ag3Sn. The cross sections of Cu6Sn5 IMCs whiskers showed various morphologies. Furthermore, some eutectic-like structures, including lamellar-, rod-, and needle-like phases, were observed. The morphology of eutectic-like structure was related to the RE content in solder alloys. When the content of RE is 0.1 wt.%, the needle-like phase was dominant, while the lamellar structure prevailed when the RE content was 0.05 wt.% or 0.25 wt.%. It is suggested that the morphology change of the eutectic-like structure directly affects the creep properties of the solder joint.  相似文献   

14.
Pulsed DC Electromigration (EM) tests up to 1MHz have been performed on single level Al-0.5%Cu metallization. The results are in good agreement with an Average Current Model when the thermal heating effect has been corrected with an original thermal model. Thus, Median Time to Failure (MTF) increase in the MHz region also reported by some authors, appears as a thermal effect. Furthermore, SEM observations showed very large metal accumulations and hillocks which were not seen in DC experiments.  相似文献   

15.
The interfacial interaction between Cu substrates and Sn-3.5Ag-0.7Cu-xSb (x = 0, 0.2, 0.5, 0.8, 1.0, 1.5, and 2.0) solder alloys has been investigated under different isothermal aging temperatures of 100°C, 150°C, and 190°C. Scanning electron microscopy (SEM) was used to measure the thickness of the intermetallic compound (IMC) layer and observe the microstructural evolution of the solder joints. The IMC phases were identified by energy-dispersive x-ray spectroscopy (EDX) and x-ray diffractometry (XRD). The growth of both the Cu6Sn5 and Cu3Sn IMC layers at the interface between the Cu substrate and the solder fits a power-law relationship with the exponent ranging from 0.42 to 0.83, which suggests that the IMC growth is primarily controlled by diffusion but may also be influenced by interface reactions. The activation energies and interdiffusion coefficients of the IMC formation of seven solder alloys were determined. The addition of Sb has a strong influence on the growth of the Cu6Sn5 layer, but very little influence on the formation of the Cu3Sn IMC phase. The thickness of the Cu3Sn layer rapidly increases with aging time and temperature, whereas the thickness of the Cu6Sn5 layer increases slowly. This is probably due to the formation of Cu3Sn at the interface between two IMC phases, which occurs with consumption of Cu6Sn5. Adding antimony to Sn-3.5Ag-0.7Cu solder can evidently increase the activation energy of Cu6Sn5 IMC formation, reduce the atomic diffusion rate, and thus inhibit excessive growth of Cu6Sn5 IMCs. This study suggests that grain boundary pinning is one of the most important mechanisms for inhibiting the growth of Cu6Sn5 IMCs in such solder joints when Sb is added.  相似文献   

16.
To improve the reliability of Al thin-film lines in integrated circuits, the influence of local thermal dissipation on electromigration (EM) was investigated. By performing current stressing experiments on Al thin-film lines with a special design, the unique distribution of hillocks/voids around four representative zones was found. The underlying mechanism was explained by investigating the corresponding atomic flux divergence according to finite element analyses. Such unique distribution of hillocks/voids, differing from the general EM phenomenon with hillocks at anode and voids at cathode, indicates the influence of local thermal dissipation induced by the voltage-measuring pads. Moreover, by changing the position of the voltage-measuring pads in the Al thin-film line, it was found that when the position of local thermal dissipation is farther from the center of the line, the EM resistance is higher. This finding provides a valuable insight for improving the EM resistance of Al thin-film lines and therefore enhancing the reliability of the corresponding devices.  相似文献   

17.
为了研究电迁移过程中焊点与焊盘界面金属问化合物(IMC)的变化,在28℃下,对无铅Sn3.0Ag0.5Cu焊点进行了6.5A直流电下的电迁移实验.结果发现,通电144h后,阳极侧IMC层变厚,平均达到10.12 μm;阴极侧IMC层大部分区域变薄至0.86μm,局部出现Cu焊盘的溶解消失,但在界面边缘处出现Cu3Sn5...  相似文献   

18.
The work reported here included preliminary tests on the influence of an imposed current on the creep rate of the Pb-free solder Sn-Ag-Cu 305 (Sn-3Ag-0.5Cu in wt.%). The samples employed were double-shear specimens that contained paired solder joints, 400 μm × 400 μm in cross-section, 200 μm in thickness on Cu. Three tests were done. In the first, samples were tested under stress at room temperature with imposed current densities that ranged from 1 × 103 A/cm2 up to 6.5 × 103 A/cm2. As expected, because of Joule heating, the results show a sharp increase in creep rate with the imposed current density. A second set of tests was done to determine whether Joule heating fixed the creep rate. The steady-state temperature of the solder joints was measured under current, and samples were creep-tested at that temperature. Surprisingly, the creep rate under current was significantly below that measured in isothermal tests at the same temperature. The third set of tests studied the influence of microstructure. Samples were prepared with three starting microstructures: as cast, thermally aged by long-term isothermal exposure, and current aged by long-term exposure to a fixed current density. The three microstructures were then tested with and without current at two ambient temperatures. The different microstructures had very different creep rates in the absence of current but, surprisingly, imposing a current (5.5 × 103 A/cm2) increased the creep rate by very nearly the same factor (~7×) in every case. Neither of these results is well understood at this time.  相似文献   

19.
The shear strength behavior and microstructural effects after aging for 100 h and 1,000 h at 150°C are reported for near-eutectic Sn-Ag-Cu (SAC) solder joints (joining to Cu) made from Sn-3.5Ag (wt.%) and a set of SAC alloys (including Co- and Fe-modified SAC alloys). All joints in the as-soldered and 100-h aged condition experienced shear failure in a ductile manner by either uniform shear of the solder matrix (in the strongest solders) or by a more localized shear of the solder matrix adjacent to the Cu6Sn5 interfacial layer, consistent with other observations. After 1,000 h of aging, a level of embrittlement of the Cu3Sn/Cu interface can be detected in some solder joints made with all of the SAC alloys and with Sn-3.5Ag, which can lead to partial debonding during shear testing. However, only ductile failure was observed in all solder joints made from the Co- and Fe-modified SAC alloys after aging for 1,000 h. Thus, the strategy of modifying a strong (high Cu content) SAC solder alloy with a substitutional alloy addition for Cu seems to be effective for producing a solder joint that retains both strength and ductility for extended isothermal aging at high temperatures.  相似文献   

20.
The dependence of submicrometer-channel CMOS performance on surface orientation is measured for LDD devices at both 300 and 77 K. Special emphasis is placed on determining the optimum crystalline plane for CMOS operating at low temperatures (CRYO-CMOS). A comparison of transistor parameters is experimentally made between  相似文献   

设为首页 | 免责声明 | 关于勤云 | 加入收藏

Copyright©北京勤云科技发展有限公司  京ICP备09084417号