KOH各向异性腐蚀中预处理对硅表面粗糙度的影响

通过实验研究表明:不同预处理方法对KOH腐蚀后硅片表面粗糙度的影响不同,分别用35℃的BOE(7:1氟化铵腐蚀液)、常温BOE、10:1 HF、50:1 HF含HF成分的腐蚀液对硅片进行预处理,再和未做预处理的硅片在同等条件下进行KOH腐蚀,实验结果发现预处理后硅片表面粗糙度比未做处理的硅片表面粗糙度增加约1 nm左右,即经过含HF成分的腐蚀液预处理后的硅片再进行KOH腐蚀,其表面粗糙度将变差.     

KOH溶液中(11O)硅片腐蚀特性的研究

研究了在KOH溶液中(110)硅片的腐蚀特性,在保证(110)面的平整和{111}面的光滑的腐蚀实验条件下,利用(110)面和{111}面腐蚀选择比大,采用湿法腐蚀技术可以制作高深宽比结构的方式,在(110)硅片上设计制作出光开关用微反射镜.在腐蚀过程中光开关悬臂的凸角处产生了削角现象,利用表面硅原子悬挂键的分布特征对产生削角的原因作了合理解释,这为以后研究凸角补偿提供了理论依据.     

微腐蚀去除硅衬底表面损伤及污染物研究

硅片CMP工艺会引入表面缺陷和沾污,通常采用NaOH和KOH作为腐蚀溶液,利用微腐蚀法将硅片表面的损伤污染层剥离,以免导致IC制备过程中产生二次缺陷,但会不可避免地引入金属离子。制备了一种用螯合剂和表面活性剂复配的新型清洗液,利用螯合剂对硅片表面损伤层进行微腐蚀,同时采用表面活性剂去除硅片表面吸附的微粒。经台阶仪和原子力显微镜检测,该清洗液能有效去除硅片表面损伤层和颗粒,同时螯合剂本身不含金属离子,并且对金属离子有螯合作用,可有效避免传统腐蚀液中金属离子带来的二次污染。     

表面活性剂对硅腐蚀效果及太阳电池性能改善研究

在硝酸/氢氟酸腐蚀液中加入表面活性剂对多晶硅片进行了腐蚀,并使用扫描电子显微镜和激光共聚焦显微镜观察硅片表面形貌的变化,在此基础上分析了硅片浸润性及反应物迁移率变化对腐蚀效果的影响。实验结果表明:加入表面活性剂后,腐蚀速率降低,在硅片表面形成了更均匀的绒面结构及亚微米结构,硅片的反射率从23%下降到18.5%,反射率的降低提升了太阳电池的受光面积。仿真结果表明,使用加入表面活性剂的腐蚀液后制备的太阳电池,其短路电流提升了0.25mA/cm2,光电转换效率提升了0.1%。     

化学腐蚀硅表面结构反射率影响因素的研究

单晶硅片在碱溶液中的腐蚀会引起表面结构的变化,利用紫外可见分光光度计测量硅片表面反射率,发现碱溶液的浓度、腐蚀时间、添加剂的选择（无水乙醇或异丙醇）以及添加剂的浓度均对硅片表面反射率有影响。比较几个因素发现碱溶液的浓度和腐蚀时间对硅片表面反射率影响最大。当腐蚀温度为80℃,NaOH固体浓度为15g/L,添加剂无水乙醇体积分数10%时,腐蚀30min得到硅片反射率最低,达到11.15%。     

氢氧化钾和酸性溶液腐蚀硅片的比较

本文研究了KOH腐蚀法,它是代替酸腐蚀以去除硅片损伤的一种方法。业已发现,对硅片用户和生产者而言,KOH腐蚀均优于酸腐蚀。对硅片用户而言,KOH腐蚀使器件成品率更高,硅片更平整,背面形状更好,且避免了金属复盖层;对于硅片制造者而言,KOH腐蚀使下硅片成本更稳定更低,加工工艺更紧凑,加工环境要求更一般,加工温度更易于控制,腐蚀后硅片外形均匀性和一致性更好。作者确定了详细的腐蚀速率。     

腐蚀工艺中的颗粒问题

本文从氢氟酸腐蚀二氧化硅、湿法去胶、有机溶剂去胶、等离子反应室沾污等方面入手，探讨如何控制腐蚀工艺过程中的颗粒问题，以最优化的工艺条件减少或消除工艺中的颗粒和滞留在硅片表面的残余物，从而达到对于1μmCMOS工艺颗粒的控制要求。     

测定硅各向异性腐蚀速率分布的新方法

介绍了一种测定硅各向异性腐蚀速率分布的新方法.硅各向异性腐蚀速率三维分布可由一系列晶面上的二维腐蚀速率分布表示.利用深反应离子刻蚀技术(DRIE)在{0mn}硅片上制作出侧壁垂直于硅片表面的矩形槽,测量槽宽度在腐蚀前后的变化,就可测定各{0mn}面上的二维腐蚀速率分布.将二维腐蚀速率分布组合在一起就得到了三维腐蚀速率分布.由于DRIE制作的垂直侧壁深度大,可耐受较长时间的各向异性腐蚀,所以只需使用一般的显微镜就能得到准确的结果.实验得到了40%KOH和25%TMAH中{n10}和{n11}晶面的腐蚀速率分布数据.     

使用超声搅拌实现精密KOH各向异性体硅腐蚀

对使用超声搅拌和不加搅拌时(100)单晶硅的腐蚀特性进行了研究和对比.使用超声搅拌,可以得到光滑的、无小丘的腐蚀表面,整个硅片腐蚀深度的误差不超过1μm.实验结果表明,该方法可以有效地实现精密KOH各向异性体硅腐蚀.     

测定硅各向异性腐蚀速率分布的新方法

介绍了一种测定硅各向异性腐蚀速率分布的新方法.硅各向异性腐蚀速率三维分布可由一系列晶面上的二维腐蚀速率分布表示.利用深反应离子刻蚀技术(DRIE)在{0mn}硅片上制作出侧壁垂直于硅片表面的矩形槽,测量槽宽度在腐蚀前后的变化,就可测定各{0mn}面上的二维腐蚀速率分布.将二维腐蚀速率分布组合在一起就得到了三维腐蚀速率分布.由于DRIE制作的垂直侧壁深度大,可耐受较长时间的各向异性腐蚀,所以只需使用一般的显微镜就能得到准确的结果.实验得到了40%KOH和25%TMAH中{n10}和{n11}晶面的腐蚀速率分布数据     

A simple process to produce a high quality silicon surface prior toselective epitaxial growth

A simple and low-cost process was devised to eliminate etch damage resulting from oxide etching on the seed-hole surface prior to selective epitaxial growth (SEG) of silicon. The process consists of a low power C ₂F₆ RIE step which was performed right after the oxide etch step in the same etch reactor. The use of this step excluded the need of a conventional sacrificial oxide to remove damaged silicon regions and residual polymers. The n-p diodes resulting from n-type SEG grown on p-type substrate were used to evaluate the quality of the silicon surface prior to SEG     

Etch characteristics of KOH, TMAH and dual doped TMAH for bulk micromachining of silicon

High precision bulk micromachining of silicon is a key process step to shape spatial structures for fabricating different type of microsensors and microactuators. A series of etching experiments have been carried out using KOH, TMAH and dual doped TMAH at different etchant concentrations and temperatures wherein silicon, silicon dioxide and aluminum etch rates together with <100> silicon surface morphology and <111>/<100> etch rate ratio have been investigated in each etchant. A comparative study of the etch rates and etched silicon surface roughness at different etching ambient is also presented.From the experimental studies, it is found that etch rates vary with variation of etching ambient. The concentrations that maximize silicon etch rate is 3% for TMAH and 22 wt.% for KOH. Aluminum etch rate is high in KOH and undoped TMAH but negligible in dual doped TMAH. Silicon dioxide etch rate is higher in KOH than in TMAH and dual doped TMAH solutions. The <111>/<100> etch rate ratio is highest in TMAH compared to the other two etchants whereas smoothest etched silicon surface is achieved using dual doped TMAH. The study reveals that dual doped TMAH solution is a very attractive CMOS compatible silicon etchant for commercial MEMS fabrication which has superior characteristics compared to other silicon etchants.     

The effect of cathode materials on reactive ion etching of silicon and silicon dioxide in a CF4 plasma

Silicon and silicon dioxide have been Reactive Ion Etched in a CF₄ plasma using a diode sputtering configuration to achieve etching. Pressures ranged from 20 to 100 millitorr and power densities to the RF cathode were between 0.1 and 1.0 W/cm². The effect of cathode material on the quality of etched surfaces and on etch rates has been investigated. It has been observed that the etch rate of silicon decreases as the area of silicon exposed to the plasma is increased and that this silicon loading effect is strongly influenced by the material covering the balance of the cathode. For instance, the silicon loading effect is much more pronounced when silicon dioxide rather than aluminum is used to cover the balance of the cathode. This silicon loading effect was investigated further by varying RF power. It was found that loading a silicon dioxide covered cathode with silicon wafers decreases the dependence of silicon etch rate on power. The silicon dioxide etch rate and its dependence on RF power are the same whether silicon, silicon dioxide or aluminum is used to cover the balance of the cathode. Possible explanations for these experimental results will be discussed.     

Uniform pyramid formation on alkaline-etched polished monocrystalline (100) silicon wafers

Pyramidal texturing of monocrystalline silicon using alkaline etchants depends strongly upon the initial condition of the wafer surface and upon etching parameters. Texturization of polished wafers is often incomplete, with non-textured areas arising to yield high values of reflectance. A new technique is introduced for uniform pyramid formation on polished wafers. Nitrogen is used to expel dissolved oxygen in the etch solution, since it has been observed that oxidizing agents act to encourage polished etch surfaces.     

Selective chemical etching of polycrystalline SiGe alloys with respect to Si and SiO2

Polycrystalline SiGe etches that are selective to silicon dioxide as well as silicon are needed for flexibility in device fabrication. A solution of NH₄OH, H₂O₂, and H₂O has been found to selectivity etch polycrystalline silicon-germanium alloys over both silicon and silicon dioxide. Optimum composition of the solution was determined by maximizing etch rates for SiGe films with several germanium compositions. The dependence of etch rates on germanium content, etching temperature, and doping concentration are reported. The etch rate and selectivity are approximately exponentially proportional to the germanium content. Etching was found to be insensitive to deposition method, doping method, and annealing conditions of the SiGe films. In addition, etching leaves a smooth silicon substrate surface after removal of SiGe films.     

准分子激光电化学刻蚀硅的刻蚀质量研究

为了解决现有硅刻蚀工艺中存在的刻蚀质量等问题,采用激光加工技术和电化学加工技术相结合的工艺对硅进行了刻蚀,研究了该复合工艺的工艺特性。实验中采用248nm-KrF准分子激光作光源聚焦照射浸在KOH溶液中的阳极n-Si上,实现激光诱导电化学刻蚀。在实验的基础上,研究了激光电化学刻蚀Si的刻蚀孔的基本形貌,并对横向刻蚀和背面冲击等质量问题进行了分析。结果表明,该工艺刻蚀的孔表面质量好、垂直度高;解决了碱液中Si各向异性刻蚀的自停止问题,具有加工大深宽比微结构的能力;也具有不需光刻显影就能进行图形加工的优越性。     

The investigation of DARC etch back in DRAM capacitor oxide mask opening

Opening the silicon oxide mask of a capacitor in dynamic random access memory is a critical process on a capacitive coupled plasma (CCP) etch tool.Three steps,dielectric anti-reflective coating (DARC) etch back,silicon oxide etch and strip,are contained.To acquire good performance,such as low leakage current and high capacitance,for further fabricating capacitors,we should firstly optimize DARC etch back.We developed some experiments,focusing on etch time and chemistry,to evalu-ate the profile of a silicon oxide mask,DARC remain and critical dimension.The result shows that etch back time should be con-trolled in the range from 50 to 60 s,based on the current equipment and condition.It will make B/T ratio higher than 70％ mean-while resolve the DARC remain issue.We also found that CH2F2 flow should be ～15 sccm to avoid reversed CD trend and keep in-line CD.     

Characterization of oxide etching and wafer cleaning using vapor phase anhydrous hydrofluoric acid and ozone

A cleaning process using anhydrous hydrofluoric acid/methanol (AHF) and ozone was carried out in a vapor phase cleaning module (VPC). The dependence of the AHF vapor phase etch rate of thermally grown silicon dioxide on different process parameters, such as etch time, AHF-flow and temperature was studied. The optimized etch process is attained at a temperature of 40°C and a pressure of 50 mbar. To demonstrate the feasibility of this cluster tool for advanced gate dielectric formation, investigations on surface properties after AHF vapor cleaning, such as contact angle measurement and atomic force microscopy (AFM) were carried out. Using XPS, the surface binding states of HF-vapor treated silicon surfaces were studied. Traces of fluorine and low oxygen coverage were monitored. An ozone treatment immediately after AHF cleaning increases significantly the fluorine concentration on the silicon surface. A beneficial impact of AHF and ozone on the electrical characteristics of 4 nm oxide films grown in oxygen by RTP in a cluster tool immediately after cleaning without breaking the vacuum was found.     

Comparison of diamond wire cut and silicon carbide slurry processed silicon wafer surfaces after acidic texturisation

Our work focuses on the acidic etching of silicon wafers, cut via diamond wire (DW) or silicon carbide slurry process (SP). The DW and SP as-cut wafer surface structures have a significant impact on the evolution of the two resultant and different etched morphologies. The time-dependent development of the surface morphology for mono- and multi-crystalline wafers is compared and analyzed via etch rates, reflectivity measurements and confocal microscopy. The as-cut structure of the differently sawn wafers defines a template where the etch attack preferentially occurs and predetermines the texturisation of the etched surface. Based on the experimental results it is possible to lower the reflectivity of the SP-sawn wafers by varying the acidic mixture. On the contrary, the DW-sawn wafers obtain only a small enlargement of the folded surface area during acidic texturisation and no influence of different acidic etch solutions on the reflectivity values was found. To create homogeneously texturized DW-sawn wafers of low reflectivity, an adaptation of the sawing process as well as the development of new etchants and new etch conditions is necessary.     

Inductively coupled plasma etch damage in 4H−SiC investigated by Schottky diode characterization

Ti Schottky diodes have been used to investigate the damage caused by inductively coupled plasma (ICP) etching of silicon carbide. The Schottky diodes were characterized using IV and CV measurements. An oxidation approach was tested in order to anneal the damage, and the diode characterization was used to determine the success of the annealing. The barrier height, leakage current, and ideality factor changed significantly on the sample exposed to the etch. When the etched samples were oxidized the electrical properties were recovered and were similar to the unetched reference sample (with oxidation temperatures ranging from 900°C up to 1250°C). Annealing in nitrogen at 1050°C did not improve the electrical characteristics. A low energy etch showed little influence on the electrical characteristics, but since the etch rate was very low the etched depth may not be sufficient in order to reach a steady state condition for the surface damage.