Hydrogen-induced DLTS signal in pd/n-Si Schottky diodes

An investigation is reported into the electrical properties of palladium/silicon oxide/n-type silicon Schottky-barrier-type structures. On exposure to hydrogen a large increase in the DLTS signal is observed. This is thought to be associated with the production of electron trapping centres. Analysis reveals the presence of two traps, both located near the silicon surface.     

Electrical characteristics of GaAs MIS Schottky diodes

The current-voltage (I-V) and capacitance-voltage (C-V) characteristics of GaAs metal-insulator-semiconductor (MIS) Schottky barrier diodes are investigated over a wide temperature range and compared with MS diodes. The effects of the insulating layer on barrier height and carrier transport are delineated by an activation energy analysis. Excess currents observed at low forward and reverse bias have also been analyzed and their cause identified. A capacitance anomaly consistently noticed in MIS Schottky barriers is resolved by stipulating a non-uniform interfacial layer, and a self-consistent model of the GaAs MIS Schottky barrier is developed by analyzing I-V and C-V data of both MIS and MS diodes.     

Analysis of interface states and series resistance of MIS Schottky diodes using the current-voltage (I-V) characteristics

The purpose of this paper is to analyze interface states in Al/SiO₂/p-Si (MIS) Schottky diodes and determine the effect of SiO₂ surface preparation on the interface state energy distribution. The current-voltage (I-V) characteristics of MIS Schottky diodes were measured at room temperature. From the I-V characteristics of the MIS Schottky diode, ideality factor (n) and barrier height (Φ_B) values of 1.537 and 0.763 eV, respectively, were obtained from a forward bias I-V plot. In addition, the density of interface states (N_ss) as a function of (E_ss-E_v) was extracted from the forward bias I-V measurements by taking into account both the bias dependence of the effective barrier height (Φ_e), n and R_s for the MIS Schottky diode. The diode shows non-ideal I-V behaviour with ideality factor greater than unity. In addition, the values of series resistance (R_s) were determined using Cheung’s method. The I-V characteristics confirmed that the distribution of N_ss, R_s and interfacial insulator layer are important parameters that influence the electrical characteristics of MIS Schottky diodes.     

Temperature dependent current–voltage (I–V) characteristics of Au/n-Si (1 1 1) Schottky barrier diodes with PVA(Ni,Zn-doped) interfacial layer

Current–voltage (I–V) characteristics of Au/PVA/n-Si (1 1 1) Schottky barrier diodes (SBDs) have been investigated in the temperature range 80–400 K. Here, polyvinyl alcohol (PVA) has been used as interfacial layer between metal and semiconductor layers. The zero-bias barrier height (Φ_B0) and ideality factor (n) determined from the forward bias I–V characteristics were found strongly dependent on temperature. The forward bias semi-logarithmic I–V curves for different temperatures have an almost common cross-point at a certain bias voltage. The values of Φ_B0 increase with the increasing temperature whereas those of n decrease. Therefore, we have attempted to draw Φ_B0 vs. q/2kT plot in order to obtain evidence of a Gaussian distribution (GD) of the barrier heights (BHs). The mean value of BH and standard deviation (σ₀) were found to be 0.974 eV and 0.101 V from this plot, respectively. Thus, the slope and intercept of modified vs. q/kT plot give the values of and Richardson constant (A^?) as 0.966 eV and 118.75 A/cm²K², respectively, without using the temperature coefficient of the BH. This value of A^* 118.75 A/cm²K² is very close to the theoretical value of 120 A/cm²K² for n-type Si. Hence, it has been concluded that the temperature dependence of the forward I–V characteristics of Au/PVA/n-Si (1 1 1) SBDs can be successfully explained on the basis of the Thermionic Emission (TE) theory with a GD of the BHs at Au/n-Si interface.     

Electrical and interfacial properties of Au/P3HT:PCBM/n-Si Schottky barrier diodes at room temperature

In this study, a gold/poly(3-hexylthiophene):[6,6]-phenyl C61 butyric acid methyl ester/n-type silicon (Au/P3HT:PCBM/n-Si) metal-polymer-semiconductor (MPS) Schottky barrier diode (SBD) was fabricated. To accomplish this, a spin-coating system and a thermal evaporation were used for preparation of a P3HT/PCBM layer system and for deposition of metal contacts, respectively. The forward- and reverse-bias current–voltage (I–V) characteristics of the MPS SBD at room temperature were studied to investigate its main electrical parameters such as ideality factor (n), barrier height (Φ_B), series resistance (R_s), shunt resistance (R_sh), and density of interface states (N_ss). The I–V characteristics have nonlinear behavior due to the effect of R_s, resulting in an n value (3.09) larger than unity. Additionally, it was found that n, Φ_B, R_s, R_sh, and N_ss have strong correlation with the applied bias. All results suggest that the P3HT/PCBM interfacial organic layer affects the Au/P3HT:PCBM/n-Si MPS SBD, and that R_s and N_ss are the main electrical parameters that affect the Au/P3HT:PCBM/n-Si MPS SBD. Furthermore, a lower N_ss compared with that of other types of MPS SBDs in the literature was achieved by using the P3HT/PCBM layer. This lowering shows that high-quality electronic and optoelectronic devices may be fabricated by using the Au/P3HT:PCBM/n-Si MPS SBD.     

Temperature dependent electrical and dielectric properties of Au/polyvinyl alcohol (Ni, Zn-doped)/n-Si Schottky diodes

The electrical and dielectric properties of Au/PVA (Ni, Zn-doped)/n-Si Schottky diodes (SDs) were studied in the temperature range of 80-400 K. The investigation of various SDs fabricated with different types of interfacial layer is important for understanding the electrical and dielectric properties of SDs. Therefore, in this study polyvinyl alcohol (PVA) film was used as an interfacial layer between metal and semiconductor. The electrical and dielectric properties of Au/PVA (Ni, Zn-doped)/n-Si SDs were calculated from the capacitance-voltage (C-V) and conductance-voltage (G/w-V) measurements. The effects of interface state density (N_ss) and series resistance (R_s) on C-V characteristics were investigated in the wide temperature range. It was found that both of the C-V-T and G/w-V-T curves included two abnormal regions and one intersection point. The dielectric constant (ε″), dielectric loss (ε″), dielectric loss tangent (tan δ) and the ac electrical conductivity (σ_ac) obtained from the measured capacitance and conductance were studied for Au/PVA (Ni, Zn-doped)/n-Si SDs. Experimental results show that the values of ε′, ε″ and tan δ are a strong function of the temperature. Also, the results indicate the interfacial polarization can be more easily occurred at high temperatures.     

On the temperature dependence of series resistance and interface states in Al/SiO2/p-Si (MIS) Schottky diodes

The capacitance-voltage-temperature (C-V-T) and conductance-voltage-temperature (G/w-V-T) characteristics of metal-semiconductor (Al/p-Si) Schottky diodes with thermal growth interfacial layer were investigated by considering series resistance effect in the wide temperature range (80-400 K). It is found that in the presence of series resistance, the forward bias C-V plots exhibit a peak, and experimentally shows that the peak positions shift towards higher positive voltages with increasing temperature, and the peak value of the capacitance has a maximum at 80 K. The C-V and (G/w-V) characteristics confirm that the N_ss and R_s of the diode are important parameters that strongly influence the electric parameters in (Al/SiO₂/p-Si) MIS Schottky diodes. The crossing of the G/w-V curves appears as an abnormality when seen with respect to the conventional behaviour of the ideal MS or MIS Schottky diode. It is thought that the presence of a series resistance keeps this intersection hidden and unobservable in homogeneous Schottky diodes, but it appears in the case of inhomogeneous Schottky diode. In addition, the high frequency (C_m) and conductance (G_m/w) values measured under both reverse and forward bias were corrected for the effect of series resistance to obtain the real diode capacitance.     

Thermally annealed Ni/n-GaAs(Si)/In Schottky barrier diodes

We have identically prepared as many as eight Ni/n-GaAs/In Schottky barrier diodes (SBDs) using an n-type GaAs substrate with a doping density of about 7.3 × 10¹⁵ cm⁻³. The thermal stability of the Ni/n-GaAs/In Schottky diodes has been investigated by means of current-voltage (I-V) techniques after annealed for 1 min in N₂ atmosphere from 200 to 700 °C. For Ni/n-GaAs/In SBDs, the Schottky barrier height Φ_b and ideality factor n values range from 0.853 ± 0.012 eV and 1.061 ± 0.007 (for as-deposited sample) to 0.785 ± 0.002 eV and 1.209 ± 0.005 (for 600 °C annealing). The ideality factor values remained about unchanged up to 400 °C annealing. The I-V characteristics of the devices deteriorated at 700 °C annealing.     

Electrical characteristics and inhomogeneous barrier analysis of Au-Be/p-InSe:Cd Schottky barrier diodes

We have identically prepared Au-Be/p-InSe:Cd Schottky barrier diodes (SBDs) (21 dots) on the InSe:Cd substrate. The electrical analysis of Au-Be/p-InSe:Cd structure has been investigated by means of current-voltage (I-V), capacitance-voltage (C-V) and capacitance-frequency (C-f) measurements at 296 K temperature in dark conditions. The effective barrier heights and ideality factors of identically fabricated Au-Be/p-InSe:Cd SBDs have been calculated from their experimental forward bias current-voltage (I-V) characteristics by applying a thermionic emission theory. The BH values obtained from the I-V characteristics have varied between 0.74 eV and 0.82 eV with values of ideality factors ranging between 1.49 and 1.11 for the Au-Be/p-InSe:Cd SBDs. It has been determined a lateral homogeneous barrier height value of approximately 0.82 eV for these structures from the experimental linear relationship between barrier heights and ideality factors. The Schottky barrier height (SBH) value has been obtained from the reverse-bias C-V characteristics of Au-Be/p-InSe:Cd SBD for only one diode. At high currents in the forward direction, the series resistance effect has been observed. The value of series resistance has been determined from I-V measurements using Cheung’s and Norde’s methods.     

The effects of surface states and series resistance on the performance of Au/SnO2/n-Si and Al/SnO2/p-Si (MIS) Schottky barrier diodes

We have fabricated two types of Schottky barrier(SBDs),Au/SnO₂/n-Si (MIS1) and Al/SnO₂/p-Si (MIS2), to investigate the surface (N_ss) and series resistance (R_s) effect on main electrical parameters such as zero-bias barrier height (Φ_Bo) and ideality factor (n) for these SBDs. The forward and reverse bias current–voltage (I–V) characteristics of them were measured at 200 and 295 K, and experimental results were compared with each other. At temperatures of 200 and 295 K, Φ_Bo, n, N_ss and R_s for MIS1 Schottky diodes (SDs) ranged from 0.393 to 0.585 eV, 5.70 to 4.75, 5.42×10¹³ to 4.27×10¹³ eV^?1 cm^?2 and 514 to 388 Ω, respectively, whereas for MIS2 they ranged from 0.377 to 0.556 eV, 3.58 to 2.1, 1.25×10¹⁴ to 3.30×10¹⁴ eV^?1 cm^?2 and 312 to 290 Ω, respectively. The values of n for two types of SBDs are rather than unity and this behavior has been attributed to the particular distribution of N_ss and interfacial insulator layer at the metal/semiconductor interface. In addition, the temperature dependence energy density distribution profiles of N_ss for both MIS1 and MIS2 SBDs were obtained from the forward bias I–V characteristics by taking into account the bias dependence of effective barrier height (Φ_e) and R_s. Experimental results show that both N_ss and R_s values should be taken into account in the forward bias I–V characteristics. It has been concluded that the p-type SBD (MIS2) shows a lower barrier height (BH), lower R_s, n and N_ss compared to n-type SBD (MIS1), which results in higher current at both 200 and 295 K.     

Current transport mechanisms and deep level transient spectroscopy of Au/n-Si Schottky barrier diodes

The temperature-dependent electrical characteristics of the Au/n-Si Schottky diodes have been studied in the temperature range of 40-300 K. Current density-voltage (J-V) characteristics of these diodes have been analyzed on the basis of thermionic emission theory with Gaussian distribution model of barrier height. The basic diode parameters such as rectification ratio, ideality factor and barrier height were extracted. Under a reverse bias, the conduction process at low voltage is determined by Schottky emission over a potential barrier but at higher voltage the Poole Frenkel effect is observed. The capacitance-voltage (C-V) features of the Au/n-Si Schottky diodes were characterized in the high frequency of 1 MHz. The barrier heights values obtained from the J-V and C-V characteristics have been compared. It has been seen that the barrier height value obtained from the C-V measurements is higher than that obtained from the J-V measurements at various temperatures. Possible explanations for this discrepancy are presented. Deep level transient spectroscopy (DLTS) has been used to investigate deep levels in Au/n-Si. Three electron trap centers, having different emission rates and activation energies, have been observed. It is argued that the origin of these defects is of intrinsic nature. A correlation between C-V and DLTS measurements is investigated.     

Ni(W)Si/Si肖特基势垒二极管电学特性研究

首次提出在Ni中掺入夹层W的方法来提高NiSi的热稳定性。具有此结构的薄膜,经600~800℃快速热退火后,薄层电阻保持较低值,小于2Ω/。经Raman光谱分析表明,薄膜中只存在NiSi相,而没有NiSi2生成。Ni(W)Si的薄层电阻由低阻转变为高阻的温度在800℃以上,比没有掺W的镍硅化物转变温度的上限提高了100℃。Ni(W)Si/Si肖特基势垒二极管能够经受650~800℃不同温度的快速热退火,肖特基接触特性良好,肖特基势垒高度为0.65 eV,理想因子接近于1。     

Current transport mechanisms and trap state investigations in (Ni/Au)-AlN/GaN Schottky barrier diodes

The current transport mechanisms in (Ni/Au)-AlN/GaN Schottky barrier diodes (SBDs) were investigated by the use of current-voltage characteristics in the temperature range of 80-380 K. In order to determine the true current transport mechanisms for (Ni/Au)-AlN/GaN SBDs, by taking the J_s(tunnel), E₀, and R_s as adjustable fit parameters, the experimental J-V data were fitted to the analytical expressions given for the current transport mechanisms in a wide range of applied biases and at different temperatures. Fitting results show the weak temperature dependent behavior in the saturation current and the temperature independent behavior of the tunneling parameters in this temperature range. Therefore, it has been concluded that the mechanism of charge transport in (Ni/Au)-AlN/GaN SBDs, along the dislocations intersecting the space charge region, is performed by tunneling.In addition, in order to analyze the trapping effects in (Ni/Au)-AlN/GaN SBDs, the capacitance-voltage (C-V) and conductance-voltage (G/ω-V) characteristics were measured in the frequency range 0.7-50 kHz. A detailed analysis of the frequency-dependent capacitance and conductance data was performed, assuming the models in which traps are located at the heterojunction interface. The density (D_t) and time constants (τ_t) of the trap states have been determined as a function of energy separation from the conduction-band edge (E_c − E_t) as D_t≅(5-8)×10¹², respectively.     

Effect of series resistance on the electrical characteristics and interface state energy distributions of Sn/p-Si (MS) Schottky diodes

In this study, electrical characteristics of the Sn/p-type Si (MS) Schottky diodes have been investigated by current-voltage (I-V) and capacitance-voltage (C-V) measurements at room temperature. The barrier height obtained from C-V measurement is higher than obtained from I-V measurement and this discrepancy can be explained by introducing a spatial distribution of barrier heights due to barrier height inhomogeneities, which are available at the nanostructure Sn/p-Si interface. A modified Norde’s function combined with conventional forward I-V method was used to extract the parameters including barrier height (Φ_b) and the series resistance (R_S). The barrier height and series resistance obtained from Norde’s function was compared with those from Cheung functions. In addition, the interface-state density (N_SS) as a function of energy distribution (E_SS-E_V) was extracted from the forward-bias I-V measurements by taking into account the bias dependence of the effective barrier height (Φ_b) and series resistance (R_S) for the Schottky diodes. While the interface-state density (N_SS) calculated without taking into account series resistance (R_S) has increased exponentially with bias from 4.235 × 10¹² cm⁻²eV⁻¹ in (E_SS - 0.62) eV to 2.371 × 10¹³ cm⁻²eV⁻¹ in (E_SS - 0.39) eV of p-Si, the N_SS obtained taking into account the series resistance has increased exponentially with bias from of 4.235 × 10¹² to 1.671 × 10¹³ cm⁻²eV⁻¹ in the same interval. This behaviour is attributed to the passivation of the p-doped Si surface with the presence of thin interfacial insulator layer between the metal and semiconductor.     

Characterization of interface states at Ni/nCdF2 Schottky barrier type diodes and the effect of CdF2 surface preparation

Two Schottky diodes were fabricated by evaporation of nickel on to an n-type CdF₂:YF₃ semiconductor. Diode A was prepared on a slightly etched polished surface and diode B on an unpolished strongly etched surface. The current-voltage (I-V), capacitance-voltage (C-V), and conductance-voltage (G-V) characteristics were determined at room temperature. Both diodes showed non-ideal I-V behaviour with ideality factors 1.5 and 2.0, respectively and are thought to have a metal-interface layer-semiconductor configuration. Under forward bias, the admittance showed large frequency dispersion possibly caused by the interface states in thermal equilibrium with the semiconductor. Analysis of the C-V data in terms of Lehovec's model of an interface state continuum required the supposition of two time constants differing by 2 to 3 orders of magnitude. The characteristic parameters of the interface states (energy position, density, time constant and capture cross-section) were obtained for the values of the forward bias in the range 0.0 V ≦ V ≦ 0.2 V. The diode B is found to have the interface state densities about two orders of magnitude higher than the diode A which may be attributed to the different surface treatments. The C-V measurements at 100 kHz also indicated the presence of a deep donor trap about 0.6 eV below the conduction band edge in diode A.     

Temperature-dependent current-voltage characteristics of Cr/n-GaAs Schottky diodes

The Cr/n-GaAs/In Schottky contacts have been formed using dc magnetron sputtering. The current-voltage (I-V) characteristics of the device have been measured by steps of 20 K in the temperature range of 60-320 K. The ideality factor n of the device has remained about unchanged between 1.04 and 1.10 and Schottky barrier height around 0.58-0.60 eV from 320 K down to 160 K. It can be said that the experimental I-V data are almost independent of temperature above 160 K. After 160 K, the n value increased with a decrease in temperature and become 1.99 at 60 K. The I-V characteristics at high temperatures have been exactly explained by the standard TE model. The nature and origin of abnormal behaviors at low temperatures have been successfully explained by the current flow through the low SBH circular patches suggested by Tung and used by some studies in literature. It has been seen that the straight line of the nT vs. T plot with a T₀ value of 14 K was parallel to that of the ideal Schottky contact. Again, a lateral homogeneous BH value of 0.62 eV was calculated from the linear relationship between the ideality factor and barrier height values. It has been seen that he ?(T = 0) and BH temperature coefficient α values obtained from the flat band BH and the Norde’s model plots are in close agreement with each other.     

Analysis of interface states and series resistance of Ag/SiO2/n-Si MIS Schottky diode using current-voltage and impedance spectroscopy methods

The electrical characteristics and interface state density properties of Ag/SiO₂/n-Si metal-insulator-semiconductor diode have been analyzed by current-voltage and impedance spectroscopy techniques. The electronic parameters such as barrier height, ideality factor and average series resistance were determined and were found to be 0.62 eV, 1.91 and 975.8 Ω, respectively. The calculated ideality factor shows that Ag/SiO₂/n-Si structure obeys a metal-interfacial layer-semiconductor configuration rather than ideal Schottky barrier diode. The interface state density of the diode is of order of ∼10¹¹ eV⁻¹ cm⁻². The dielectrical relaxation mechanism of the diode is analyzed by Cole-Cole plots, indicating the presence of single relaxation mechanism. It is evaluated that the interfacial oxide layer modifies electrical parameters such as interface state density, series resistance and barrier height of Ag/SiO₂/n-Si diode.     

The role of the interface insulator layer and interface states on the current-transport mechanism of Schottky diodes in wide temperature range

In order to interpret in detail the experimentally observed current-voltage-temperature (I-V-T) and capacitance-voltage-temperature (C-V-T) results of Al/p-Si metal-semiconductor Schottky barrier diodes (SBDs) we have been examined the samples in the temperature range of 150-375 K. In the calculation method, to confirm the relationship between the I-V-T and C-V-T results, we have reported a modification which includes the ideality factor, n, and tunnelling parameter δχ^1/2 in the forward bias current characteristics. In the intermediate bias voltage region (0.1 < V < 0.6 V), the semi-logarithmic plots of the forward I-V-T curves were found to be linear. From the reverse saturation currents I₀ obtained by extrapolating the linear region of curves to zero applied voltage, the values of zero bias barrier heights ?_B0 were calculated at each temperature. The values of ideality factor calculated from the slope of each curves were plotted as a function of temperature. The values of n are 3.41-1.40 indicating that the Al/p-Si diode does obey the thermionic field emission (TFE) mechanism rather than the other transport mechanism, particularly at low temperature. The high value of ideality factors is attributed to high density of interface states in the SBDs. The temperature dependence energy density distribution profile of interface state was obtained from the forward bias I-V-T measurements by taking into account the bias dependence of the effective barrier height and ideality factor. The interface states density N_ss decreasing with increasing temperature was interpreted by the result of atomic restructuring and reordering at the metal-semiconductor interface. After the modification was made to the forward current expression, we obtained a good agreement between the values of barrier height obtained from both methods over a wide temperature.     

New way of plotting current/voltage characteristics of Schottky diodes

It is pointed out that the empirical diode relationship I = I0 exp (qV/nkT){1 - exp (-qV/kT)} has the property that a plot of log [I/{1 - exp (-qV/kT)}] against V should be linear for all values of V, including reverse voltages. This equation has been tested by making such a plot for an Al/GaAs Schottky diode made by MBE. The plot is linear over the entire range from +0.5 V to - 1.0 V, with n = 1.01.