Lead-free chip scale packages: assembly and drop test reliability

Three underfill options compatible with lead-free assembly have been evaluated: capillary underfill, fluxing underfill, and corner bond underfill. Chip scale packages (CSPs) with eutectic Sn/Pb solder were used for control samples. Without underfill, lead-free and Sn/Pb eutectic drop test results were comparable. Capillary flow underfills, dispensed and cured after reflow, are commonly used in CSP assembly with eutectic Sn/Pb solder. With capillary flow underfill, the drop test results were significantly better with lead-free solder assembly than with Sn/Pb eutectic. Fluxing underfill is dispensed at the CSP site prior to CSP placement. No solder paste is printed at the site. The CSP is placed and reflowed in a standard reflow cycle. A new fluxing underfill developed for compatibility with the higher lead-free solder reflow profiles was investigated. The fluxing underfill with lead-free solder yielded the best drop test results. Corner bond underfill is dispensed as four dots corresponding to the four corners of the CSP after solder paste print, but before CSP placement. The corner bond material cures during the reflow cycle. It is a simpler process compared to capillary or fluxing underfill. The drop test results with corner bond were intermediate between no underfill and capillary underfill and similar for both lead-free and Sn/Pb eutectic solder assembly. The effect of aging on the drop test results with lead-free solder and either no underfill or corner bond underfill was studied. Tin/lead solder with no underfill was used for control. This test was to simulate drop performance after the product has been placed in service for some period of time. There was degradation in the drop test results in all cases after 100 and 250 h of storage at 125/spl deg/C prior to the drop test. The worst degradation occurred with the lead-free solder with no underfill.     

Processing and reliability of CSPs with underfill

The use of chip scale packages (CSPs) is rapidly expanding, particularly in portable electronic products. Many CSP designs will meet the thermal cycle or thermal shock requirements for these applications. However, mechanical shock and bending requirements often necessitate the use of underfills to increase the mechanical strength of the CSP-to-board connection. This paper examines the assembly process with capillary and fluxing underfills. Issues of solder paste versus flux only, solder flux residue cleaning and reworkability are investigated with the capillary flow underfills. Fluxing underfills eliminate the issues of flux-underfill compatibility, but require placement into a predispensed underfill. Voiding during placement is discussed. To evaluate the relative performance of the underfills, a drop test was performed and the results are presented. All of the underfills significantly (5-6x) improved the reliability in the drop test compared to nonunderfilled parts. Test vehicles were also subjected to liquid-to-liquid thermal shock testing. The use of underfill improved the thermal shock performance by /spl ges/5x.     

Processing of fluxing underfills for flip chip-on-laminate assembly

Fluxing underfill eliminates process steps in the assembly of flip chip-on-laminate (FCOL) when compared to conventional capillary flow underfill processing. In the fluxing underfill process, the underfill is dispensed onto the board prior to die placement. During placement, the underfill flows in a "squeeze flow" process until the solder balls contact the pads on the board. The material properties, the dispense pattern and resulting shape, solder mask design pattern, placement force, placement speed, and hold time all impact the placement process and the potential for void formation. A design of experiments was used to optimize the placement process to minimize placement-induced voids. The major factor identified was board design, followed by placement acceleration. During the reflow cycle, the fluxing underfill provides the fluxing action required for good wetting and then cures by the end of the reflow cycle. With small, homogeneous circuit boards it is relatively easy to develop a reflow profile to achieve good solder wetting. However, with complex SMT assemblies involving components with significant thermal mass this is more challenging.     

Corner bonding of CSPs: processing and reliability

The use of chip-scale packages (CSPs) has expanded rapidly, particularly in portable electronic products. Many CSP designs will meet the thermal cycle or thermal shock requirements for these applications. However, mechanical shock (drop) and bending requirements often necessitate the use of underfills to increase the mechanical strength of the CSP-to-board connection. Capillary flow underfills processed after reflow provide the most common solution to improving mechanical reliability. However, capillary underfill dispense, flow, and cure steps and the associated equipment add cost and complexity to the assembly process. Corner bonding provides an alternate approach. Dots of underfill are dispensed at the four corners of the CSP site after solder paste print but before CSP placement. During reflow, the underfill cures, providing mechanical coupling between the CSP and the board at the corners of the CSP. Since only small areas of underfill are used, board dehydration is not required. This paper examines the manufacturing process for corner bonding including dispense volume, CSP placement, and reflow. Drop test results are then presented. A conventional, capillary process was used for comparison of drop test results. Test results with corner bonding were intermediate between complete capillary underfill and nonunderfilled CSPs. Finite-element modeling results for the drop test are also included.     

Thermal cycling lifetime of flip chip on board circuits with solder bumps and isotropically conductive adhesive joints

Flip chip on board (FCOB) circuits with solder bumps or isotropically conductive adhesives (ICA) may be subject to joint failure during thermal cycling. Although use of epoxy underfill can increase the lifetime significantly, there is still a risk of failure if the material properties of the underfill material are not adequate to prevent excessive values of stress and strain in the joints. This paper presents experimental measurements of the number of thermal cycles to failure for both solder reflow and ICA joint FCOB circuits. Measurements have been carried out for several different material systems with various types of underfill. The measurements of solder bump lifetime are compared to a lifetime model based on analytical calculations of solder strain. For an underfill type without filler (CTE=58 ppm//spl deg/C), the measurements are in excellent agreement with the model predictions, both giving an average lifetime of around 1500 thermal cycles between -55 and 125/spl deg/C. For two filled types of underfill with CTE nearly matched to that of solder, the measured average lifetimes vary from around 2700 to 5500 cycles. The corresponding model predictions are around 6000 and 7000 cycles, respectively. Measurements of the lifetime of FCOB's with ICA connections have been carried out for two different material systems. The obtained lifetimes vary between approximately 500 and 4000 cycles. No systematic lifetime variation with the thermal expansion of the underfill has been observed, but the lifetime seems to be dependent on the properties of the bump on the chip pad. Delamination, for instance at the ICA/bump interface, is found to be an important cause of failure.     

Assembly of lead-free bumped flip-chip with no-flow underfills

Lead-free solder reflow process has presented challenges to no-flow underfill material and assembly. The currently available no-flow underfill materials are mainly designed for eutectic Sn-Pb solders. This paper presents the assembly of lead-free bumped flip-chip with developed no-flow underfill materials. Epoxy resin/HMPA/metal AcAc/Flux G system is developed as no-flow underfills for Sn/Ag/Cu alloy bumped flip-chips. The solder wetting test is conducted to demonstrate the fluxing capability of the underfills for lead-free solders. A 100% solder joint yield has been achieved using Sn/Ag/Cu bumped flip-chips in a no-flow process. A scanning acoustic microscope is used to observe the underfill voiding. The out-gassing of HMPA at high curing temperatures causes severe voiding inside the package. A differential scanning calorimeter (DSC) used to study the curing degree of the underfill after reflow with or without post-cure. The post-curing profiles indicate that the out-gassing of HMPA would destroy the stoichiometric balance between the epoxy and hardener, and result in a need for high temperature post-cure. The material properties of the underfills are characterized and the influence of underfill out-gassing on the assembly and material properties is investigated. The impact of lead-free reflow on the material design and process conditions of no-flow underfill is discussed.     

Yield analysis and process modeling of low cost, high throughputflip chip assembly based on no-flow underfill materials

As a concept to achieve low-cost, high-throughput flip chip on board (FCOB) assembly, a new process has been developed implementing next generation flip chip processing based no-flow fluxing underfill materials. The low-cost, high throughput flip chip process implements large area underfill printing, integrated chip placement and underfill flow and simultaneous solder interconnect reflow and underfill cure. The goals of this study are to demonstrate feasibility of no flow underfill materials and the high throughput flip chip process over a range of flip chip configurations, identify the critical process variables affecting yield, analyze the yield of the high throughput flip chip process, and determine the impact of no-flow underfill materials on key process elements. Reported in this work is the assembly of a series of test vehicles to assess process yield and process defects. The test vehicles are assembled by depositing a controlled mass of underfill material on the chip site, aligning chip to the substrate pads, and placing the chip inducing a compression type underfill flow. The assemblies are reflowed in a commercial reflow furnace in an air atmosphere to simultaneously form the solder interconnects and cure the underfill. A series of designed experiments identify the critical process variables including underfill mass, reflow profile, placement velocity, placement force, and underfill material system. Of particular interest is the fact that the no-flow underfill materials studied exhibit an affinity for unique reflow profiles to minimize process defects     

An investigation on thermal reliability of underfilled PBGA solder joints

The failure mechanism, as well as cycles to failure, of two groups of PBGA samples (with/without underfill) for thermal shock in the range of -40/spl square/-125/spl square/ were presented. The experiment shows that the solder ball in the samples without underfill cracked after 500 times cycle, while no crack was found in the underfilled samples even after 2700 cycles. However, the die attach layer delaminated after 500 cycles and the PCB cracked in the underfilled samples after long time cycling. C-SAM is employed to investigate the delamination in the underfilled samples. Highly concentrated stress-strain induced by the CTE mismatch between the BGA component and the PCB, coarsened grain and two kinds of intermetallic compounds (Ni/sub 3/Sn/sub 2//NiSn/sub 4/) which formed during reflow and thermal cycling and their impact on the reliability of solder joints are discussed in this paper. The initiation of the crack and its propagation are also presented in this paper. By means of dye penetrant test, the authors reveal the distribution of microcracks in the solder ball array. In addition, this paper includes results of simulation, which further verified its conclusions.     

The effects of rheological and wetting properties on underfill filler settling and flow voids in flip chip packages

As the bump diameter and bump pitch of flip chip packages get smaller, the underfill becomes more resistant to flow. Therefore, low viscosity underfills are used in the process to increase the throughput. Problems associated with low viscosity underfills include filler settling and flow induced voids due to fast edge flow. In this paper, we will discuss how the rheological properties can affect underfill filler settling and flow voids. The effects of yield stress of underfill on filler settling and the effects of shear thickening of underfill at large shear rates on flow voids of underfill were investigated. It was shown that the underfills with small fillers have shear-thickening viscosity and yield stress. The filler settling of underfills with yield stress was greatly reduced. A video underfill flow metrology with quartz die packages was developed for flow void observation. The correlation between underfill, substrate properties, and flow voids formation based on the video underfill flow measurement will be discussed.     

Adhesion issues in flip-chip on organic modules

Flip chip attach on organic carriers is a novel electronic packaging assembly method which provides advantages of high input/output (I/O) counts, electrical performance and thermal dissipation. In this structure, the flip chip device is attached to organic laminate with predeposited eutectic solder. Mechanical coupling of the chip and the laminate is done via underfill encapsulant materials. As the chip size increases, the thermal mismatch between silicon and its organic carrier becomes greater. Adhesion becomes an important factor since the C4 joints fail quickly if delamination of the underfill from either chip or the solder mask interface occurs. Newly developed underfills have been studied to examine their properties, including interfacial adhesion strength, flow characteristics, void formation and cure kinetics. This paper will describe basic investigations into the properties of these underfills and also how these properties related to the overall development process. In addition, experiments were performed to determine the effects on adhesion degradation of flip chip assembly processes and materials such as IR reflow profile, flux quantity and residues. Surface treatment of both the chip and the laminate prior to encapsulation were studied to enhance underfill adhesion. Accelerated thermal cycling and highly accelerated stress testing (HAST) were conducted to compare various underfill properties and reliability responses     

Study of the self-alignment of no-flow underfill for micro-BGA assembly

As a concept to achieve high throughput low cost flip-chip assembly, a process development activity is underway, implementing next generation flip-chip processing based on large area underfill printing/dispensing, IC placement, and simultaneous solder interconnect reflow and underfill cure. The self-alignment of micro-BGA (ball grid array, BGA) package using flux and two types of no-flow underfill is discussed in this paper. A “rapid ramp” temperature profile is optimized for reflow of micro-BGA using no-flow underfill for self-aligning and soldering. The effect of bonding force on the self-alignment is also described. A SOFTEX real time X-ray inspection system was used to inspect samples to ensure the correct misalignment before reflow, and determine the residual displacement of solder joints after reflow. Cross-sections of the micro-BGA samples are taken using scanning electronic microscope. Our experimental results show that the self-alignment of micro-BGA using flux is very good even though the initial misalignment was greater than 50% from the pad center. When using no-flow underfill, the self-alignment is inferior to that of using flux. However, for a misalignment of no larger than 25% from the pad center, the package is also able to self-align with S1 no-flow underfill. However, when the misalignment is 37.5–50% from the pad center, there are 10–14% residual displacement after reflow. The reason is the underfill resistant force inhibiting the self-alignment of the package due to rapid increment of underfill viscosity during reflow. The self-alignment of micro-BGA package using no-flow underfill allows only <25% misalignment prior to the soldering. During assembling, although the bonding force does not influence on the self-alignment of no-flow underfill, a threshold bonding force is necessary to make all solder balls contact with PCB pads, for good soldering. The no-flow underfill is necessary to modify the fluxing/curing chemistry for overcoming the effect of tin metal salt produced during soldering on underfill curing, and for maintaining the low viscosity during soldering to help self-alignment.     

Double-layer no-flow underfill materials and process

The no-flow underfill has been invented and practiced in the industry for a few years. However, due to the interfering of silica fillers with solder joint formation, most no-flow underfills are not filled with silica fillers and hence have a high coefficient of thermal expansion (CTE), which is undesirable for high reliability. In a novel invention, a double-layer no-flow underfill is implemented to the flip-chip process and allows fillers to be incorporated into the no-flow underfill. The effects of bottom layer underfill thickness, bottom layer underfill viscosity, and reflow profile on the solder wetting properties are investigated in a design of experiment (DOE) using quartz chips. It is found that the thickness and viscosity of the bottom layer underfill are essential to the wetting of the solder bumps. Chip scale package (CSP) components are assembled using the double-layer no-flow underfill process. Silica fillers of different sizes and weight percentages are incorporated into the upper layer underfill. With a high viscosity bottom layer underfill, up to 40 wt% fillers can be added into the upper layer underfill and do not interfere with solder joint formation.     

Study of the fluxing agent effects on the properties of no-flowunderfill materials for flip-chip applications

As one of the key requirements of the no-flow underfill materials for flip-chip applications, a proper self-fluxing agent must be incorporated in the developed no-flow underfill materials to provide proper fluxing activity during the simultaneous solder reflow and underfill material curing. However, most fluxing agents have some adverse effects on the no-flow underfill material properties and assembly reliability. In this paper, we have extensively investigated the effects of the concentration of the selected fluxing agent on the material properties, interconnect integrity and assembly reliability. Through this work, an optimum concentration window of the fluxing agent is obtained and a routine procedure of evaluating fluxing agents is established     

Novel Bumping and Underfill Technologies for 3D IC Integration

In previous work, novel maskless bumping and no‐flow underfill technologies for three‐dimensional (3D) integrated circuit (IC) integration were developed. The bumping material, solder bump maker (SBM) composed of resin and solder powder, is designed to form low‐volume solder bumps on a through silicon via (TSV) chip for the 3D IC integration through the conventional reflow process. To obtain the optimized volume of solder bumps using the SBM, the effect of the volumetric mixing ratio of resin and solder powder is studied in this paper. A no‐flow underfill material named “fluxing underfill” is proposed for a simplified stacking process for the 3D IC integration. It can remove the oxide layer on solder bumps like flux and play a role of an underfill after the stacking process. The bumping process and the stacking process using the SBM and the fluxing underfill, respectively, for the TSV chips are carefully designed so that two‐tier stacked TSV chips are sucessfully stacked.     

Novel reworkable fluxing underfill for board-level assembly

Underfills are traditionally applied for flip-chip applications. Recently, there has been increasing use of underfill for board-level assembly including ball grid arrays (BGAs) and chip scale packages (CSPs) to enhance reliability in harsh environments and impact resistance to mechanical shocks. The no-flow underfill process eliminates the need for capillary flow and combines fluxing and underfilling into one process step, which simplifies the assembly of underfilled BGAs and CSPs for SMT applications. However, the lack of reworkability decreases the final yield of assembled systems. In this paper, no-flow underfill formulations are developed to provide fluxing capability, reworkability, high impact resistance, and good reliability for the board-level components. The designed underfill materials are characterized with the differential scanning calorimeter (DSC), the thermal mechanical analyzer (TMA), and the dynamic mechanical analyzer (DMA). The potential reworkability of the underfills is evaluated using the die shear test at elevated temperatures. The 3-point bending test and the DMA frequency sweep indicate that the developed materials have high fracture toughness and good damping properties. CSP components are assembled on the board using developed underfill. High interconnect yield is achieved. Reworkability of the underfills is demonstrated. The reliability of the components is evaluated in air-to-air thermal shock (AATS). The developed formulations have potentially high reliability for board-level components.     

Highly reliable non-conductive adhesives for flip chip CSP applications

Non-conductive adhesives (NCA), widely used in display packaging and fine pitch flip chip packaging technology, have been recommended as one of the most suitable interconnection materials for flip-chip chip size packages (CSPs) due to the advantages such as easier processing, good electrical performance, lower cost, and low temperature processing. Flip chip assembly using modified NCA materials with material property optimization such as CTEs and modulus by loading optimized content of nonconductive fillers for the good electrical, mechanical and reliability characteristics, can enable wide application of NCA materials for fine pitch first level interconnection in the flip chip CSP applications. In this paper, we have developed film type NCA materials for flip chip assembly on organic substrates. NCAs are generally mixture of epoxy polymer resin without any fillers, and have high CTE values un-like conventional underfill materials used to enhance thermal cycling reliability of solder flip chip assembly on organic boards. In order to reduce thermal and mechanical stress and strain induced by CTE mismatch between a chip and organic substrate, the CTE of NCAs was optimized by filler content. The flip chip CSP assembly using modified NCA showed high reliability in various environmental tests, such as thermal cycling test (-55/spl deg/C/+160/spl deg/C, 1000 cycle), high temperature humidity test (85/spl deg/C/85%RH, 1000 h) and high temperature storage test (125/spl deg/C, dry condition). The material properties of NCA such as the curing profile, the thermal expansion, the storage modulus and adhesion were also investigated as a function of filler content.     

Correlation of flip chip underfill process parameters and materialproperties with in-process stress generation

Electronic packaging designs are moving toward fewer levels of packaging to enable miniaturization and to increase performance of electronic products. One such package design is flip chip on board (FCOB). In this method, the chip is attached face down directly to a printed wiring board (PWB). Since the package is comprised of dissimilar materials, the mechanical integrity of the flip chip during assembly and operation becomes an issue due to the coefficient of thermal expansion (CTE) mismatch between the chip, PWB, and interconnect materials. To overcome this problem, a rigid encapsulant (underfill) is introduced between the chip and the substrate. This reduces the effective CTE mismatch and reduces the effective stresses experienced by the solder interconnects. The presence of the underfill significantly improves long term reliability. The underfill material, however, does introduce a high level of mechanical stress in the silicon die. The stress in the assembly is a function of the assembly process, the underfill material, and the underfill cure process. Therefore, selection and processing of underfill material is critical to achieving the desired performance and reliability. The effect of underfill material on the mechanical stress induced in a flip chip assembly during cure was presented in previous publications. This paper studies the effect of the cure parameters on a selected commercial underfill and correlates these properties with the stress induced in flip chip assemblies during processing     

Development of new no-flow underfill materials for both eutectic Sn-Pb solder and a high temperature melting lead-free solder

In recent years, no-flow underfill technology has drawn more attention due to its potential cost-savings advantages over conventional underfill technology, and as a result several no-flow underfill materials have been developed and reported. However, most of these materials are not suitable for lead-free solder, such as Sn/Ag (m.p. 225/spl deg/C), Sn/Ag/Cu (m.p. 217/spl deg/C), applications that usually have higher melting temperatures than the eutectic Sn-Pb solder (m.p. 183/spl deg/C). Due to the increasing environmental concern, the demand for friendly lead-free solders has become an apparent trend. This paper demonstrates a study on two new formulas of no-flow underfill developed for lead-free solders with a melting point around 220/spl deg/C. As compared to the G25, a no-flow underfill material developed in our research group, which uses a solid metal chelate curing catalyst to match the reflow profile of eutectic Sn-Pb solder, these novel formulas employ a liquid curing catalyst thus provides ease in preparation of the no-flow underfill materials. In this study, curing kinetics, glass transition temperature (Tg), thermal expansion coefficient (TCE), storage modulus (E') and loss modulus (E') of these materials were studied with a differential scanning calorimetry (DSC), a thermo-mechanical analysis (TMA), and a dynamic-mechanical analysis (DMA), respectively. The pot-life in terms of viscosity of these materials was characterized with a stress rheometer. The adhesive strength of the materials on the surface of silicon chips were studied with a die-shear instrument. The influences of fluxing agents on the materials curing kinetics were studied with a DSC. The materials compatibility to the solder penetration and wetting on copper clad during solder reflow was investigated with both eutectic Sn-Pb and 95.9Sn/3.4Ag/0.7Cu solders on copper laminated FR-4 organic boards.     

A computational study on solder bump geometry, normal, restoring, and fillet forces during solder reflow in the presence of liquefied underfill

A computational survey was performed to evaluate the effect of volume and material properties on a concurrent underfilling and solder reflow manufacturing technique applied to flip-chip technology. Fillet geometry in addition to collapsed solder ball geometry and forces during solder reflow in the presence of liquefied underfill are reported. Targeted material properties included surface tension, wetting angles, and process parameters such as underfill volume. A regression model is presented representing over 1000 case studies completed using surface evolver. Also, a multiple ball model was developed to study the solder ball array behavior. Modeling results are presented. Application of this model for wafer applied coating underfill thickness prediction was also studied including the fillet forces added to a multiple-ball-model. Behavior and force studies combining all these effects were performed and are presented. Finally, a more realistic arrangement consisting of circular and square solder pad geometries combined is modeled for a single ball. The models results are expanded to include a multiball model employing a commonly used regression method. Solder joints were cross-sectioned and measured after reflow in the presence of a fluxing underfill for comparison to model predictions. The experimental results agree within 1.5%.     

Reliability of microBGA assembly using no-flow underfill

In this paper, the reliability of the microBGA assembly using no-flow underfill is studied by thermal shock and bending cycle. Recently, a more promising underfill technology so-called “no-flow underfill” has been invented to cope with the limitations, which promises low cost assembly. The research results of self-alignment about no-flow underfill show that the self-alignment of microBGA using no-flow underfill is inferior to that using flux. There is residual displacement more or less in various offset volumes. Therefore, the effect of no-flow underfill on reliability of microBGA assembly needs to be investigated systematically. In this study, samples are reflowed with an optimized “rapid ramp” temperature profile, and using flux and no-flow underfill, respectively. One group of samples are subjected to thermal shock at temperature −40–125°C, and dwell time 15 min. Another group of samples is subjected to cyclic bending at a bending speed of 300 mm/min between 500 and −500 μ at the center of a microBGA package. The fatigue lifetime distribution is examined with the aid of “Weibull” method to investigate the effect of no-flow underfill on the reliability of microBGA assembly, and the failure mechanism is investigated by using the scanning electron microscope. Our experiment results show that the no-flow underfill can greatly enhance the mechanical fatigue lifetime. The underfilled material improves the stress distribution in solder joints. For assemblies with no underfills, the fracture always occurs in the outermost solder joint. The issue is improved by underfilling with no-flow underfill. However, the no-flow underfill cannot improve the thermal reliability of microBGA assembly, because the coefficient of thermal expansion (CTE) of no-flow underfill is too great at present. It is necessary to reduce the no-flow underfill CTE, so as to apply actually to BGA and CSP etc. Moreover, it is displayed that the fatigue lifetime of the residual displacement solder is less than 50% of that of the non-misaligned solder. The residual displacement is formed when the misalignment is >25% during mounting. Therefore, when the no-flow underfill is used in microBGA assembly, care must be taken to keep the mount position, and misalignment <25%.