Successive approximation logarithmic A/D conversion using charge redistribution techniques

The present paper describes a logarithmic A/D converter (LADC) working with the charge redistribution principle. the LADC uses a serial and a parallel capacitive attenuator and is suitable for manufacturing on a single chip. Formulae for the values of the capacitors are given in terms of the base of logarithm used. This LADC uses logarithmically spaced voltage comparison levels and therefore eliminates the use of logarithmic analogue signal conditioning circuits.     

基于ADP1046A控制的两级DC-DC变换器设计

为了解决通信二次电源数字控制及宽范围输入的问题,实现高功率密度的DC-DC变换,提出了以ADP1046A为核心控制器的两级变换拓扑实现方案。实现了调压与隔离分级,即通过Buck电路实现输入到目标电压的调节,通过全桥电路实现输入与输出的隔离。该方案利用ADP1046A的标准I²C接口实现电源控制与上位机的通信,两级变换不仅能够解决单级变换中变压器体积庞大,难以优化的问题,且可减小输出滤波器体积。利用所搭建的试验样机对相关功能、性能进行验证,试验结果表明,所提DC-DC变换器方案满足相应产品的需求,对于工程设计具有现实的指导意义。     

基于新型检测方法的单相并联有源滤波器

提出一种基于新型检测方法的单相并联有源滤波器。该有源滤波器采用新型基波相位和频率检测方法,基于该检测方法采用单周期复位积分方法计算出谐波电流。输入信号经过A/D变换得到数字信号,经过频率校正环节后可得到与输入信号基波分量相同角频率的信号,该信号再经过初相校正环节后就可以得到与输入信号基波分量同频率、同初相的相位信号,从而实现对输入信号中基波分量的跟踪。该相位检测方法不需要通过闭环校正,显著提高了检测跟踪速度,暂态响应时间小于20ms。利用该方法检测出电网电压基波分量单位正弦信号,采用单周期复位积分法,可以得到负荷电流基波分量的幅值,从而方便地计算出电流中的谐波分量。仿真和实验结果证明了所提方法的正确性和有效性。     

基-2 FFT在音频分析及输出系统中的应用

主要介绍了一种将FFT算法移植到单片机上运行,通过对数字音频信号进行分析处理,以实现音乐频谱实时显示和声音输出的系统。系统硬件部分主要由声音输入、单片机模数转换、由LED组成的点阵单元以及声音信号放大输出等电路组成。利用高性能STC12C5A60S2单片机内建的模数转换功能,先将输入的音频信号采样、量化转换为数字信号,再通过软件编程进行FFT运算。输出处理结果点亮LED点阵,完成频谱显示。LED的明暗由音乐的频率变化决定。通过LM386运放芯片及外围电路将输入的音频信号进行放大后,由喇叭或者外接音箱输出。该设计不但具有较高的实用价值和观赏性,而且硬件电路结构简洁,开发、制作成本低。     

一种多功能测温监控装置的设计与制作

设计了一种多功能温度监测装置,由测量元件、温度变送器、S7-200 PLC CPU224XP和模拟量输入扩展模块构成硬件,且由PLC程序和脚本程序组成软件,将检测到的温度数值在人机界面(H M I)上显示出来.重点介绍了模拟量—数字量—模拟量的转换过程、数据的标度变换,以及组态软件的脚本程序编写原则.     

Errors in Digital Measurement of Voltage, Active and Reactive Powers and an on-Line Correction for Frequency Drift

In this paper, errors in digitally measured power system variables under non-ideal conditions namely, off-nominal frequency, finite word length sampling and harmonics are obtained by simulation. A new and efficient correction term for errors due to frequency drift is derived theoretically and its effectiveness is also illustrated. All the simulations are performed on a personal computer using LOTUS 123 spreadsheet (Copyright Lotus Development Corporation) with 16 bit integer arithmetic and 12 bit integers as input from the analog to digital conversion.     

多通道高速数据采集故障录波装置

给出了一种多通道高速数据采集和故障录波器装置的设计方法。同时介绍了相关的PC功能卡的特性技术指标和使用方法，包括高增益、高性能的多功能数据采集卡，PCL－818GH，16路光电隔离数字信号输入板PCL－782，双口CAN总线通讯卡PCL－841，文中还给出了关于信号输入调理板的设计方法，介绍了有关数据传输以及该数据采集和故障录波装置的主要特点。     

非线性量化的模拟实现方法

基于语音信号的A律或μ律非线性量化方法,由于其先采用一个线性转换器进行量化,再用数字硬件或软件量化为A律或μ律电平。其为：用较少的二进制位代替较多二进制位的数字压缩编码。在动态范围更大的非语音信号采集中,常被误认为可以用此法来＂扩展小信号的可量化范围＂,因前线性转换器的量化台阶决定了其最小信号分辨率,这里的问题主要在：信号的量化前后处理意义不同。要扩展小信号的量化范围,在A/D转换的位数一定情况下,为保证输入峰值不超载,应该对其输入的模拟信号进行A律或μ律折线非线性放大处理。     

一种基于DSP的三相电压型变换器电流控制技术

控制三相电压型变换器(VSC)输入电感上的电流是VSC控制技术的关键所在。建立了三相VSC的数学模型，并在此基础上实现了一种基于DSP的数字电流控制方案。利用本方案能够实现功率的四象限流动。给出的稳态及功率换向流动时的动态实验波形说明，本方案的静动态特性均较好。     

Maximally linear FIR digital differentiators for midband frequencies

Among the known FIR digital differentiators, the minimax relative error (MRE) approximations are the most efficient ones, where the weighting coefficients are derived by using an optimization algorithm. This approximation fails at the frequency ω = π if the order N of the differentiator is odd. A half sample advance (i.e. a delay τ = ?1/2) and an even N become necessary to extend the MRE approximation up to ω = χ; these are, however, undesirable features, particularly in large signal processing systems. This paper proposes digital differentiators, which are characterized by maximal linearity of the frequency response at the midband frequency ω = π/2, and gives a mathematical relation for the weighting coefficients. the order N of the differentiator has been ensured to be odd, and no half sample advance has been used. It has been shown that for relative error (RE) ? 1 per cent, the proposed differentiators are more efficient as compared to those based on the MRE approximation, in terms of multiplications required per sample of the input signal for all N (N odd). the proposed approximations are also capable of giving extremely low RE (10^?3 to 10^?6 per cent), for narrow midband frequencies, with attractively low order N.     

A memristive dual-slope A/D converter

As an emerging device, memristor has several excellent properties like changeable memristance, nonvolatility, and nanoscale. Based on complementary metal-oxide-semiconductor (CMOS) dual-slope analog-to-digital (A/D) converter, this paper proposes a memristive dual-slope A/D converter. Owing to the usage of memristor, the proposed memristive A/D converter not only has more compact circuit structure and simpler control timing than the CMOS one but also has advantages over the existing memristive conversion circuits in circuit design and application. For the memristive A/D converter, a conversion process consists of two count procedures. By means of controlling the memristance change in the two count procedures, the A/D converter converts an analog signal to the corresponding digital count value. Meanwhile, the conversion result is inferred according to the circuit structure of the A/D converter. Then, combining the conversion process and PSPICE simulation, this paper analyzes the anti-interference performance of the A/D converter. Further, the robustness of the A/D converter is presented, applying the similar analysis methods. The analysis results demonstrate that the proposed A/D converter has good anti-interference and robustness performances.     

经济型小水电励磁装置

提出了一种经济型小水电励磁装置.通过嵌入微控制器dsPIC30F6014(简称F6014)作为该励磁装置调节器的核心,通过F6014的A/D转换接口和数字接口主要完成数据计算、逻辑控制等功能:通过F6014的定时器,输入捕捉和输出比较模块密切配合生成触发脉冲控制三相整流桥导通整流;并根据机组特点配置线性或非线性电阻灭磁...     

应用于宽输入范围的变模态LLC电路设计

在风力、光伏发电等新能源发电系统中,电压输出范围变化很大,为此提出一种变模态的LLC电路,其拓扑或者控制方式随着输入电压的变化而变化。电路由数字信号处理器DSP进行数字控制,控制简单方便,不需要增加额外的模拟电路。通过分析、仿真和实验验证,与传统LLC相比,变模态LLC在宽输入场合,其频率变换范围小,全范围内效率较高。     

A Hybrid Integrated Pulsewidth Modulator

A hybrid integrated circuit is described which generates two phase-shifted 20-kHz output pulse trains whose duty cycles are related to the amplitude of an applied input signal. The circuit was designed primarily for use in power conditioning schemes utilizing pulsewidth modulated signals for regulated dc-to-dc voltage conversion. Realization of this hybrid circuit has been accomplished with a beam-lead sealed-junction monolithic silicon chip and several tantalum thin-film resistors and capacitors which are bonded/ deposited on a ceramic substrate in the form of a 28-terminal dual-in line package (DIP).     

信号分析仪中矢量信号分析设计

针对通信信号的矢量分析测试需求，借鉴国外先进仪表的解决方案，在高性能信号分析仪中开发了矢量信号分析功能。首先对输入信号进行超外差变频接收和A/D采样，然后在FPGA中完成高速数字下变频和数据整数倍抽取滤波，最后在上层应用软件中完成高精度数据重采样、宽带时域修正滤波、瞬态分析和前馈数字解调等多域矢量分析，并通过多级方式实现多域测试结果的配置和同步显示。实测结果表明采用本方案设计的矢量信号分析指标优异、配置灵活、测试结果丰富多样。     

利用D/A变换器构成多路A/D数据采集系统

一般的数据采集系统中实现模数转换都是Ａ／Ｄ变换器变成的,本文介绍一种用Ｄ／Ａ变换器构成多路Ａ／Ｄ数据采集系统的方法,并给出了一个具体的例子。     

An efficient voltage to delay conversion method for DCVSL cells and its application in high speed all-digital time-based quantization

Translating the analog input voltage to delay of delay cells is a necessity for realizing digital time-based quantization. Usually, this conversion is done through additional elements, imposing extra power and area. This paper proposes a voltage to delay conversion method for cross-coupled differential cascode voltage switch logic (DCVSL) cells, without adding any extra elements to their basic structures. Cross-coupled delay cells are superior to conventional CMOS inverters in terms of lower power consumption, propagation delay, and area. However, controlling their delay is a demanding task due to their asynchronous charging and discharging. The key features of the proposed method are (a) controlling the delay of DCVSL cells just by see-saw changing of PMOS transistors source voltages; (b) reducing the propagation delays of DCVSL cells by simultaneously accelerating the charging and discharging processes; (c) reducing the power consumption by decreasing both the switching time and short-circuit current; (d) employing the proposed voltage to delay conversion method to develop a low power, small area, all-digital time-based analog to digital converter (ADC). The proposed 4-bit ADC, implemented in TSMC 65-nm CMOS technology, consumes 0.37 mW at conversion speed of 2 GHz with SNDR 20.9 dB and SFDR 30.2 dB, and occupies an active area of 0.0029 mm².     

A solid-state speed controller for capacitor motors drivingventilation fans

This paper documents the design and testing of an electronic speed controller for permanent-split capacitor motors driving agricultural ventilation fans. The controller was developed and tested with three commercially available and widely used fan systems. Linearized temperature versus airflow rate characteristics were obtained. The controller circuit uses an erasable programmable read-only memory (EPROM) chip. The input to the EPROM is an analog representation of temperature converted to digital form. The digital contents are then converted to an analog signal that triggers a triac and consequently controls the voltage input to the fan motor. A linearized control characteristic can be obtained by storing appropriate voltage values in the EPROM. These values correspond linearly to the desired fan speeds     

一种差动式电容荷载传感器

针对目前用于荷载(力)检测的传感器原理和种类单一,难于满足不同场合检测需要这一情况,开发了一种全新的差动式电容荷载传感器.该传感器将被测荷载的变化作为输入量,通过敏感元件一弹性体和转换原件--差动式圆柱型电极转换为电容量的变化,将输入与输出建立起一一对应的线性关系.传感器采用了差动式、等位环、超薄圆柱型电极结构以及现代材料和工艺,消除了非线性误差和边缘效应.使其检测精度、灵敏度、可靠性、使用寿命大为提高,具有实用和推广价值.     

双向开关型PFC变换器数字化控制研究

对一种新颖前沿的单相双向开关型AC/DC维也纳(Vienna)PFC拓扑进行研究,采用数字化前馈补偿,改善传统双环输入电流畸变问题,通过引入MCM数字前馈占空比补偿,使得系统在负载全功率范围内,输入电流波形不受电感连断续下模型差异的影响,得到了较好的PFC效果。通过理论分析,推导出MCM前馈占空比补偿的表达式,最后搭建1 k W的Vienna-PFC样机,并验证了方案的可行性。