一种用于高压测量系统的V/F转换电路的设计

设计了一种通过VCO实现的V/F转换电路,介绍了这个电路在罗柯夫斯基线圈组成的大电流测量系统中的应用,实验结果表明这种V/F转换电路具有良好的实用性。     

A 4.8–6.8 GHz low phase noise LC VCO in 0.13‐µm CMOS technology

This letter presents a novel LC voltage controlled oscillator (VCO) supporting the high‐speed serial transmission standard of RapidIO in 0.13‐µm complementary metal‐oxide semiconductor technology. The low phase noise is achieved through several techniques including current source switching, parallel coupled negative transconductance cell, and varactor bias combination scheme. Measured results of proposed circuit show a low phase noise of ?120 dBc/Hz at 1 MHz offset from 6.25 GHz carrier and tuning range of 4.8 ~ 6.8 GHz (34.48%) while consuming 7.4 mW under the supply voltage of 1.2 V. Copyright © 2015 John Wiley & Sons, Ltd.     

网络时间协议在电力监控系统时钟同步中的应用

电力监测系统是一个复杂的分布式系统,对时钟同步精度有着不同层次的需求。文章在介绍实现时钟同步的3种机制(硬时钟同步、软时钟同步、混合时钟同步)以及网络时间协议(NTP)原理的前提下,针对电力监控系统的特点,给出了一个结合GPS授时和NTP对时的分层混合时钟同步方案,并指出了今后改进的方向。     

Carrier phase error detection method and synchronization control of parallel‐connected PWM inverters without signal line

In recent years, parallel operation of inverters is employed to increase reliability and capacity in an uninterruptible power supply (UPS) system. A phase error in PWM carrier‐signals of each inverter causes high‐frequency loop current between inverters. Therefore, the PWM carrier‐signal of each inverter should be adjusted in phase. This paper proposes a detection method of phase error in PWM carrier‐signal and its application to synchronization control for parallel‐connected inverters. A simple definite‐integral circuit achieves detection of the carrier phase error from high‐frequency loop current using no signal line between inverters. The detected carrier phase error is applied to synchronize the PWM carrier‐signal through a PI compensator, and then the high‐frequency loop current can be suppressed. Several experimental test results show the validity of the proposed detection method and synchronization control. © 2006 Wiley Periodicals, Inc. Electr Eng Jpn, 157(1): 63– 71, 2006; Published online in Wiley InterScience ( http://www.interscience.wiley.com ). DOI 10.1002/eej.20143     

A faster phase frequency detector using transmission gate–based latch for the reduced response time of the PLL

In this paper, we present a new design of phase frequency detector (PFD) without reset, such that the blind zone and dead zone issues in the phase locked loop are annihilated. The PFD is designed using transmission gate–based latches, which produce UP and DOWN pulses only when there is a distinct phase difference between the reference and divided frequencies. Thus, the continuous pulses that get produced by the conventional NAND gate–based latches are avoided, leading to reduced power consumption of the PFD. The charge pump makes use of an op‐amp used as a buffer, to reduce the current mismatch. The loop filter used is of second order, and the voltage‐controlled oscillator is of conventional current–starved type. The divider makes use of true single‐phase clock latches. It was found that the phase locked loop with new design of PFD, compared with the conventional design, consumes 27% lesser power, and the lock time is decreased by 79%. In addition, it was found that the control voltage swing is reduced by 71%, which leads to much lesser spur content at the output of the voltage‐controlled oscillator.     

基于DSP软件锁相技术的CPT谐振频率跟踪研究

由非接触电能传输系统中谐振耦合电路的特性可知,耦合线圈处于谐振状态对减少无功功率,提高系统传输效率具有重要影响。在此基础上提出采用基于数字信号处理器TMS320F2812的软件锁相技术实现非接触电能系统谐振频率的跟踪方法,给出了具体实现思路及软件流程图。实验结果验证了本方法的可行性和有效性。     

A Hybrid DC Circuit Breaker Combining a Multilevel Converter and Mechanical Contactors: Verification of the Principles of Operation by Experiment and Simulation

This paper presents a new hybrid dc circuit breaker producing no conducting power loss under normal operating conditions and having the capability to interrupt a large amount of short‐circuiting current within several milliseconds. It consists of two reactors for current limiting and current control, two mechanical contactors, and a multilevel converter based on the cascade connection of multiple full‐bridge dc/dc converter cells. It is characterized by achieving current commutation from the main mechanical contactor to the multilevel converter with fast current control. This results in eliminating auxiliary power semiconductor switches that produce a nonnegligible conducting power loss under normal operating conditions. This paper discusses both principles of operation and control method of the new hybrid dc circuit breaker. Experimental verification is performed by a downscaled system rated at 300 V and 150 A, along with verification by computer simulation.     

A new mapping method for phase estimation of single‐phase signals: A new generalization and new realizations of the DFT estimation method

This paper proposes and analyzes a new simple real‐time phase‐estimation method for single‐phase signals, which is based on a vector mapping theory of n‐dimensional to 2‐dimensional vectors. According to the analyses, the proposed mapping method can estimate instantly and properly the true phase of the signals that are contaminated by significant amplitude of noise and harmonics. The mapping method contains the conventional DFT method as a special case. In other words, it can be treated as a generalization of the DFT. Several simple realizations of the mapping method are also newly proposed as a single‐input and two‐output digital mapping filter in both nonrecursive and recursive forms. The recursive realization being able to decrease drastically computing load utilizes the normal form that is robust to finite word length effects. As an application of the proposed mapping method, inverter‐using power control system connected with a single‐phase grid is shown. All analytical results are verified by numerical experiments and the usefulness of the newly proposed mapping method is confirmed. © 2007 Wiley Periodicals, Inc. Electr Eng Jpn, 160(1): 27–38, 2007; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20263     

A comparative study on using linear programming and simulated annealing in the optimal realization of a SC filter

The switched‐capacitor (SC) circuit realization problem is traditionally solved by heuristic algorithms. However, an algorithm‐like simulated annealing (SA) is stochastic, and its behavior in solving a non‐convex optimization problem is unpredictable. In this paper, we make an investigation on using a deterministic and a stochastic optimization algorithm for solving the realization problem of the classical Fleischer–Laker SC filter. By considering minimum area as the design goal, we prove that the a linear programming‐based deterministic algorithm is capable of finding a global minimum. With the global optimality established, we then use an SA algorithm to solve the same problem in purpose of investigating the search capability of the SA algorithm. We find that the stochastic SA algorithm cannot always reach a suboptimal solution with quality comparable with the linear programming result. Other issues like convergence speed and the percentage of arriving at the global minimum are examined as well. This research exposes that understanding the underlying optimization problem structure for the realization of SC circuits is of fundamental meaning for developing more efficient heuristic algorithms. Copyright © 2017 John Wiley & Sons, Ltd.     

A passive EMI filter with access to the ungrounded motor neutral line: direct connection of a general‐purpose inverter to a three‐phase grounded voltage source

This paper proposes a small‐sized passive EMI filter for the purpose of eliminating high‐frequency shaft voltage and ground leakage current from an AC motor. The motor is driven by a general‐purpose PWM inverter connected to a three‐phase grounded voltage source. The passive EMI filter requires access to the ungrounded neutral point of the motor. This unique circuit configuration makes the common‐mode inductor effective in reducing the high‐frequency common‐mode voltage generated by the PWM inverter with a carrier frequency of kHz. As a result, both high‐frequency shaft voltage and ground leakage current can be eliminated very efficiently. However, the common‐mode inductor may not play any role in reducing the low‐frequency common‐mode voltage generated by the diode rectifier, so that a low‐frequency component still remains in the shaft voltage. Such a low‐frequency shaft voltage may not produce any bad effect on motor bearings. The validity and effectiveness of the EMI filter are verified by experimental results obtained from a 200‐V 5‐kVA laboratory system. © 2007 Wiley Periodicals, Inc. Electr Eng Jpn, 159(2): 80–87, 2007; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20243