Effect of SiO2/Si interface roughness on gate current

In many theoretical investigations of the electric-tunnel effect through an ultrathin oxide in metal-oxide-semiconductor (MOS) structure, it is commonly assumed that the oxide is of uniform thickness. One example of nonuniformity in oxides is interface roughness. Interface roughness effects on direct tunneling current in ultrathin MOS structures are investigated theoretically in this article. The roughness at SiO₂/Si interface is described in terms of Gauss distribution. It is shown that the transmission coefficient increases with root-mean-square (rms) roughness increasing, and the effect of rms roughness on the direct tunneling current decreases with the applied voltage increasing and increases with rms roughness increasing.     

The doped Si/SiO2 interface

A study is reported of the influence of dopant atoms on the SiSiO₂ interface states of thermally oxidized silicon. It was found that acceptor or donor atoms induce interface states and oxide charges. The effect is largest in the case of acceptor dopants and is independent of the doping process. The influence of the dopant atoms on oxide charge is probably related to the different segregation coefficients of acceptors and donors.     

SiSiO2 interface state spectroscopy using MOS tunneling structures

This paper provides a critical review and classification of the studies of SiSiO₂ interface state parameters and energy distributions by means of MOS tunneling in structures with ultrathin SiO₂ layers (10–100 Å). Suggestions are made of experiments that will help to elucidate the importance of materials and processing conditions on these states, and to separate the various mechanisms involving charge exchange with the metal, the conduction band, and the valence band of the semiconductor.     

Laser-induced self-organization of nano-wires on SiO2/Si interface

Original observation of new graded band gap structures formed on the surface of elementary Si semiconductor at studying the optical properties of Si nano-hills formed at the SiO₂/Si interface by pulsed Nd:YAG laser irradiation is reported. The self-organized nano-hills on Si surface are characterized by a strong photoluminescence in the visible range of spectrum with a shoulder extended to the long-wave part of the spectrum. The feature is explained by the quantum confinement effect in nano-hills-nano-wires of gradually changing diameter.     

Characterising the surface roughness of AFM grown SiO2 on Si

The reliability of AFM grown SiO₂ as a gate oxide needs to be examined if nanodevices fabricated from the oxide are to be integrated into standard microelectronic technology. In this article we present our preliminary results on AFM fabrication and topographical characterisation of large area oxide, electrical characterisation is to follow. Roughness is the central issue of this work due to its importance in relation to the quality of ultra thin dielectrics.     

Charge-pumping characterization of SiO2/Si interface invirgin and irradiated power VDMOSFETs

The applicability of charge-pumping technique to characterize the oxide/silicon interface in standard power Vertical Double-diffused (VD)MOS transistors is studied. Qualitative analysis of the charge-pumping threshold and flat-band voltage distributions in the VDMOS structure, supported with rigorous transient numerical modeling of the charge-pumping effect, shows that the measurements can be carried out in the subthreshold region. This conclusion is confirmed by various experimental results. The characteristics, i.e. charge-pumping current versus gate top level, is studied in detail. The changes in the characteristics after γ-ray irradiation are analyzed. A charge-pumping-based method for separate extraction of interface state density and density of charge trapped in the oxide after irradiation of VDMOSFETs is proposed. The validity and limitations of the method are studied by experiments and modeling     

The influence of mobile ions on the Si/SiO2 interface traps

An investigation of the relation between mobile ions and interface traps was carried out, using an appropriate technique to determine the number and type of mobile ions. It was found that mobile ions do not cause interface traps in the middle 0.8 eV of the bandgap. It appears that interface traps are rather caused by some stress effect. The results are considered in light of previously reported work.     

Flat-field spectrograph in SiO2/Si

The operation of a flat-field spectrograph in silica glass on silicon (SiO₂/Si) as a demultiplexer with 4-nm channel spacing in the 1.5-μm waveguide length region is demonstrated. The concept allows fabrication tolerances to be compensated simultaneously with the adjustment of fan-out. Fiber-to-fiber insertion loss of 10.1 dB and crosstalk attenuation >15 dB have been achieved     

SiSiO2 interface states based on optically activated conductance technique

Experimental technique recently developed by Poon and Card has been used to determine the energy distribution of the interface states at the SiSiO₂ interface using AlSiO₂nSi structure with an oxide thickness $\text{?38}\text{A}\text{?}$. The distribution obtained in the band gap of silicon was distorted U-shaped. The distortion in the lower half of the band gap was more pronounced. Surface state density in the structure studied was of the order of 10¹²/cm² eV.     

Evaluation of Qbd for electrons tunneling fromthe Si/SiO2 interface compared to electron tunneling from thepoly-Si/SiO2 interface

Electrical time-to-breakdown (TTB) measurements have shown the charge to breakdown Q_bd of gate oxide capacitors fabricated on n-type well (n-well) substrates always to be higher than that of capacitors on p-type well (p-well) substrates on the same wafer when both are biased into accumulation under normal test conditions. Here the authors correlate the higher n-well Q_bd to smooth capacitor oxide/substrate interfaces and minimized grain boundary cusps at the poly-Si gate/oxide interfaces, confirming that Fowler-Nordheim tunneling is the dominant current conduction mechanisms through the oxide. They correlate higher Q_bd to higher barrier height for a given substrate type and observe that the slope of the barrier height versus temperature plot is lower for both p-well and n-well cases with electrons tunneling from the silicon substrate. This is attributed to surface roughness at the poly-Si gate/SiO₂ interface. A poly-Si gate deposition and annealing process with clean, smooth oxide/substrate interfaces will improve the p-well breakdown characteristics and allow higher Q_bd to be achieved     

SOI planar photonic crystal fabrication: Etching through SiO2/Si/SiO2 layer systems using fluorocarbon plasmas

Dry plasma etching of sub-micron structures in a SiO₂/Si/SiO₂ layer system using Cr as a mask was performed in a fluorocarbon plasma. It was determined that the best anisotropy could be achieved in the most electropositive plasma. A gas composition yielding the desired SOI planar photonic crystal structures was optimized from the available process gases, Ar, He, O₂, SF₆, CF₄, c-C₄F₈, CHF₃, using DC bias data sets. Application of the c-C₄F₈/(noble gas) chemistry allowed fabrication of the desired SOI planar photonic crystal. The average etching rates for the pores and ridge waveguide regions were about 71 and 97 nm/min, respectively, while the average SiO₂/Si/SiO₂ to Cr etching selectivity for the ridge waveguide region was about 33:1 in case of the c-C₄F₈/90%Ar plasma with optimized parameters.     

Effects of nitrogen annealing on electron scatterings in SiSiO2 interface

The effective mobility of electrons at Si (100) surfaces was measured as a function of electron density N_s = 5 × 10¹¹?1 × 10¹³ cm^?2 at 4.2K for samples with and without annealing (10 min–2 hr) in nitrogen gas at 1000°C after wet thermal oxidation. A great part of the scattering by Coulomb and short-range potentials was reduced by a short (～10 min) anneal time, although the subsequent annealing resulted in a slight increase in the number of the scatterers. On the other hand, scattering by a surface roughness potential was reduced with increase in the anneal time. These scattering effects associated with N₂ annealing are discussed.     

在SiO2中掺A1对Au／纳米（SiO2／Si／SiO2）／p—Si结构电致发光的影响

利用射频磁控溅射方法,制成纳米SiO2层厚度一定而纳米Si层厚度不同的纳米（SiO2/Si/SiO2）/p-Si结构和纳米（SiO2:A1/Si/SiO2:A1)/p-Si结构,用磁控溅射制备纳米SiO2:A1时所用的SiO2/A1复合靶中的A1的面积百分比为1%。上述两种结构中Si层厚度均为1-3nm,间隔为0.2nm。为了对比研究,还制备了Si层厚度为零的样品。这两种结构在900℃氮气下退火30min,正面蒸半透明Au膜,背面蒸A1作欧姆接触后,都在正向偏置下观察到电致发光（EL）。在一定的正向偏置下,EL强度和峰位以及电流都随Si层厚度的增加而同步振荡,位相相同。但掺A1结构的发光强度普遍比不掺A1结构强。另外,这两种结构的EL具体振荡特性有明显不同,对这两种结构的电致发光的物理机制和SiO2中掺A1的作用进行了分析和讨论。     

Visible light emitting Si/SiO2 superlattices

Six-period superlattices of Si/SiO₂ have been grown at room temperature using molecular beam epitaxy. With this mature technology, the ultra-thin (1–3 nm) Si layers were grown to atomic layer precision. These layers were separated by 1 nm thick SiO₂ layers whose thickness was also well controlled by using a rate-limited oxidation process. The chemical and physical structures of the multilayers were characterized by cross-sectional TEM, X-ray diffraction, Raman spectroscopy, Auger sputter-profile, and X-ray photoelectron spectroscopy. The analysis showed that the Si layer is free of impurities and is amorphous, and that the SiO₂/Si interface is sharp (0.5 nm). Photoluminescence (PL) measurements were made at room temperature using 457.9 nm excitation. The PL peak occurred at wavelengths across the visible range for these multilayers. The peak energy position E was found to be related to the Si layer thickness d by E (eV) = 1.60+0.72d⁻² in accordance with a quantum confinement mechanism and the bulk amorphous-Si band gap.     

An epitaxial Si/SiO2 superlattice barrier

An epitaxial strain layer Si/SiO₂ superlattice barrier (SLSB) for silicon formed by monolayers of adsorbed oxygen, sandwiched between adjacent thin silicon layers deposited with molecular beam, showed good epitaxy with an effective barrier height of 1.7 eV. Such a barrier should be important for future quantum devices in silicon, as well as new applications in conventional MOS technology.     

Evolution of surface-states density of Si/wet thermal SiO2 interface during bias-temperature treatment

Evolution of Si/SiO₂ surface state density during a negative bias temperature treatment is reported. Two kinds of surface state are observed and their evolution is studied with the oxidation conditions, the type of the substrate and a preliminary electronic irradiation as parameters. A qualitative model is proposed to explain the observed results.     

An experimental determination of the carrier lifetime near the SiSiO2 interface

Leakage currents in phosphorus-gettered (111) silicon have been studied at room temperature using a MOS gate-controlled diode structure. The leakage current and the gate-substrate capacitance have each been measured as a function of gate voltage for different values of reverse bias. From these measurements the carrier lifetime in the depletion region near the SiSiO₂ interface has been deduced. It is found that the lifetime decreases with distance from the interface; an explanation for this is suggested.     

Novel low-temperature C-V technique for MOS doping profiledetermination near the Si/SiO2 interface

An inverse modeling technique for doping profile extraction from MOS C-V measurements is presented. The method exploits the “kink” effect observed near flat bands in low-temperature C-V curves to accurately estimate the dopant concentration at the oxide-silicon surface. The inverse modeling approach, based on a self-consistent Schrodinger-Poisson solver, overcomes the limitations of previous analytical methods. The accuracy of the doping extraction is demonstrated by successfully reconstructing doping profiles from simulated C-V curves, including abrupt variations of doping in the vicinity of the oxide interface. When applied to experimental data from boron- and phosphorus-doped samples, the technique is shown to provide a substantial improvement in resolution with respect to room-temperature C-V measurements     

Interface states in SiSiO2 interfaces

Interface state parameters were studied in MOS capacitors over a wide range of energy by conductance and capacitance measurements at various temperatures from room temperature to liquid nitrogen temperature. A new technique was developed for analysis of the data which allows to obtain the density of states, the capture cross section, the surface potential and the dispersion parameter from the conductance and capacitance vs. frequency curves. The density of interface states as well as the electron capture cross section were found to be a function of energy only and to be independent of temperature. Maxima in the density of states have not been found.     

Electroluminescence from Au/Si/SiO2/p-Si structure

Si/SiO₂ films have been grown using the two-target alternation magnetron sputtering technique. The thickness of the SiO₂ layer in all the films was 8 nm and that of the Si layer in five types of the films ranged from 4 to 20 nm in steps of 4 nm. Visible electroluminescence (EL) has been observed from the Au/Si/SiO₂/p-Si structures at a forward bias of 5 V or larger. A broad band with one peak 650–660 nm appears in all the EL spectra of the structures. The effects of the thickness of the Si layer in the Si/SiO₂ films and of input electrical power on the EL spectra are studied systematically.