计算机网络可靠性优化设计问题研究

文章首先对计算机网络可靠性的特点进行了分析,随后介绍了影响计算机网络可靠性的因素,指出用户使用的设备、网络拓扑结构以及交互设备等对网络的可靠性有重要影响。在这些因素进行具体分析之后,文章提出了提高计算机网络可靠性的准则,并依据准则提出了合理性建议。     

Self-consistent design issues for high frequency Cu interconnect reliability incorporating skin effect

This paper presents a self-consistent method to guide high frequency reliability design for a two-level Cu interconnect structure, incorporating the impact of skin effect. A skin-effect-related parameter “Effective Cross Section Area” is introduced to make a more precise prediction of interconnects’ thermal profile due to self-heating. Since via and contact interfaces in Cu interconnects are at the highest risk of failure, via temperature is used to calculate the interconnect stress evolution and lifetime. From the research of the interconnect structure stressed by a type of arbitrary rectangular alternating current, we notice that the direction of the average current must be taken into account, while that consideration is not involved in self-consistent design for Al interconnects. We also found that generally, temperature, current density/intensity, frequency, and duty cycle are four specifications that restrict one another in high frequency interconnect reliability design, and if one increases, interconnects’ tolerance of the other three will decrease.     

Performance issues in the design of dynamically controlledcircuit-switched networks

The evolution of circuit-switched networks is analyzed with respect to the functional innovations that allowed for new traffic controls. The technical alternatives for routing techniques and their integration with congestion and flow control are considered. The performance of dynamically controlled networks is analyzed in the framework of research done at the Centre National d'Etudes des Telecommunications (CNET) together with studies carried out in other research laboratories. Comparisons are made of dynamic routing versus fixed hierarchical routing and time-dependent routing versus adaptive routing. For adaptive routing, centralized and isolated methods are compared. The benefits of advanced control methods are summarized     

New reliability indices for topological design

Starting from the establishment of the correlation between computer communication network reliability and the topological parameters of its associated graph, an original heuristic method is proposed in order to optimize the networks by using new topological indices of reliability.     

机载激光器的可靠性设计

本文简要论述了影响机载激光器可靠性的诸因素,以可靠性理论为基础,对机载激光器的可靠性进行分析,提出了六项可靠性设计措施,并对某设计定型的机载激光器的可靠性进行了预计以及试验。     

Yield and reliability issues in nanoelectronic technologies

Integrated circuits have known a constant evolution in the last decades, with increases in density and speed that follow the rates predicted in Moore’s law. The tradeoffs in area, speed and power, allowed by theCmos technology, and its capacity to integrate analog, digital and mixed components, are key features to its dissemination in the telecommunications field. In fact, the progress of theCmos technology is an important driver for telecommunications evolution, with the continuous integration of complex functions needed by demanding applications. As integrated circuits evolve, they approach some limits that make further improvements more difficult and even unpredictable. With deep-submicron structures, the yield of manufacturing processes is one of the main challenges of the semiconductor industry, with negative impacts on time-to-market and profitability. With reduced voltages and increased speed and density, the reliability of deep-submicron circuits is another concern for designers, since noise immunity is reduced and thermal noise effects show-up. In this paper we present an overview of the issues related with the scaling of integrated circuits into nanometer technologies, detailing the yield and reliability problems. We present the state of the art in proposed solutions and alternatives that can improve the chances of a large utilization of these nanotechnologies.     

Computer-communication network reliability: Trends and issues

People working in Computer-communication networks usually distinguish between the entire system and the communications subnet. The former includes the latter plus the terminals, devices and computer intercommunication via the subnet. This logically includes the resident processes that control or interface with the subnet. Greater computer communication network reliability can obviously be achieved by maximizing the reliability of its constituent components i.e. hardware, software, and communication network. The network reliability can be improved by exploiting the redundancies that are either inherent due to network topology or can be provided in the network. This paper presents a comprehensive discussion of issues involved and trends prevailing in producing reliable hardware; reliable software; and reliable computer communication network while reviewing techniques available for preventing, detecting, diagnosing, correcting and recovering from malfunctions.     

Genetic algorithms for reliability design problems

This paper presents genetic algorithms for solving various reliability design problems, which include series systems, series–parallel systems and complex (bridge) systems. The objective is to maximize the system reliability, while maintaining feasibility with respect to three nonlinear constraints, namely, cost and weight constraints, and constraints on the products of volume and weight. In this paper, mixed-integer reliability problems are studied. Numerical examples show that genetic algorithms perform well for all the reliability problems considered in this paper. In particular, as reported, some solutions obtained by genetic algorithms are better than previously best-known solutions.     

Optimal design for software reliability and development cost

A process for reliability-related quality programming is developed to fill existing gaps in software design and development so that a quality programming plan can be achieved. The tradeoffs among system reliability improvement, resource consumption, and other relevant constraints through the management phase are investigated. A software reliability-to-cost relation is developed both from a software reliability-related cost model and from software redundancy models with common-cause failures. A generic N-component redundancy model is also developed. The software reliability optimization problems can be formulated into a mixed-integer programming problem     

Submicrometer device design for hot-electron reliability and performance

Hot-electron stressing effect on different lightly doped drain device (LDD), As/P, and conventional As source/drain device structures are investigated. Increasing the overlap between the gate and drain is found to reduce hot-electron degradation significantly when stressed under the same substrate current level. By increasing the gate-to-drain overlap, it is possible to design LDD and As/P devices with a shorter n-region and still have good hot-electron reliability. These devices have better current drive and are scalable down to the submicrometer region. The As/P device with a short n-region is a good candidate for a submicrometer VLSI device because of the simplicity in processing, the good device performance, and the low susceptibility to hot-electron degradation.     

Performance issues and algorithms for dynamic channel assignment

Using dynamic channel assignment (DCA) algorithms to select communications channels as needed, time-division multiple access (TDMA) or frequency-division multiple access (FDMA) systems can serve dynamic and nonuniform traffic demands without frequency planning as long as quality is sufficient and equipment is available. Here, performance issues and algorithms for DCA in a TDMA portable radio system are considered. A fixed number of traffic servers (time slots) per radio port is assumed: therefore, the system capacity is hard-limited by the equipment availability, and the DCA efficiency is compared mainly through the signal-to-interference ratio in both the uplink and downlink directions     

红外探测器杜瓦非概率可靠性设计方法

杜瓦是大面阵红外焦平面探测器组件的重要组成部分,为其提供光学、机械、热学和电学接口,因此对该杜瓦结构的可靠性有较高要求。由于此类产品样本数极少,传统的基于概率模型的可靠性设计方法在理论和应用上均存在较大的问题。有鉴于此,提出了基于区间分析的结构非概率可靠性模型,并将所建模型用于大面阵红外焦平面探测器杜瓦结构的可靠性优化设计。研究结果表明,非概率可靠性设计方法只要求已知设计参数的界限,而不要求其具体的分布形式,所需数据较少,特别适用于小子样大面阵红外焦平面探测器杜瓦的可靠性设计。     

Information routing and reliability issues in distributed sensornetworks

Communication issues and problems in information routing in distributed sensor networks (DSNs) are considered. Two important communication constraints, viz., the delay constraint and the reliability constraint, are identified, and their impact on information routing is discussed. It is shown that the maximum end-to-end delay in a network depends on the diameter of the network, and efficient distributed algorithms are presented to determine the diameter of asynchronous networks. A distributed algorithm that determines the diameter of an asynchronous tree network when an arbitrary node in the network initiates the algorithm is introduced. An efficient algorithm for determining the diameter when multiple nodes initiate the algorithm is presented. An algorithm to determine the diameter of arbitrary networks is presented, and its message complexity is shown. Effects of link/node failures on network delay are studied, and important network structure design criterion are discussed. The distributed, dynamic routing algorithms are reviewed, and their adaptation to DSN environments is discussed     

Saw devices: Space qualification and reliability issues

This paper summarizes the current U.S. military space qualification requirements as well as other qualification standards required for SAW components. A new testing procedure is proposed which will significantly cut the qualification costs while still providing a reliable product for space applications.     

RF-MEMS switch design optimization for long-term reliability

This contribution presents an optimization strategy for the mechanical and geometrical characteristics of clamped–clamped dielectric-less RF-MEMS switches in order to enhance their reliability performances both in terms of switch properties control and long-term actuation behavior. The modifications mainly affect the switch membrane, which is made more robust, and the stopping pillar dimensions, while the switch dimensions are practically unaffected. In the case of the proposed ohmic switch, also the mobile contact region was redesigned in order to increase the contact force. Experimental measurements have demonstrated that the optimized version of the capacitive switch investigated shows an improved resistance to high bias voltages (up to 90 V), while the optimized ohmic switch shows a lower, more stable and more reproducible contact resistance. Long-term actuation measurements are analyzed in detail, proposing a model to evaluate the switch lifetime, which was found of the order of few years in the more conservative estimate in the case of capacitive switches. The lifetime estimates are less precise in the case of ohmic switches, mainly because the contact instability sums up with the charging contribution. In spite of the improved switch general properties, lifetime is however not increased with optimization. The most likely explanation is that the optimization strategy was aimed at reducing charge injection and charge non-uniformity, but other effects can be important in lifetime determination.     

Current reliability issues and future technologies for systems on silicon – processes, circuits, chip architecture, and design

The progress of silicon technology is opening the era of “systems on silicon” in which a large-scale memory, a CPU, and other logic macros will be integrated on a single chip. These kinds of chips, called system LSIs, have an especially promising future in mobile and multimedia applications but face inherent technical problems related to the reliability of ultrathin oxide film, conflict in the processing of different components, increased gate and subthreshold leakage currents, memory bottlenecks, and design complexity. This paper reviews the system LSIs and then introduces related technologies in processing, circuits, chip architecture, and design. It also discusses the influence of the system LSIs on business strategies.     

Fundamental design issues for the future Internet

The Internet has been a startling and dramatic success. Originally designed to link together a small group of researchers, the Internet is now used by many millions of people. However, multimedia applications, with their novel traffic characteristics and service requirements, pose an interesting challenge to the technical foundations of the Internet. We address some of the fundamental architectural design issues facing the future Internet. In particular, we discuss whether the Internet should adopt a new service model, how this service model should be invoked, and whether this service model should include admission control. These architectural issues are discussed in a nonrigorous manner, through the use of a utility function formulation and some simple models. While we do advocate some design choices over others, the main purpose here is to provide a framework for discussing the various architectural alternatives     

Cu/low-k dielectric TDDB reliability issues for advanced CMOS technologies

With the wide application of low-k and ultra-low-k dielectric materials at the 90 nm technology node and beyond, the long-term reliability of such materials is rapidly becoming a critical challenge for technology qualification. Low-k time-dependent dielectric breakdown (TDDB) is usually considered as one of the most important reliability issues during Cu/low-k technology development because low-k materials generally have weaker intrinsic breakdown strength than traditional SiO₂ dielectrics. This problem is further exacerbated by the aggressive shrinking of the interconnect pitch size due to continuous technology scaling. In this paper, three critical issues of low-k TDDB characteristics during low-k development and qualification will be reviewed. In the first part, a low-k TDDB field acceleration model and its determination will be discussed. In the second part, low-k dielectric time-to-breakdown (t_BD) statistical distribution and TDDB area scaling law for reliability projection will be examined. In the last part, as low-k TDDB has been found to be sensitive to all aspects of integration, the effects of process variations on low-k TDDB degradation will be demonstrated. Some key aspects which need to be carefully addressed to control overall low-k TDDB performance from process and integration side will be discussed.