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1.
Future satellites for ‘thin route’, mobile and portable services will require group demodulators on board the satellite to take advantage of the cost benefits offered with regenerative architectures. The demodulators will translate FDMA up-links into TDM down-links. This paper describes the measured performance of a 24-channel multi-carrier (64 kb/s QPSK for each carrier) group demodulator which uses SAW chirp Fourier transform (CFT) processing. The recovered data are combined into a single TDM bit stream at the standard T1 rate of 1.544 Mb/s. The 40 dB side-lobe suppression obtained in the CFT has resulted in less than 0.35 dB combined interference degradation achieved with all channels active. The added degradation over Olympus with a saturated up-link amplifier is less than 1 dB.  相似文献   

2.
The increasing complexity of VLSI digital systems has dramatically supported system-level representations in modeling and design activities. This evolution makes often necessary a compliant rearrangement of the modalities followed in validation and analysis tasks, as in the case of power performances estimation.Nowadays, transaction-level paradigms are having a wider and wider consideration in the research on electronic system-level design techniques. With regard to the available modeling resources, the most relevant framework is probably the transaction-level extension of the SystemC language (SystemC/TLM), which therefore represents the best platform for defining transaction-level design techniques.In this paper we present a macro-modeling power estimation methodology valid for SystemC/TLM prototypes and of general applicability. The present discussion illustrates the implementation modalities of the proposed approach, verifying its effectiveness through a comparison with RTL estimation techniques.  相似文献   

3.
Transaction-Level models have emerged as an efficient way of modeling systems-on-chip, with acceptable simulation speed and modeling accuracy. Nevertheless, the high complexity of current architectures and bus protocols make it very challenging to develop and verify such models. This paper presents the transaction-level models developed at IBM for PowerPC and CoreConnect-based systems. These models can be simulated in a SystemC environment for functional verification and power estimation. Detailed transaction-based power models were developed. Comparisons between the simulated models and real hardware resulted in errors below 15% in timing accuracy, and below 11% in power estimation compared against gate-level power. These results demonstrate the efficiency of our transaction-level models for early analysis and design space exploration.  相似文献   

4.
This work describes the radiation performance of a novel concept for direction and location finding, using stationary satellite beacons. The received signals are processed with a monopulse four-element array. The monopulse mode is generated using the phase excitation of the radiating elements. For accurate processing the radiation phase should correspond with the bearing angle around the boresight direction. Phase deviations, however, occur in this phase pattern owing to the discrete excitation of the elements. Therefore, detailed analyses are presented for this phase pattern, its attainable gain and the depolarization effects, in order to select the kind of array elements, and their spacings, which minimize the phase pattern deviations. The dipoles and the slots, as array elements, yield better phase performance, smaller size and simpler structures than horn radiators, at the expense of worse depolarization.  相似文献   

5.
The Burst Time Plan (BTP) generation is the key for resource allocation in Broadband Satellite Multimedia (BSM) system. The main purpose of this paper is to minimize the system response time to users’ request caused by BTP generation as well as maintain the Quality of Service (QoS) and improve the channel utilization efficiency. Traditionally the BTP is generated periodically in order to simplify the implementation of the resource allocation algorithm. Based on the analysis we find that Periodical BTP Generation (P-BTPG) method cannot guarantee the delay performance, channel utilization efficiency and QoS simultaneously, especially when the capacity requests arrived randomly. The Optimized BTP Generation (O-BTPG) method is given based on the optimal scheduling period and scheduling latency without considering the signaling overhead. Finally, a novel Asynchronous BTP Generation (A-BTPG) method is proposed which is invoked according to users’ requests. A BSM system application scenario is simulated. Simulation results show that A-BTPG is a trade-off between the performance and signaling overhead which can improve the system performance insensitive to the traffic pattern. This method can be used in the ATM onboard switching satellite system and further more can be expended to Digital Video Broadcasting-Return Channel Satellite (DVB-RCS) system or IP onboard routing BSM system in the future.  相似文献   

6.
This study is extended to construct the network model, the node model, and the link model of complex communication network for satellite navigation system (CCN‐SNS) based on the hierarchical architecture. Firstly, a method called snapshots was proposed to describe the dynamic topology for CCN‐SNS; secondly, another method was put forward to model the different nodes of the CCN‐SNS; thirdly, the different links between every two different nodes were modeled. Therefore, based on the OPNET tools, a simulation for the CCN‐SNS, which contains the models that proposed earlier used to analyze the navigation accuracy and network transmission performance, was performed.  相似文献   

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