高性能IC版图综合中的互连线时延估计模型

提出了一组适用于高层综合并考虑各种优化技术的互连时延估计模型,包括最优线宽设计(OWS)、缓冲插入和线宽设计(BIWS)。同Spice给出的模拟结果相比,它们能够给出准确的估计。该模型的时间的阶为一常量。因此,这些简单、快速、准确的模型可用于基于性能要求的集成电路逻辑综合和版图规划。     

基于CMOS多功能数字芯片的ESD保护电路设计

基于CSMC 2P2M 0.6 μm CMOS工艺设计了一种ESD保护电路。整体电路采用Hspice和CSMC 2P2M 的0.6 μm CMOS工艺的工艺库(06mixddct02v24)仿真,基于CSMC 2P2M 0.6 μm CMOS工艺完成版图设计,并在一款多功能数字芯片上使用,版图面积为1 mm×1 mm,参与MPW(多项目晶圆)计划流片,流片测试结果表明,芯片满足设计目标。     

SOI集成电路的ESD保护技术研究进展

近年来，随着SOI技术的快速发展，SOI集成电路的ESD保护已成为一个主要的可靠性设计问题。介绍了SOI ESD保护器件方面的最新进展，阐述了在SOI ESD保护器件设计和优化中出现的新问题，并进行了详细的讨论。     

集成电路版图欧拉路径的快速判寻方法

版图欧拉路径法是实现集成电路版图面积最小化的常用方法.讨论了版图欧拉路径与布尔表达式的关系,提出一种版图欧拉路径快速判寻方法.利用该方法,设计了几种典型电路的版图欧拉路径,并运用集成电路设计软件设计其中一种电路,经过优化后的版图面积明显减小.该方法快速、准确、方便,具有广阔的应用前景.     

A New Approach for Built‐in Self‐Test of 4.5 to 5.5 GHz Low‐Noise Amplifiers

This paper presents a low‐cost RF parameter estimation technique using a new RF built‐in self‐test (BIST) circuit and efficient DC measurement for 4.5 to 5.5 GHz low noise amplifiers (LNAs). The BIST circuit measures gain, noise figure, input impedance, and input return loss for an LNA. The BIST circuit is designed using 0.18 μm SiGe technology. The test technique utilizes input impedance matching and output DC voltage measurements. The technique is simple and inexpensive.     

心电采集电路的设计与实现

介绍一种心电采集检测电路的设计,该设计以AD620和OP07为核心元件,针对心电信号的组成和干扰频率范围,进行了分析,对由电极采集到的心电信号,通过前置放大电路将微弱的心电心电信号放大,并通过低通滤波器、高通滤波器、及50Hz陷波电路滤除干扰最后通过后置放大电路进一步放大得到清晰的心电波形。系统具有高输入阻抗、高共模抑制比、低噪声、低漂移、和高信噪比、成本低等优点。     

多输入多输出可见光通信的天线布局研究

通过改变LED及光电探测器(PD)的 空间分布,得到不同的天线布局,同时通过改 变LED间距dTX、发射端和接收端平面的高度差h等条件,得到了不同的信道传输矩阵H,仿 真分析了以上各种情况下的室内可见光通信系统(VLC)的性能。结果表明,影 响VLC性能的关键参数包含最小欧式距 离dmin和行列式Det(H)。根据系统的关键 参 数,将天线布局分为圆形布局和格点布局两类,圆形布局是指所有LED或PD均 匀地分布在一个 圆上,而格点布局是指所有LED或PD均分布在二维平面中的格点上。仿真结果表明,当dTX变化时,在采 用圆形布局的系统中,行列式Det(H)是影响误码率(BER)的关键因素 ;在采用格点布局的系统中,dmin和Det( H)均是影响系统误码率的关键因素,但在d TX的一定范围内dmin是决定系统性能的关键因素 。而当h发生变化时Det(H)是影响系统性能的 关键因素。     

集成电路互连线电迁移测试方法与评价

介绍了研究集成电路互连线电迁移的两种方法：加速寿命试验和移动速度试验。对加速寿命试验进行了分析和评价。分析表明,加速寿命试验方法存在高应力条件与正常工作条件下互连线电迁移中金属离子扩散机制不同、BLACK方程的使用范围有限、受试件特殊结构影响和电阻温度系数TCR随温度变化等问题。介绍了一种改进方法。详细介绍了移动速度试验,指出了其在互连线电迁移研究中的应用。     

Layout preferences concerning matching in a fully differential ΔΣ modulator design

A fully differential architecture has numerous advantages in a switched-capacitor delta-sigma modulator such as immunization to clock-induced noise, supply rejection, simple sign conversion of integrator gain and doubled output dynamic range. Efficient use of the fully differential architecture nevertheless requires a completely symmetrical layout and routing, which may contradict with the requirements of component matching. Some design choices have to be made at this point, depending on what requirements can be compromised. This paper discusses the importance of certain layout features which may serve as a guide in making these design choices. Hakan Binici was born in Istanbul, Turkey, in 1969. He received his B.Sc. and M.Sc. degrees respectively from Istanbul Technical University and the Bogazici University in Istanbul in 1989 and 1995. Since 1997 he has been working as a research scientist at the Electronics Laboratory of the University of Oulu in Finland. He is currently continuing his research towards a Ph.D. His research interests focus on low-voltage, low-power analog VLSI systems and ΔΣ modulators. Juha Kostamovaara received the degrees of Dipl. Eng, Licentiate of Tech. and Doctor of Tech. in electrical engineering in 1980, 1982 and 1987, respectively, all from the University of Oulu, Finland. He was Acting Associate Professor of Electronics in the Department of Electrical Engineering at the University of Oulu in 1987–1993, and was nominated Associate Professor from the beginning of 1993. During 1994 he worked as an Alexander von Humboldt Scholar at the Technical University of Darmstadt, Germany. In 1995 he was invited to become full Professor of Electronics at the University of Oulu, where he is currently also head of the Electronics Laboratory. Prof. Kostamovaara's main interest is in the development of high-speed electronic circuits and systems and their applications in electronic and optoelectronic measurements and radio mobile telecommunications. An erratum to this article can be found at     

基于异常控制流识别的漏洞利用攻击检测方法

为应对APT等漏洞利用攻击的问题,提出了一种基于异常控制流识别的漏洞利用攻击检测方法.该方法通过对目标程序的静态分析和动态执行监测,构建完整的安全执行轮廓,并限定控制流转移的合法目标,在函数调用、函数返回和跳转进行控制流转移时,检查目标地址的合法性,将异常控制流转移判定为漏洞攻击,并捕获完整的攻击步骤.实验结果表明,该方法能够准确检测到漏洞利用攻击,并具备良好的运行效率,可以作为漏洞利用攻击的实时检测方案.     

A tool for the automatic generation and analysis of regular analog layout modules

This paper describes the characteristics of a new CAD tool that enables the creation of layout libraries of selected analog modules. This Analog Modules Generator (AMG) automatically creates multiple layout versions of two commonly used analog structures: the differential pair and arrays of series-connected or stacked devices, for the subsequent generation of layout libraries. Based on the number of devices and rows defined by the user for the layout implementation, the tool validates all possible implementations, which are later saved in a database. Additionally, an extraction process can be optionally executed over all the layout views saved in the database. The AMG generates several reports with all the characteristics of the implemented layouts, including area and parasitic components, facilitating further statistical processing. We describe the features and capabilities of the proposed AMG tool, and several test cases are presented. Results show that suitable layout implementations can be achieved by layout and circuit designers in a very reduced amount of time.     

长轨检测超声换能器驱动电路的设计

鉴于超声换能器(换能器)传统驱动电路中存在发射效率低,激励信号有拖尾的问题,该文提出了一种改进型驱动电路方案。首先,对换能器匹配和激励信号拖尾吸收的理论进行说明,并从匹配和拖尾吸收等方面综合考虑对驱动电路进行改进;其次,采用一发一收的机制,在600m60型钢轨上搭建实验平台,并对传统无匹配、有匹配驱动电路和该文设计的驱动电路的性能进行对比。实验结果表明,与传统无匹配驱动电路相比,改进型驱动电路消除了激励信号拖尾且波形光滑,接收信号中心频点相对幅值提高了98.97%;与传统有匹配驱动电路相比,改进型驱动电路消除了激励信号拖尾且波形光滑,接收信号中心频点相对幅值提高了50.45%。     

An improved method for high-curvature detection with applications to automated inspection

Digital curve acquisition with a vision system introduces a large amount of degradation. At the same time ‘corners’ convey important visual information. Unfortunately they are found in the same spectral domain as the quantization noise. Low-pass filtering of the curvature function is compared with more sophisticated methods that keep the angles ‘sharp’. An automated inspection is successfully performed, demonstrating the efficiency of a new method.     

分级式设计规则检查的实用化研究

针对分级式设计规则检查的实用化所面临的一系列问题，如效率问题，伪错问题以及进一步优化等。分析限产生这些问题的原因和版图的结构特点，提出了上应的解决方案和改进措施。     

MOSFET的驱动保护电路的设计与应用

率场效应晶体管由于具有诸多优点而得到广泛的应用;但它承受短时过载的能力较弱,使其应用受到一定的限制。分析了MOSFET器件驱动与保护电路的设计要求;计算了MOSFET驱动器的功耗及MOSFET驱动器与MOS-FET的匹配;设计了基于IR2130驱动模块的MOSFET驱动保护电路。该电路具有结构简单,实用性强,响应速度快等特点。在驱动无刷直流电机的应用中证明,该电路驱动能力及保护功能效果良好。     

一种解决版权问题的数字水印方案

大部分水印技术侧重于水印的不可见性和稳健性,而版权保护问题并未得到真正解决。该文提出的数字水印方案可以有效地解决这一问题。通过一种新颖的水印构造方法,有效地消除了在解决版权问题中对使用原始图像的限制。盲与非盲水印检测时水印的不可见性和稳健性均得到很大提高。实验结果证明该数字水印方案对于版权攻击是有效的,对各种失真都具有较强的稳健性。     

Temporal matching prior network for vehicle license plate detection and recognition in videos

In real‐world intelligent transportation systems, accuracy in vehicle license plate detection and recognition is considered quite critical. Many algorithms have been proposed for still images, but their accuracy on actual videos is not satisfactory. This stems from several problematic conditions in videos, such as vehicle motion blur, variety in viewpoints, outliers, and the lack of publicly available video datasets. In this study, we focus on these challenges and propose a license plate detection and recognition scheme for videos based on a temporal matching prior network. Specifically, to improve the robustness of detection and recognition accuracy in the presence of motion blur and outliers, forward and bidirectional matching priors between consecutive frames are properly combined with layer structures specifically designed for plate detection. We also built our own video dataset for the deep training of the proposed network. During network training, we perform data augmentation based on image rotation to increase robustness regarding the various viewpoints in videos.     

用于数字闭环加速度计的差动电容检测电路

数字闭环加速度计是加速度计领域最新的研究课题,它具有直接输出数字信号、累积误差小,采样时间短等优点,因此对差动电容检测电路的要求也很高。本文为满足数字闭环加速度计的需要设计的单载波调制解调型差动电容检测电路,分析了方案优缺点,给出了系统和检测电路的原理框图,以及各个功能模块的电路图和传递函数,最后通过实验验证,得到该电路满足灵敏度高,分辨性能好的要求,并且该电路在其他微弱信号检测领域也具有一定的实用意义。     

一种RFID标签天线视觉检测方法与实现

在此提出了一种RFID电子标签天线瑕疵逐片高速检测方法。该方法对工业相机拍摄的RFID天线图像进行模板图像与目标图像的对齐,利用图像差分输出两者的残余图像,通过对残余图像进行连通域分析实现对天线图像的高精度瑕疵检测。本检测方法的精度可达2×2 pixels,并已成功应用到RFID天线检测设备上,天线瑕疵尺寸检测精度可达0.2 mm×0.2 mm。     

前置放大电路中噪音的抑制方法

在自动测控和通信系统的调试、维修时,必然会遇到多种噪声.为了揭示噪声的根源,采用实验的手法,去观察、分析前置放大电路关键点电压及信号的波形,根据前置放大电路内部结构与实际需要,优化电路的结构,采用优质半导体元器件、光电耦合器和耦合变压器来抑制噪声.实践中,使用这些措施,避免了自控、通信设备信号失真大、共模干扰强,线性差、带宽窄、隔离性能不良等缺点,对提高设备的性能达到了事半功倍的效果.