A High-Quality Rectifier Based on Sheppard–Taylor Converter Operating in Discontinuous Capacitor Voltage Mode

This paper presents a single-phase soft-switched high power factor (PF) Sheppard-Taylor rectifier suitable for applications requiring low-voltage and high-current output. The proposed rectifier is designed to operate at discontinuous capacitor voltage mode. The Sheppard-Taylor converter in this mode of operation provides zero-voltage turnoff switching, as well as natural input PF correction over a wide range of input voltage, which makes the converter suitable for universal input applications. Due to its simplified control circuitry and reduced switch current stress, this converter presents better efficiency and higher reliability. In addition, the presented converter features continuous input-output currents, which result in low electromagnetic interference emission. Principle of operation, theoretical analysis, and experimental results from a laboratory prototype rated at 45 W/10 Vdc output voltage are presented. The measured efficiency and total harmonic distortion of the input line current were 85% and 3.2%, respectively. The input current harmonics meet the EN61000-3-2 Class D requirements.     

Single-stage single-switch isolated PFC regulator with unity powerfactor, fast transient response, and low-voltage stress

In this paper, a simple control method is presented for a single-stage single-switch isolated power-factor-correction (PFC) regulator that can simultaneously achieve unity power factor and fast output voltage regulation while keeping the voltage stress of the storage capacitor low. The converter topology comprises essentially a cascade combination of a discontinuous-mode boost converter and a continuous-mode forward converter. The proposed control utilizes variation of both duty cycle and frequency. The role of varying the duty cycle is mainly to regulate the output voltage. Changing the frequency, moreover, can achieve unity power factor as well as low-voltage stress. Basically, the switching frequency is controlled such that it has a time periodic component superposed on top of a static value. While the time periodic component removes the harmonic contents of the input current, the static value is adjusted according to the load condition so as to maintain a sufficiently low-voltage stress across the storage capacitor. The theory is first presented which shows the possibility of meeting all three requirements using a combined duty cycle and frequency control. An experimental prototype circuit is presented to verify the controller's functions     

Buck–Boost-Type Unity Power Factor Rectifier With Extended Voltage Conversion Ratio

A buck-boost-type unity power factor rectifier is proposed in this paper. The main advantage of the proposed rectifier over the conventional buck-boost type is that it can perform input power factor correction (PFC) over a wider voltage conversion range. With a single switch, a fast well-regulated output voltage is achieved with a zero-current switch at turn-on. Moreover, the switch voltage stress is independent of converter load variation. The proposed converter is well suited for universal offline PFC applications for a low power range (<150 W ). The feasibility of the converter is confirmed with results obtained from a computer simulation and from an experimental prototype.     

Analysis and design of a single-stage single-switch bi-flyback ac/dc converter

An analysis and design of single-stage, single-switch bi-flyback ac/dc converter is presented. The main flyback stage controls the output power from the link capacitor voltage with Discontinuous Conduction Mode (DCM) or Continuous Conduction Mode (CCM) operation, while an auxiliary flyback stage supplies the power to the output directly from ac line input with DCM operation.

This scheme can effectively reduce the voltage stress on the link capacitor and can achieve the power factor correction (PFC) without a dead band at line zero-crossings, which reduces the harmonic distortion in ac line current. Theoretical analysis of the converter is presented and design guidelines to select circuit components are given. The experimental results on a 60?W (15?V, 4?A), 100?kHz ac/dc converter show that maximum link voltage and maximum efficiency are around 415?V and 82%, respectively. The power factor is above 0.96 under universal line input and load conditions.     

Low-power variable frequency PFC converters

Based on the SinoMOS 1 μm 40 V CMOS process, a novel power factor corrention (PFC) converter with a low-power variable frequency function is presented. The circuit introduces a multi-vector error amplifier and a pro-grammable oscillator to achieve frequency modulation, which provides a rapid dynamic response and precise output voltage clamping with low power in the entire load. According to the external load variation, the system can modulate the circuit operating frequency linearly, thereby ensuring that the PFC converter can work in frequency conversion-mode. Measured results show that the normal operating frequency of the PFC converter is 5-6 kHz, the start-up current is 36 μA, the stable operating current is only 2.43 mA, the efficiency is 97.3%, the power factor (PF) is 0.988, THD is 3.8%, the load adjust rate is 3%, and the linear adjust rate is less than 1%. Both theoretical and practical results reveal that the power consumption of the whole supply system is reduced efficiently, especially when the load varies. The active die area of the PFC converter chip is 1.61×1.52 mm~2.     

Power factor correction converter using delay control

A low cost universal input voltage single-controller power factor correction converter for a 200 W power supply is proposed. It consists of the PFC part followed by a DC-DC converter as in a conventional two-stage scheme. However a single PWM controller is used as in a single-stage PFC scheme. The switch in the PFC part is synchronized with the switch in the DC-DC converter and has a fixed frequency. Employing an adaptive delay scheme, the PPC switch is controlled to limit the capacitor voltage within a desired range for optimum efficiency and to reduce input current harmonic distortion. The design procedures of the delay scheme, the feedback loop, and experimented results are presented to verify the performance     

New single-stage low dc bus voltage stress converter for universal line applications

A new single-stage power factor corrected ac–dc converter for universal line applications is proposed in this paper. This converter has a buck topology as a power factor corrector. The dc bus voltage of the proposed converter is always lower than the peak input voltage at any load condition. Therefore, the problem of high dc bus voltage under the light load condition for the single-stage converter is solved, especially in the case of universal line applications. The design equations are presented for the proposed converter and a design example for a 5V 12A application is presented. The theoretical analysis and experimental results show that the dc bus voltage can be limited within 260V and the line input current harmonics can meet IEC 61000-3-2 Class D requirements at any load conditions for the line input voltages from 90 to 260V_ac.     

A Control Circuit With Load-Current Injection for Single-Phase Power-Factor-Correction Rectifiers

A load-current-injection control technique for boost-derived power-factor-correction (PFC) rectifiers with average current-mode control is proposed in this paper. By adding a load-current loop to the conventional inductor current loop, the output voltage response to load steps is speeded up, almost eliminating the typical voltage overshoots of this kind of converters. Although the techniques based on the load-current injection are traditionally called "load feedforward," this paper shows that an additional feedback loop, which modifies the linear small-signal model of the converter, is also introduced. In order to validate the concept, a converter prototype working from a universal input line has been designed and tested, showing that a very fast dynamic response of PFC rectifiers may be achieved in a cost-effective way     

A single-stage power-factor-correction converter with simple linkvoltage suppressing circuit (LVSC)

A single-stage power-factor-correction AC/DC converter with a simple link voltage suppressing circuit (LVSC) for the universal line application is proposed. A portion of the energy charged in a boost inductor is directly transferred to a load via LVSC without passing the link capacitor. Using simple circuitry, a low link voltage can be realized without input current deadbands at line zero crossings. The proposed converter is analyzed and design guidelines for the proper operation of a converter are given. A universal input (90-265-V_rms ) prototype converter with 5-V 12-A output is implemented to verify performance. The experimental results show that the maximum link voltage stress and efficiency are about 447 V and 81%, respectively. The power factor is above 0.96 under the universal line condition when the load is higher than 30%     

A PFC voltage regulator with low input current distortion derived from a rectifierless topology

This paper presents an ac-dc converter topology for realization of power factor correction (PFC) voltage regulators for applications where the mains frequency is high and a low input current harmonic is required, e.g., in aircraft power systems. The proposed converter represents a minimal configuration consisting of two basic converters, which can be systematically derived from a previously proposed general synthesis procedure for rectifierless ac-dc converters. The proposed PFC converter has incorporated a control method which drastically reduces the circulating power and hence raises the efficiency to a level comparable to existing PFC converters. The proposed PFC converter can completely eliminate any crossover distortion, which can be significant for supply systems having a high mains frequency. In addition, the proposed converter allows bidirectional energy flow ensuring all inductors work in continuous conduction mode hence eliminating the distortion due to the abrupt change of dynamic response when the operating mode changes. Analysis and design of the power and control circuits will be given and discussed. An experimental system will be presented for verification purposes.     

A New PWM-Controlled Quasi-Resonant Converter for a High Efficiency PDP Sustaining Power Module

A new pulsewidth modulation (PWM)-controlled quasi-resonant converter for a high-efficiency plasma display panel (PDP) sustaining power module is proposed in this paper. The load regulation of the proposed converter can be achieved by controlling the ripple of the resonant voltage across the primary resonant capacitor with a bidirectional auxiliary circuit, while the main switches are operating at a fixed duty ratio and fixed switching frequency. Hence, the waveforms of the currents can be expected to be optimized from the view-point of conduction loss. Furthermore, the proposed converter has good zero-voltage switching (ZVS) capability, simple control circuits, no hign-voltage ringing problem of rectifier diodes, no dc offset of the magnetizing current and low-voltage stresses of power switches. Thus, the proposed converter shows higher efficiency than that of a half-bridge LLC resonant converter under light load condition. Although it shows the lower efficiency at heavy load, because of the increased power loss in auxiliary circuit, it still shows the high efficiency around 94%. In this paper, operational principles, features of the proposed converter, and analysis and design considerations are presented. Experimental results demonstrate that the output voltage can be controlled well by the auxiliary circuit using the PWM method.      

中大功率单相功率因数校正器的设计与实现

采用有源功率因数校正技术(active power factor correction,APFC)设计并实现了一款高功率因数、高效率、低谐波、低噪声的"绿色"功率因数校正装置.1700 W样机实验结果表明:所设计的功率因数校正装置能在165～275 V AC宽电压范围内,得到稳定的直流电压输出;输入交流电流能很好的跟踪...     

Voltage and current stress reduction in single-stage power factorcorrection AC/DC converters with bulk capacitor voltage feedback

Single-stage power factor correction (PFC) AC/DC converters integrate a boost-derived input current shaper (ICS) with a flyback or forward DC/DC converter in one single stage. The ICS can be operated in either discontinuous current mode (DCM) or continuous current mode (CCM), while the flyback or forward DC/DC converter is operated in CCM. Almost all single-stage PFC AC/DC converters suffer from high bulk capacitor voltage stress and extra switch current stress. The bulk capacitor voltage feedback with a coupled winding structure is widely used to reduce both the voltage and current stresses in practical single-stage PFC AC/DC converters. This paper presents a detailed analysis of the bulk capacitor voltage feedback, including the relationship between bulk capacitor voltage, input current harmonics, voltage feedback ratio, and load condition. The maximum bulk capacitor voltage appears when the DC/DC converter operates at the boundary between CCM and DCM. This paper also reveals that only the voltage feedback ratio determines the input current harmonics under DCM ICS and CCM DC/DC operation. The theoretical prediction of the bulk capacitor voltage as well as the predicted input harmonic contents is verified experimentally on a 60 W AC/DC converter with universal-line input     

单级功率因数校正DCM组合变换器的稳定性

本文论述在闭环反馈控制下,输入环节工作在不连续导电模式（ＤＣＭ）时单级功率因数校正（ＰＦＣ）组合变器的稳定性,讨论通过脉冲宽度调节使变换器的电压能够维持在期望的电压范围之内的条件,以及条件的输入电压主动态范围和负载变化范围,并采用上述方法对一个ＰＦＣ ＤＣＭ ｂｏｏｓｔ－ｂｕｃｋ变换器进行了理论分析与实验研究,实验结果结果表明理论分析的正确性。     

Monolithic voltage conversion in low-voltage CMOS technologies

A high-to-low switching DC-DC converter that operates at input voltages up to two times as high as the maximum voltage permitted in a low-voltage CMOS technology is proposed in this paper. The proposed circuit technique is based on a cascode bridge that maintains the steady-state voltage differences among the terminals of all of the transistors within a range imposed by a specific low-voltage CMOS technology. An efficiency of 87.8% is achieved for 3.6-0.9 V conversion assuming a 0.18 μm CMOS technology. The DC-DC converter operates at a switching frequency of 97 MHz while supplying a DC current of 250 mA to the load.     

一种改进的ZCT无桥功率因数校正电路设计

为了降低开关损耗,提高变换器的效率,提出了一种改进的零电流转化软开关无桥功率因数校正电路,实现了变换器主开关管和辅助开关管的零电流导通和零电流关断,有效地减小了导通损耗,提高了电路的效率。详细分析了电路的工作模态、工作条件和主开关管的导通损耗。仿真和实验结果表明,该功率因数校正电路实现了输入电流对输入电压的良好跟踪,功率因数高,谐波含量少,效率较传统的全桥功率因数校正电路有明显的提高。 关键词：全桥;零电流转换;无桥;功率因数校正     

Steady-state and large-signal design of current-programmed DC-DCconverters

A new method for steady-state design of current-programmed-mode (CPM) DC-DC converters is presented. The method uses a set of equations derived based on the relationships between line voltage, load current, control current, and the stabilizing artificial ramp. The set of normalized equations are verified by a fast large-signal simulation and experimental measurement. These equations are plotted on the converter DC output plane (a graph of output current versus output voltage) in which characteristic curves related to different artificial ramps and boundaries of different operating modes are indicated. A general design procedure is presented for a CPM converter with both input voltage and output resistive load varied. By this means, the design time can be significantly reduced, and systematic design trade-offs can be made to ensure correct converter operation over the desired range of line and load variation     

Three-level LLC series resonant DC/DC converter

Paper presents a three-level soft switching LLC series resonant dc/dc converter. Zero-voltage switching (ZVS) is achieved for each main switch without any auxiliary circuit. Voltage stress of each main switch is half of input voltage. Zero-current-switching (ZCS) is achieved for rectifier diodes. Wide input/output range can be achieved under low frequency range because of two-stage resonance. Only one magnetic component is required in this converter. Efficiency is higher in high line input, so this converter is a preferable candidate for power products with the requirement of hold up time. For design convenience, relationship between dc gain and switching frequency, load resistance is deduced. Its open load characteristic and short load characteristic are exposed to provide theory basis for no load operation and over current protection. Design consideration of four dead times is presented to assure that voltage stress for main switches is within half of input voltage and ZVS for each main switch is achieved. Finally the principle of operation and the characteristics of the presented converter are verified on a 500V-700V input 54V/10A output experimental prototype, whose efficiency reaches 94.7% under rating condition.     

Buck功率因数校正电路预测平均电流控制研究

介绍了一种Buck功率因数校正电路,采用无差拍算法的预测平均电流控制,减小了系统的延迟,提高了系统的电流环性能。使用 Matlab仿真软件对基于预测平均电流控制的Buck变换器功率因数校正电路进行了建模和仿真,仿真波形表明采用预测电流控制的功率因数校正电路具有谐波小、输入功率因数高、动态响应快等优点。     

A zero voltage transition boost converter employing a soft switching auxiliary circuit with reduced conduction losses

This paper presents a zero-voltage-transition (ZVT) boost converter using a soft switching auxiliary circuit for power factor correction (PFC) applications. The improvement over existing topologies lies in the positioning of the auxiliary circuit capacitors and the subsequent reduction in the resonant current and therefore the conduction losses as compared to other similar topologies. The proposed converter operates in two modes - Mode 1 and Mode 2. It is shown in the paper that the converter should be designed using the constraints obtained in Mode 1 to achieve low-loss switching. The converter is analyzed and characteristic curves presented which are then used in a detailed design example. Experimental results from a 250 W, 127 V input laboratory prototype switching at 100 kHz verify the design process and highlight the advantages of the proposed topology. The proposed converter is suitable for single-phase, two stage power factor correction circuits with universal input voltage range and power levels up to 3 kW.