Dynamic programming parsing for context-free grammars in continuousspeech recognition

The use of context-free grammars in automatic speech recognition is discussed. A dynamic programming algorithm for recognizing and parsing spoken word strings of a context-free grammar is presented. The time alignment is incorporated in to the parsing algorithm. The algorithm performs all functions simultaneously, namely, time alignment, work boundary detection, recognition, and parsing. As a result, no postprocessing is required. From the probabilistic point of view, the algorithm finds the most likely explanation or derivation for the observed input string, which amounts to Viterbi scoring rather than Baum-Welch scoring in the case of regular or finite-state languages. The algorithm provides a closed-form solution. The computational complexity of the algorithm is studied. Details of the implementation and experimental tests are described     

Integrated 6-GHz receiver front-end circuits for a radio relay system

A 6-GHz integrated front end was made using microwave integrated circuits and satisfying system specifications. The front end consists of a mixer and a local oscillator made from a 1.5-GHz phase-locked loop and a frequency quadrupler. A noise figure better than 6 dB was achieved using Si Schottky barrier diodes.     

An automatic caption-superimposing system with a new continuousspeech recognizer

This paper describes an automatic caption-superimposing system with a new continuous speech recognizer for efficient production of TV programs. The system which we have developed can recognize continuous speech announced in a hall of Japanese `sumo' wrestling and automatically superimpose the recognition results of wrestlers' names and winning tricks as captions on a TV display. The announcements consist of sentences to inform which wrestler has won a match with what kind of winning trick. They are formed out of small-sized vocabulary with a specific uttered style and are spoken nearly at a Japanese `bunsetsu' unit like a phrase only by some specific speakers. We designed the system to work with the following features: (a) recognition of continuous speech with a specific uttered style; (b) an easy change of vocabulary to be recognized; (c) no requirement of pre-registration of any particular utterances; (d) implementation on multi-microprocessors with high computing speed. The proposed recognizer utilizes general intra-`bunsetsu' grammar which is applicable to various recognition tasks, while conventional Japanese continuous speech recognizers use intra-`bunsetsu' grammar which depends on applied recognition tasks. In a recognition experiment on 40 sentences of `sumo' announcements by two speakers, the system attained `bunsetsu' accuracy of 91.0% with quasi-real-time processing     

Integrated circuits for telephony

Many integrated circuits for large-scale application to telephone networks have been designed, including subscriber line interfaces, antialiasing filters, analog-to-digital-to-analog converters, and tone receivers. This paper summarizes in a unified fashion both interfacing and functional requirements for these devices, as well as the related circuit and technology approaches which have been utilized.     

Integrated circuits for communications

Wireless communication standards have progressed greatly over the past decade, from the relative simplicity of Bluetooth, to the much more sophisticated Global System for Mobile Communications (GSM) standards that make up a large part of today's cellular communication networks. Perhaps the most interesting aspect of this progression is the accompanying reduction in cost of the wireless devices themselves, driven by numerous innovations in the fields of complementary metal oxide semiconductor (CMOS) process technology, radio frequency (RF)/analog circuit design, and system-on-chip (SoC) integration. In this issue of the Integrated Circuits for Communications Series, we have selected three articles that highlight the challenges in the design of highly integrated SoCs using standard low-cost CMOS process.     

Integrated circuits for television receivers

Integrated circuits are being investigated for use in as many television circuits as feasible. In Japan, considerable work has been done by different groups within the TV industry to develop ICs that will permit cost reduction, increased reliability, and simplification of assembly-line operations. This article is a report on results of the concentrated efforts made by five major television set manufacturers to develop and produce black-and-white and color receivers, in collaboration with four universities, two institutes, and seven components manufacturers.     

Integrated optical circuits

Research on optical communication systems indicates the future need for a compact, rugged, and economical medium for circuit realization. Encapsulated planar arrays of rectangular dielectric waveguides are attractive for this purpose. The individual guides would have dimensions on the order of a few micrometers while the planar arrays might cover an area of a few square centimeters. Integrated circuit technology appears adaptable to batch processing such circuits. Recent theoretical and experimental results are surveyed which support this viewpoint.     

Integrated circuits for multiband multimode receivers

The need for different types of wireless connections to mobile terminals has increased rapidly during the last few years. The mobile terminal must be able to connect to globally existing cellular networks, as well as to different ad-hoc networks. The receivers designed for these terminals must achieve a high integration level and a high level of component sharing to meet the strict size and cost requirements. In addition, the performance of a multimode receiver must be compatible with existing single-system receivers. New process technologies, which use low supply voltages and are optimised for digital circuitry, set additional challenges for future receiver design. Several integrated receiver ICs for the multimode and multiband transceivers have been published to meet these demands. This paper gives a review of these circuit solutions and a brief introduction to the demands set by different systems and receiver architectures for the design of the multimode and multiband receiver.     

Integrated multi-sensor system for real-time monitoring and control of HgCdTe MBE

We describe an integrated real-time sensing and control system for monitoring and controlling substrate temperature, layer composition, and effusion cell flux during molecular beam epitaxial growth of HgCdTe epilayers for advanced IR detectors. Substrate temperature is monitored in real-time using absorption-edge spectroscopy, allowing the temperature to be controlled within 1.5°C of the desired setpoint. In situ spectroscopic ellipsometry (SE) is used for monitoring HgCdTe layer composition in real-time. A comprehensive temperature- and composition-dependent dielectric function database has been recorded which allows the accurate and precise determination of Hg_1−xCd_xTe layer composition over a wide range of x-values, from 0.2 to 0.42. The composition changes inferred from real-time SE measurements obtained during growth of a two-layer structure are in excellent agreement with composition profiles obtained using post-growth secondary ion mass spectroscopy analysis. The accuracy and precision of SE measurements conducted over multiple growth runs are shown to be suitable for robust SE-based composition control. Changes in the Cd flux produced by a CdTe effusion cell are detected using an atomic optical absorption method. This method allows changes in HgCdTe layer composition to be correlated directly with variations in Cd flux. All of the in situ sensors are linked using a custom software framework to provide the foundation for real-time monitoring and control of HgCdTe MBE growth of high performance infrared detector structures over a wide range of compositions, layer thicknesses, and substrate temperatures.     

Integrated circuits for a 200 Mbit/s fiber-optic link

A set of three bipolar integrated circuits for a new fiber-optic link is described. The link operates at data rates of 5-200 Mb/s NRZ. The optical transmitter and receiver modules are compact and fit into standard 16-pin dual-in-line sockets. The power consumption of the transmitter module is 530 mW and the receiver module dissipates 310 mW. The optical loss budget is 20 dB, which is sufficient for link lengths of up to 5 or 6 km. The circuits have been designed in a 3-/spl mu/m bipolar process. The chip sizes are 2 mm/spl times/1.75 mm each.     

Integrated circuits for data transmission over twisted-pairchannels

This paper discusses typical architectures and challenges in designing integrated circuits for data transmission over twisted-pair wire channels. To highlight the various architectural approaches, two main applications are discussed-high-bit-rate digital subscriber loop (HDSL) and fast-Ethernet. Although these two applications have orders of magnitude difference in their bit rates, they share many common building blocks including line-drivers, 24 wire hybrids, echo cancellation, digital equalization, and clock recovery. Typical integrated circuit approaches for realizing each of these blocks are presented as well as possible tradeoffs. Finally, future challenges facing integrated circuit designers are presented     

Integrated capacitors for conductive lithographic film circuits

This paper reports on fabrication of low-value embedded capacitors in conductive lithographic film (CLF) circuit boards. The CLF process is a low-cost and high speed manufacturing technique for flexible circuits and systems. We report on the construction and electrical characteristics of CLF capacitor structures printed onto flexible substrates. These components comprise a single polyester dielectric layer, which separates the printed electrode films. Multilayer circuit boards with printed components and interconnect can be fabricated using this technique     

实时语音识别系统在家庭监护机器人的实现

文中阐述的是家庭监护机器人项目中语音识别系统设计的部分,通过DSP、DMA和ARM Cortex-A8的并行处理,利用双缓冲的方法,在嵌入式Linux上实现了基于ATK的实时语音识别系统。文中对该系统的软硬件进行了设计。在硬件方面,给出语音识别系统的硬件组成原理,并提供了关键部分原理图;在软件方面,提出实时语音识别的方法,给出应用程序实现流程。最后通过真人说话来进行语音识别实验,实时语音识别率达到了94.67%以上,实验验证了系统的软件硬件设计的正确性。     

Integrated circuits for a bidirectional implantable pulsed Doppler ultrasonic blood flowmeter

The application of integrated circuits in medical implants and the complexity of these implants have increased at a rapid pace in the past few years. The need, however, still exists for a highly accurate and stable telemetry system for the measurement of blood flow. Two custom-designed ICs have been realized to resolve this problem. These ICs form the heart of a totally implantable pulsed Doppler ultrasonic bidirectional blood flowmeter; one circuit performs the basic timing functions, and the second implements low-level linear signal processing. For a small implanted package (3.8/spl times/2.8/spl times/0.8 cm/SUP 3/), these ICs must meet the stringent requirements of low-voltage operation (2.2-2.8 V), low power (<40 mW), high stability (short-term timing jitter <50 ppm), and the minimum of external components. Using a quadrature direction detecting technique, the circuits sense both positive and negative flow and produce a multiplexed telemetry signal. The approach used minimizes parts count and power drain and maximizes channel-to-channel matching in the multiplexed signal.     

A real-time EMG pattern recognition system based on linear-nonlinear feature projection for a multifunction myoelectric hand

This paper proposes a novel real-time electromyogram (EMG) pattern recognition for the control of a multifunction myoelectric hand from four channel EMG signals. To extract a feature vector from the EMG signal, we use a wavelet packet transform that is a generalized version of wavelet transform. For dimensionality reduction and nonlinear mapping of the features, we also propose a linear-nonlinear feature projection composed of principal components analysis (PCA) and a self-organizing feature map (SOFM). The dimensionality reduction by PCA simplifies the structure of the classifier and reduces processing time for the pattern recognition. The nonlinear mapping by SOFM transforms the PCA-reduced features into a new feature space with high class separability. Finally, a multilayer perceptron (MLP) is used as the classifier. Using an analysis of class separability by feature projections, we show that the recognition accuracy depends more on the class separability of the projected features than on the MLP's class separation ability. Consequently, the proposed linear-nonlinear projection method improves class separability and recognition accuracy. We implement a real-time control system for a multifunction virtual hand. Our experimental results show that all processes, including virtual hand control, are completed within 125 ms, and the proposed method is applicable to real-time myoelectric hand control without an operational time delay.     

Integrated network management for real-time operations

An approach to integrated network management that eliminates the need for interface protocol conformance and provides applications that seamlessly isolate and resolve faults in the entire network is described. The approach uses off-the-shelf artificial intelligence tools and open-architecture client/server workstation technology. A sophisticated tool similar to a fourth-generation language, called the Universal Device Interface Generator, is used to develop and support agent interface modules very quickly and easily. This tool is used to provide a manager of managers, called the ALLINK Operations Coordinator (AOC), that can interface to virtually any existing element management system. With the AOC, information from all of the subnetwork managers is gathered and correlated, the results of this correlation are presented to the human operators in a uniform fashion, and any other interactions between the subnetwork managers and the human operators are also performed in a uniform fashion     

SIAR: Customized real-time interactive router for analog circuits

As analog and mixed-signal (AMS) circuitry gains increasing portions in modern SoCs, automatic analog routing is becoming more and more important. However, routing for analog circuits has always been an extremely challenging task due to complicated electrical and geometrical constraints. Due to these constraints, current analog routers often fail to obtain a routing solution that the designer wants. To incorporate the designer׳s expertise during routing, a customized real-time interactive analog router is attracting increasing concerns in industry.This paper presents a fast customized real-time interactive analog router called SIAR. A key feature of SIAR is that it allows for real-time interactions between the router and the designer. The designer can try different guiding points by moving the cursor in the user window and SIAR will return and display the corresponding routing solution in real-time, such that the designer could choose the most satisfactory one. The guiding points are very important for the designer to obtain satisfactory routing solutions, even for routing solutions with analog matching constraints by setting symmetric guiding points. A new splitting graph based routing model is presented to efficiently search the routing path and record the number of turns/vias during searching by efficient tile splitting operations. SIAR supports different routing modes such as point-to-point, point-to-module and module-to-module. An efficient connecting point selection method is presented such that an optimal routing solution is preserved when connecting to a module. Different design rules such as variable wire and via width/spacing rules, along with the same-net spacing rules, are supported in SIAR. Moreover, a global routing stage is presented to speedup the routing process for large designs. Experimental results are promising.     

Integrated optoelectronic materials and circuits for optical interconnects

Conventional interconnect and switching technology is rapidly becoming a critical issue in the realization of systems using high speed silicon and GaAs based technologies. In recent years clock speeds and on-chip density for VLSI/VHSIC technology has made packaging these high speed chips extremely difficult. A strong case can be made for using optical interconnects for on-chip/on-wafer, chip-to-chip and board-to-board high speed communications. GaAs Integrated Optoelectronic Circuits (IOC's) are being developed in a number of laboratories for performing Input/Output functions at all levels. In this paper integrated optoelectronic materials, electronics and optoelectronic devices are presented. IOC’s are examined from the standpoint of what it takes to fabricate the devices and what performance can be expected.