模-数-差信号发生器的设计与实现

模-数-差信号发生器主要由集成压控振荡器ICL8038构成的函数信号发生器电路、模.数.差变换与输出电路以及电源电路组成.设计是在函数信号发生器和双路直流电源基础上,采取比例放大、串联分压、二极管检波等变换与组合方法,实现由正弦波、三角波、方波、直流信号组成的模拟信号,TTL和CMOS信号组成的数字信号,以及具有AC和DC信号的差分信号.模-数-差信号发生器集多种常用信号于一体,使用简便,可适应多种场合的电子测量.     

A new Schmitt trigger circuit in a 0.13-/spl mu/m 1/2.5-V CMOS process to receive 3.3-V input signals

A new Schmitt trigger circuit, which is implemented by low-voltage devices to receive the high-voltage input signals without gate-oxide reliability problem, is proposed. The new proposed circuit, which can be operated in a 3.3-V signal environment without suffering high-voltage gate-oxide overstress, has been fabricated in a 0.13-/spl mu/m 1/2.5-V 1P8M CMOS process. The experimental results have confirmed that the measured transition threshold voltages of the new proposed Schmitt trigger circuit are about 1 and 2.5 V, respectively. The new proposed Schmitt trigger circuit is suitable for mixed-voltage input-output interfaces to receive input signals and reject input noise.     

基于Multisim11.0的函数信号发生器设计

利用分立元器件设计能够输出正弦波、方波和三角波的函数信号发生器.函数信号发生器产生的正弦波频率和幅度可调,并通过电压比较器将正弦波转化为方波,同时利用外加电压偏置的方式改变方波的占空比,利用积分电路将方波转换为三角波.在Multisim 11.0软件环境下进行函数信号发生器的电路设计及调试,仿真结果表明电路输出性能与指标达到设计要求.     

A current-/voltage-controlled four-slope operation square-/triangular-wave generator and a dual-mode pulse width modulation signal generator employing current-feedback operational amplifiers

This paper presents a current-feedback operational amplifier (CFOA)-based current-/voltage-controlled four-slope operation square-/triangular-wave generator. The proposed circuit can adjust the duty cycle of the output waveforms in a current- or voltage-controlled manner, and an external resistor is used to independently control its oscillation frequency. In addition, the DC level of the triangular wave can be adjusted by tuning an input voltage source. This paper also presents a CFOA-based dual-mode pulse width modulation (PWM) signal generator derived from the proposed square-/triangular-wave generator. The literature review in this paper includes previous designs, circuit operations, and the non-ideal effects and design considerations of the proposed circuits. Prototype circuits built with commercially available CFOA integrated circuits (ICs) (AD844ANs) and discrete passive components were used to execute experimental tests to verify the feasibility of the proposed circuits. The experimental results of this study are in agreement with the theoretical analysis.     

Design of Z-copy controlled-gain voltage differencing current conveyor based adjustable functional generator

This paper introduces interesting active element and its application in the field of square and triangular wave generators. Active element, so-called Z-Copy Controlled Gain Voltage Differencing Current Conveyor (ZC-CG-VDCC), has availability of three mutually independently and electronically adjustable parameters (transconductance, intrinsic resistance of the current input terminal and current gain between two terminals) that are very popular for control of applications today. In addition, a proposed device utilizes very useful z-copy (additional auxiliary terminal) features and two terminals providing voltage difference. All mentioned features are beneficial in mixed-mode circuit synthesis and design of adjustable applications (active filters, oscillators, generators, modulators, etc.). Electronically adjustable properties of the device are involved in the design of an adjustable generator. The generator provides voltage- and current-mode square wave outputs that can be also used for differential square wave output when very simply modified. Application of the generator in simple pulse width modulator (PWM) is also introduced. A detailed analysis and Spice simulation results are given and main features of the circuits are compared to electronically controllable solutions of recent development in this field.     

简易信号发生器的故障分析与解决方法

在此通过对简易信号发生器的设计和调试,发现其产生的正弦波、方波和三角波均存在不同程度的失真。为了改善频率较大时方波产生的失真情况,采用高速率运放或者减小正弦波的频率来解决。为了改善三角波的失真情况,采用增大积分电阻R或者积分电容C,也可以采用减小方波的幅值,即在过零比较器的输出端接双向稳压管,限制输出方波的幅度在一定范围内。经过分析和改进,完善了简易信号发生器的设计,改善了3种波形的失真情况。     

一种温度不敏感频率范围宽的三角波振荡器

本文介绍了一种由双比较器型施密特触发器构成的三角波振荡器电路,它通过对电容恒流充放电产生对称三角波;此电路的优点是其产生的三角波的频率稳定且具有很高的精度,并对温度和电源的变化不敏感;文章最后给出了电路的Hspice仿真结果。     

Generation of square and triangular wave with independently controllable frequency and amplitude using OTAs only and its application in PWM

This paper presents a self-generating square/triangular wave generator using only the CMOS Operational Transconductance Amplifiers (OTAs) and a grounded capacitor. The output frequency and amplitude of the proposed circuit can be independently and electronically adjusted. The proposed circuit validates its advantage by consuming less amount of power, which is about 71.3 µW. The theoretical aspects are authentically showcased using the PSPICE simulation results. The performance of the proposed circuit is also verified through pre layout and post layout simulation results using the 90 nm GPDK CMOS parameters. A prototype of this circuit has been made using commercially available IC CA3080 for experimental verification. Experimentation also gives the similar output as per the theoretical proposition. The designed circuit is also made applicable to perform pulse width modulation (PWM).     

基于5G8038的函数发生器设计与实现

正弦波和非正弦波发生电路常作为信号源被广泛地应用于无线电通信以及自动测量和自动控制等系统中。通常把既能产生正弦波又能产生三角波、方波、锯齿波等非正弦输出信号的电路叫作函数信号发生器。在电子技术应用领域。要求信号源的温度、频率的稳定性都比较高。介绍的5G8038是一种性能稳定、精度较高的集成芯片。介绍了用5G8038设计多功能函数信号发生器的方法。     

基于SAW 技术的高精度频率测量仪设计与实现

设计了一种基于现场可编程门阵列(FPGA)等精度测频与自动增益控制(AGC)电路的高精度声表面波测量仪,该测量仪通过声表面波传感器采集声波并转化为电信号,通过AGC电路与施密特触发器对信号限幅、整形,将其转化为可测频率的方波,最后利用FPGA测频电路实现对频率的测量,并将结果传送至单片机显示。测试结果表明,该测量仪能测量频率100 Hz~100 kHz的信号,系统的最大测量误差为1.2%,测频范围广,精度高,稳定性好。     

基于MSP430F499的波形合成器

以MSP430F499为核心,主要由方波振荡电路、分频与滤波模块、移相电路、放大电路、加法器等组成。将方波振荡器的信号分频滤波产生不同频率的正弦波,经移相放大等处理后,分别根据方波三角波谐波组成关系,再合成方波和三角波。滤波模块对同一信号进行二次滤波,先用开关电容滤波器滤波,再经三阶巴特沃斯低通滤波器滤波,降低了高次谐波对信号的影响同时保证了通带内信号的平坦。可通过按键进行波形切换以及合成阶数切换,人机交互灵活,界面友好,操作简单。     

基于单片机和FPGA的数字示波器的设计

随着电子技术的发展,对电路测量的要求越来越高。提出了一种基于数字示波器原理,以单片机和FPGA为控制核心的数字示波器实现方法。系统由信号调理、程控放大、比较整形和时钟产生、采样控制、测频模块和校准信号产生等模块组成。可测频率范围10Hz到10MHz,幅度范围2mV到20V,垂直灵敏度共11档,扫描速度共21档。实时采样...     

Wide Voltage Input Receiver with Hysteresis Characteristic to Reduce Input Signal Noise Effect

In this paper, an input receiver with a hysteresis characteristic that can work at voltage levels between 0.9 V and 5 V is proposed. The input receiver can be used as a wide voltage range Schmitt trigger also. At the same time, reliable circuit operation is ensured. According to the research findings, this is the first time a wide voltage range Schmitt trigger is being reported. The proposed circuit is compared with previously reported input receivers, and it is shown that the circuit has better noise immunity. The proposed input receiver ends the need for a separate Schmitt trigger and input buffer. The frequency of operation is also higher than that of the previously reported receiver. The circuit is simulated using HSPICE at 0.35‐μm standard thin oxide technology. Monte Carlo analysis is conducted at different process conditions, showing that the proposed circuit works well for different process conditions at different voltage levels of operation. A noise impulse of (V_CC/2) magnitude is added to the input voltage to show that the receiver receives the correct logic level even in the presence of noise. Here, V_CC is the fixed voltage supply of 3.3 V.     

Simple CMOS transition accelerator circuit

A simple CMOS circuit whose input/output characteristics follow an 'antihysteresis' curve is presented. This curve is similar in shape to the input/output characteristics of a Schmitt trigger, but it is followed in the reverse direction. This circuit can be used as a transition accelerator.<>     

Design and Enactment of Diverse Low Power Techniques Based Schmitt Trigger

In the present-day VLSI system, low power design plays a noteworthy role. As we know that, a circuit with higher power consumption can ruin the performance of the system because in the modern world most of the systems are portable. Subsequently, they are functioned by the batteries. Therefore, it is desirable to have a system which operates at lower supply voltages along with maintaining the performance of the system. This low power system can be attained by abating the leakages of the devices up-to an enormous magnitude. In the contemporary VLSI system, a major role is being contributed by the Schmitt trigger circuit. Schmitt trigger is fundamentally a comparator. It is implemented by using a positive feedback. The Schmitt trigger circuit is used in various devices such as buffer, sub-threshold SRAM, sensors and PWM circuit. It is also used in analog to digital converter. The most significant property of the Schmitt trigger is that they provide hysteresis in their voltage transfer curve. Consequently, they provide better noise immunity as compared to their counterparts. Therefore it becomes quite important to enhance the performance of the Schmitt trigger circuit. The power dissipation of the device can be minimized by minimizing the sub-threshold current. The Schmitt trigger circuit is very imperative in producing a clean pulse from the input signal comprising of noise. There are various applications of Schmitt trigger circuit such as in scheming the oscillator circuit, analog to digital converter, function generator, signal conditioning and numerous applications. Thus, it becomes noteworthy to boost its performance by plummeting the leakages and power consumption of the Schmitt trigger circuit. We have realized the Schmitt trigger circuit by the use of FinFET. Therefore, we have got some optimum output in the parameters such as hysteresis width, power consumption and total noise of the Schmitt trigger circuit, but the leakages have been augmented. Thereafter, we have implemented several techniques on the Schmitt trigger circuit to shrink the leakage current, leakage power and other parameters further. We have applied Self Controllable Voltage Level, Adaptive voltage level and MTCMOS technique on the Schmitt trigger circuit using FinFET to further augment the presentation. All the circuits have been simulated in the virtuoso tool of the cadence in 45 nm VLSI domain. We have applied 0.7 V of the supply voltage to perform the simulation and got some tremendous outcome.     

Low-voltage low VDD sensitivity relaxation oscillator for passive wireless microsystems

A low-voltage relaxation oscillator for passive wireless microsystems is proposed. The oscillator employs a current pulse generator to generate effective hysteresis for oscillation without using a Schmitt trigger, avoiding the drawback of the high sensitivity of the frequency of Schmitt trigger relaxation oscillators to supply voltage fluctuation. The proposed oscillator has been implemented in TSMC-0.18 mum 1.8 V six-metal one-poly CMOS technology. The performance of the oscillator is validated using measurement results.     

A Fully Programmable Analog CMOS Rational-Powered Membership Function Generator with Continuously Adjustable High Precision Parameters

This paper presents a novel structure for implementing rational-powered membership functions (RPMFs), which are the extended forms of triangular/trapezoidal membership functions and those functions which are generated by applying linguistic hedges. The hardware realization of an RPMF consists of a triangular membership function generator circuit followed by a rational-powered generator module (RPGM). A novel fully programmable compact triangular/trapezoidal/s-shaped/z-shaped membership function generator with the ability to continuously change parameters is presented which is compatible with the proposed RPGM. A new method is introduced to implement the RPGM based on the approximation of the function “x ^a ” by the functions square and square-rooter which are simply implemented in a current-mode analog approach based on the translinear principle, which leads to a design that is simple, and has high accuracy and less hardware usage, with a resulting lower chip area and lower power consumption. The designed circuit was simulated by an HSPICE simulator with level 49 parameters (BSIM3v3), and the simulation results show that the maximum power consumption of the RPGM is 800 μW, while the maximum RMS error is 1.25 %. Finally, layouts of the circuits prepared using Cadence software are presented.     

基于开关信号理论的电流型CMOS多值施密特电路设计

以开关信号理论为指导,建立了描述电流型CMOS多值施密特电路中阈值控制电路的电流传输开关运算.在此基础上,提出了新的电流型CMOS三值和四值施密特触发器设计.所设计的电路可提供多值电流和电压输出信号,回差电流的大小只需通过改变MOS管的尺寸比来调节.所提出的电路较之以往设计具有结构简单,回差值调整容易以及可在较低电压下工作等特点.采用TSMC 0.25 μ m CMOS工艺参数和1.5V电压的HSPICE模拟结果验证了所提出设计方案的有效性和电路所具有的理想回差特性.     

Self generating square/triangular wave and pulse width modulator using a single MO-CCCDTA

A self-generating square/triangular wave and pulse width modulator (PWM) using multiple output current controlled current differencing transconductance amplifier (MO-CCCDTA) is presented. To obtain all the three functions simultaneously from the same topology, the MO-CCCDTA is modified a little bit. The characterisation of the modified MO-CCCDTA structure shows that the parasitic resistances at input terminals (n and p) can be varied via bias current. The maximum useful frequency range is found to be 635 MHz, which is higher than the available literature. The waveform generator and PWM circuit use only one MO-CCCDTA, one grounded capacitor and no resistor; hence suitable for IC implementation. The duty cycle of proposed pulse width modulation can be tuned by bias current of MO-CCCDTA over a wide range. The performances of the proposed block and its applications (square/triangular/PWM) are verified by PSPICE simulation using TSMC 0.35 µm technology. The power consumption is about 1.12 mW. To verify experimentally, a prototype of MO-CCCDTA has been made using commercially available ICs (AD844AN and CA3080) on printed circuit board. The simulation and experimental results verify theoretical proposition well. Monte carlo simulation is carried out, which proves satisfactory performance of the proposed circuit against mismatches. The performance of the proposed circuit is also verified through pre-layout and post-layout simulation results. The required chip area is only 22.415 × 14.6 µm².