Improvement of the luminous intensity of light-emitting diodes by using highly transparent Ag-indium tin oxide p-type ohmic contacts

We have investigated Ag-indium tin oxide (ITO) scheme for obtaining high-quality p-type ohmic contacts for GaN-based light-emitting diodes (LEDs). The Ag(1 nm)-ITO(200 nm) contacts exhibit greatly improved electrical characteristics when annealed at temperatures in the range 400/spl deg/C-600/spl deg/C for 1 min in air, yielding specific contact resistances of /spl sim/10/sup -4/ /spl Omega//spl middot/cm/sup 2/. In addition, the contacts give transmittance of about 96% at 460 nm, which is far better than that of the conventionally used oxidized Ni-Au contacts. It is shown that the luminous intensity of blue LEDs fabricated with the Ag-ITO contacts is about three times higher than that of LEDs with oxidized Ni-Au contacts. This result strongly indicates that the Ag-ITO scheme can serve as a highly promising p-type ohmic contact for the realization of high brightness near ultraviolet LEDs.     

Rapid thermal annealed InGaN/GaN flip-chip LEDs

Nitride-based flip-chip (FC) light-emitting diodes (LEDs) emitting at 465 nm with Ni transparent ohmic contact layers and Ag reflective mirrors were fabricated. With an incident light wavelength of 465 nm, it was found that transmittance of normalized 300/spl deg/C rapid thermal annealed (RTA) Ni(2.5 nm) was 93% while normalized reflectance of 300/spl deg/C RTA Ni(2.5 nm)/Ag(200 nm) was 92%. It was also found that 300/spl deg/C RTA Ni(2.5 nm) formed good ohmic contact on n/sup +/ short-period-superlattice structure with specific contact resistance of 7.8/spl times/10/sup -4/ /spl Omega//spl middot/cm/sup 2/. With 20-mA current injection, it was found that forward voltage and output power were 3.15 V and 16.2 mW for FC LED with 300/spl deg/C RTA Ni(2.5 nm)/Ag(200 nm). Furthermore, it was found that reliabilities of FC LEDs were good.     

InAlN/GaN HEMTs: a first insight into technological optimization

High-electron mobility transistors (HEMTs) were fabricated from heterostructures consisting of undoped In/sub 0.2/Al/sub 0.8/N barrier and GaN channel layers grown by metal-organic vapor phase epitaxy on (0001) sapphire substrates. The polarization-induced two-dimensional electron gas (2DEG) density and mobility at the In/sub 0.2/Al/sub 0.8/N/GaN heterojunction were 2/spl times/10/sup 13/ cm/sup -2/ and 260 cm/sup 2/V/sup -1/s/sup -1/, respectively. A tradeoff was determined for the annealing temperature of Ti/Al/Ni/Au ohmic contacts in order to achieve a low contact resistance (/spl rho//sub C/=2.4/spl times/10/sup -5/ /spl Omega//spl middot/cm/sup 2/) without degradation of the channels sheet resistance. Schottky barrier heights were 0.63 and 0.84 eV for Ni- and Pt-based contacts, respectively. The obtained dc parameters of 1-/spl mu/m gate-length HEMT were 0.64 A/mm drain current at V/sub GS/=3 V and 122 mS/mm transconductance, respectively. An HEMT analytical model was used to identify the effects of various material and device parameters on the InAlN/GaN HEMT performance. It is concluded that the increase in the channel mobility is urgently needed in order to benefit from the high 2DEG density.     

Highly reliable GaN-based light-emitting diodes formed by p-In/sub 0.1/Ga/sub 0.9/N-ITO structure

Indium-tin-oxide (ITO) is deposited as a transparent current spreading layer of GaN-based light-emitting diodes (LEDs). To reduce the interfacial Schottky barrier height, a thin p-In/sub 0.1/Ga/sub 0.9/N layer is grown as an intermediate between ITO and p-GaN. The contact resistivity around 2.6/spl times/10/sup -2/ /spl Omega//spl middot/cm/sup 2/ results in a moderately high forward voltage LED of 3.43 V operated at 20 mA. However, the external quantum efficiency and power efficiency are enhanced by 46% and 36%, respectively, in comparison with the conventional Ni-Au contact LEDs. In the life test, the power degradation of the p-In/sub 0.1/Ga/sub 0.9/N-ITO contact samples also exhibits a lower value than that of the conventional ones.     

High brightness InGaN green LEDs with an ITO on n/sup ++/-SPS upper contact

Indium tin oxide (ITO) (260 nm) and Ni (5 nm)/Au (10 nm) films were deposited onto glass substrates, p-GaN layers, n/sup +/-InGaN/GaN short-period-superlattice (SPS), n/sup ++/-SPS and nitride-based green light-emitting diodes (LEDs). It was found that ITO could provide us an extremely high transparency (i.e., 95% at 520 nm). It was also found that the 1.03/spl times/10/sup -3/ /spl Omega/cm/sup 2/ specific contact resistance of ITO on n/sup ++/-SPS was reasonably small. Although the forward voltage of the LED with ITO on n/sup ++/-SPS upper contacts was slightly higher than that of the LED with Ni/Au on n/sup ++/-SPS upper contacts, the 20 mA output power and external quantum efficiency of the former could reach 4.98 mW and 8.2%, respectively, which were much larger than the values observed from the latter. The reliability of ITO on n/sup ++/-SPS upper contacts was also found to be reasonably good.     

Nitride-based LEDs with an SPS tunneling contact Layer and an ITO transparent contact

The indium-tin-oxide [ITO(80 nm)] and Ni(5 nm)-Au(10 nm) films were separately deposited on glass substrates, p-GaN layers, n/sup +/-InGaN-GaN short-period-superlattice (SPS) structures, and nitride-based light-emitting diodes (LEDs). It was found that ITO on n/sup +/-SPS structure could provide us an extremely high transparency (i.e., 93.2% at 465 nm) and also a reasonably small specific contact resistance of 1.6/spl times/10/sup -3//spl Omega//spl middot/cm/sup 2/. Although the forward voltage which corresponds to 20-mA operating current for LED with ITO on n/sup +/-SPS upper contact was slightly higher than that of the LED with Ni-Au on n/sup +/-SPS upper contact, a 30% higher output intensity could still be achieved by using ITO on n/sup +/-SPS upper contact. Moreover, the output power of packaged LED with ITO was about twice as large as that of the other conventional Ni-Au LEDs.     

High-reflectivity Al-Pt nanostructured Ohmic contact to p-GaN

The effect of nanoscale Pt islands on the electrical characteristics of contacts to p-type gallium nitride (GaN) has been investigated to explore the feasibility for the flip-chip configuration light-emitting diodes (LEDs) using an Al-based reflector. An as-deposited Al contact to p-GaN with a net hole concentration of 3/spl times/10/sup 17/cm/sup -3/ was rectifying. However, an Al contact with nanoscale Pt islands at the interface exhibited ohmic behavior. A specific contact resistivity of 2.1/spl times/10/sup -3//spl Omega//spl middot/cm/sup 2/ and a reflectance of 84% at 460 nm were measured for the Al contact with nanoscale Pt islands. Current-voltage temperature measurements revealed a Schottky barrier height reduction from 0.80 eV for the Al contact to 0.58 eV for the Al contact with nanoscale Pt islands. The barrier height reduction may be attributed to electric field enhancement and the enhanced tunneling due to the presence of the nanoscale Pt islands. This will offer an additional silver-free option for the p-type ohmic contact in flip-chip configuration LEDs. Theory suggests that the ohmic contact characteristics may be improved further with smaller Pt islands that will enhance tunneling across the interface with the GaN and in the vicinity of the Pt-Al interface.     

Thermally stable Ge/Ag/Ni Ohmic contact for InAlAs/InGaAs/InP HEMTs

Excellent annealed ohmic contacts based on Ge/Ag/Ni metallization have been realized in a temperature range between 385 and 500/spl deg/C, with a minimum contact resistance of 0.06 /spl Omega//spl middot/mm and a specific contact resistivity of 2.62 /spl times/10/sup -7/ /spl Omega//spl middot/cm/sup 2/ obtained at an annealing temperature of 425/spl deg/C for 60 s in a rapid thermal annealing (RTA) system. Thermal storage tests at temperatures of 215 and 250/spl deg/C in a nitrogen ambient showed that the Ge/Ag/Ni based ohmic contacts with an overlay of Ti/Pt/Au had far superior thermal stabilities than the conventional annealed AuGe/Ni ohmic contacts for InAlAs/InGaAs high electron mobility transistors (HEMTs). During the storage test at 215/spl deg/C, the ohmic contacts showed no degradation after 200 h. At 250/spl deg/C, the contact resistance value of the Ge/Ag/Ni ohmic contact increased only to a value of 0.1 /spl Omega//spl middot/mm over a 250-h period. Depletion-mode HEMTs (D-HEMTs) with a gate length of 0.2 /spl mu/m fabricated using Ge/Ag/Ni ohmic contacts with an overlay of Ti/Pt/Au demonstrated excellent dc and RF characteristics.     

Low-Temperature Materials and Thin Film Transistors for Flexible Electronics

This paper addresses the low-temperature deposition processes and electronic properties of silicon based thin film semiconductors and dielectrics to enable the fabrication of mechanically flexible electronic devices on plastic substrates. Device quality amorphous hydrogenated silicon (a-Si:H), nanocrystalline silicon (nc-Si), and amorphous silicon nitride (a-SiN/sub x/) films and thin film transistors (TFTs) were made using existing industrial plasma deposition equipment at the process temperatures as low as 75/spl deg/C and 120/spl deg/C. The a-Si:H TFTs fabricated at 120/spl deg/C demonstrate performance similar to their high-temperature counterparts, including the field effect mobility (/spl mu//sub FE/) of 0.8 cm/sup 2/V/sup -1/s/sup -1/, the threshold voltage (V/sub T/) of 4.5 V, and the subthreshold slope of 0.5 V/dec, and can be used in active matrix (AM) displays including organic light emitting diode (OLED) displays. The a-Si:H TFTs fabricated at 75/spl deg/C exhibit /spl mu//sub FE/ of 0.6 cm/sup 2/V/sup -1/s/sup -1/, and V/sub T/ of 4 V. It is shown that further improvement in TFT performance can be achieved by using n/sup +/ nc-Si contact layers and plasma treatments of the interface between the gate dielectric and the channel layer. The results demonstrate that with appropriate process optimization, the large area thin film Si technology suits well the fabrication of electronic devices on low-cost plastic substrates.     

Sub-500/spl deg/C solid-phase epitaxy of ultra-abrupt p/sup +/-silicon elevated contacts and diodes

A well-controlled low-temperature process, demonstrated from 350/spl deg/C to 500/spl deg/C, has been developed for epitaxially growing elevated contacts and near-ideal diode junctions of Al-doped Si in contact windows to the Si substrate. A physical-vapor-deposited (PVD) amorphous silicon layer is converted to monocrystalline silicon selectively in the contact windows by using a PVD aluminum layer as a transport medium. This is a solid-phase-epitaxy (SPE) process by which the grown Si is Al-doped to at least 10/sup 18/ cm/sup -3/. Contact resistivity below 10/sup -7/ /spl Omega//spl middot/cm/sup 2/ is achieved to both p/sup -/ and p/sup +/ bulk-silicon regions. The elevated contacts have also been employed to fabricate p/sup +/-n diodes and p/sup +/-n-p bipolar transistors, the electrical characterization of which indicates a practically defect-free epitaxy at the interface.     

Evidence and understanding of ALD HfO/sub 2/-Al/sub 2/O/sub 3/ laminate MIM capacitors outperforming sandwich counterparts

Metal-insulator-metal capacitors with atomic-layer-deposited HfO/sub 2/-Al/sub 2/O/sub 3/ laminated and sandwiched dielectrics have been compared, for the first time, for analog circuit applications. The experimental results indicate that significant improvements can be obtained using the laminated dielectrics, including an extremely low leakage current of 1/spl times/10/sup -9/ A/cm/sup 2/ at 3.3V and 125/spl deg/C, a high breakdown electric field of /spl sim/3.3MV/cm at 125/spl deg/C, good polarity-independent electrical characteristics, while retaining relatively high capacitance density of 3.13 fF//spl mu/m/sup 2/ as well as voltage coefficients of capacitance as low as -80 ppm/V and 100 ppm/V/sup 2/ at 100 kHz. The underlying mechanism is likely due to alternate insertions of Al/sub 2/O/sub 3/ layers that reduce the thickness of each HfO/sub 2/ layer, hereby efficiently inhibiting HfO/sub 2/ crystallization, and blocking extensions of grain boundary channels from top to bottom as well as to achieve good interfacial quality.     

A high current gain 4H-SiC NPN power bipolar junction transistor

This work reports the development of high power 4H-SiC bipolar junction transistors (BJTs) by using reduced implantation dose for p+ base contact region and annealing in nitric oxide of base-to-emitter junction passivation oxide for 2 hours at 1150/spl deg/C. The transistor blocks larger than 480 V and conducts 2.1 A (J/sub c/=239 A/cm/sup 2/) at V/sub ce/=3.4 V, corresponding to a specific on-resistance (R/sub sp on/) of 14 m/spl Omega/cm/sup 2/, based on a drift layer design of 12 /spl mu/m doped to 6/spl times/10/sup 15/cm/sup -3/. Current gain /spl beta//spl ges/35 has been achieved for collector current densities ranging from J/sub c/=40 A/cm/sup 2/ to 239 A/cm/sup 2/ (I/sub c/=2.1 A) with a peak current gain of 38 at J/sub c/=114 A/cm/sup 2/.     

Nonalloyed ohmic contacts in AlGaN/GaN HEMTs by ion implantation with reduced activation annealing temperature

This letter reports AlGaN/GaN high-electron mobility transistors with capless activation annealing of implanted Si for nonalloyed ohmic contacts. Source and drain areas were implanted with an Si dose of 1/spl times/10/sup 16/ cm/sup -2/ and were activated at /spl sim/1260/spl deg/C in a metal-organic chemical vapor deposition system in ammonia and nitrogen at atmospheric pressure. Nonalloyed ohmic contacts to ion-implanted devices showed a contact resistance of 0.96 /spl Omega//spl middot/mm to the channel. An output power density of 5 W/mm was measured at 4 GHz, with 58% power-added efficiency and a gain of 11.7 dB at a drain bias of 30 V.     

Improvement of InGaN/GaN laser diodes by using a Si-doped In/sub 0.23/Ga/sub 0.77/N/GaN short-period superlattice tunneling contact layer

InGaN/GaN multiple-quantum-well laser diode (LD) structures, including an Si-doped n/sup +/-In/sub 0.23/Ga/sub 0.77/N/GaN short-period superlattice (SPS) tunneling contact layer, are grown on c-face sapphire substrates by metalorganic vapor-phase epitaxy. The In/sub 0.23/Ga/sub 0.77/N/GaN(n/sup +/)-GaN(p) tunneling junction, which uses a low-resistivity n/sup +/-In/sub 0.23/Ga/sub 0.77/N/GaN SPS instead of a high-resistivity p-type GaN as a top contact layer, allows the reverse-biased tunnel junction to form a "quasi-ohmic" contact. Experimental results indicate that LDs with n/sup +/-In/sub 0.23/Ga/sub 0.77/N/GaN SPS contacting layers can achieve a lower threshold current and longer lasing duration under pulsed operation. Moreover, when the input pulse width is lengthened from 300 ns to 2 /spl mu/s, the lasing duration of the LD with Pt ohmic contact is three times longer than that of the LD with Ni/Au ohmic contacts. Therefore, we conclude that nitride-based LDs with an SPS reversed-tunneling contact layer may significantly reduce the contact resistance of an anode electrode and thereby increase the thermal stability of the device reliability.     

Metal-semiconductor-metal photodetectors with InAlGaP capping and buffer layers

To improve the Schottky contact performance and carrier confinement of GaAs metal-semiconductor-metal photodetectors (MSM-PDs), we employed the wide bandgap material, In/sub 0.5/(Al/sub 0.66/Ga/sub 0.34/)/sub 0.5/P, for the capping and buffer layers. We directly evaluated the Schottky contact parameters on the MSM-PD structure. The reverse characteristics of the Schottky contacts were examined by taking into account the Schottky barrier height depended on the electric field in the depletion region, and hence on the applied bias. The ideality factor and Schottky barrier height of Ti-Pt-Au contacts to In/sub 0.5/(Al/sub 0.66/Ga/sub 0.34/)/sub 0.5/P are 1.02 and 1.05 eV, respectively. Extremely low dark currents of 70 and 620 pA were obtained for these MSM-PDs when they were operated at a reverse bias of -10 V at room temperature and at 70/spl deg/C, respectively.     

Low-resistance Ohmic contacts to digital alloys of n-AlGaN/AlN

Low contact resistance to digital alloys of n-type AlGaN/AlN with high average Al concentration is described. Low-energy electron diffraction was used to evaluate surface precleaning with HCl and buffered HF. The contact metallization consisting of a stack of Ti/Al/Ti/Au, 20/100/45/60 nm in thickness, was e-beam deposited and etch-patterned. The lowest specific contact resistance of 5.6/spl times/10/sup -5/ /spl Omega//spl middot/cm/sup 2/ was obtained after annealing in N/sub 2/ ambient at 700/spl deg/C.     

Characterization of copper germanide as contact metal for advanced MOSFETs

The material and electrical characteristics of /spl epsiv/-Cu/sub 3/Ge as a contact metal were investigated. The samples were prepared by direct copper deposition on germanium wafers, followed by rapid thermal annealing. The /spl epsiv/-Cu/sub 3/Ge formed at 400 /spl deg/C has a resistivity of 6.8 /spl mu//spl Omega//spl middot/cm, which is lower than typical silicides for silicon CMOS. Cross-sectional transmission electron microscopy showed smooth germanide/germanium interface, with a series of nanovoids aligning close to the top surface. These voids are believed to be the results of Kirkendall effect arising from the different diffusion fluxes of copper and germanium. The specific contact resistivity of Cu/sub 3/Ge, obtained from four-terminal Kelvin structures, was found to be as low as 8/spl times/10/sup -8/ /spl Omega//spl middot/cm/sup 2/ for p-type germanium substrate. This low resistivity makes Cu/sub 3/Ge a promising candidate for future contact materials.     

Nitride-based MQW LEDs with multiple GaN-SiN nucleation layers

Nitride-based light emitting diodes (LEDs) separately prepared with a conventional single low-temperature (LT) GaN nucleation layer and multiple GaN-SiN nucleation layers were both prepared. It was found that we could reduce defect density and thus improve crystal quality of the GaN-based LEDs by using multiple GaN-SiN nucleation layers. With a 20-V applied reverse bias, it was found that the reverse leakage currents measured from the LED with a single LT GaN nucleation layer and the one with 10-pair GaN-SiN nucleation layers were 1.5/spl times/10/sup -4/ and 2.5/spl times/10/sup -6/ A, respectively. It was also determined that we could use the multiple GaN-SiN nucleation layers to enhance the output intensity of near ultraviolet (UV) LEDs and to improve the reliability of nitride-based LEDs.     

Effect of annealing on GaN-insulator interfaces characterized by metal-insulator-semiconductor capacitors

GaN metal-oxide-semiconductor (MOS) capacitors have been used to characterize the effect of annealing temperature and ambient on GaN-insulator interface properties. Silicon dioxide was deposited on n-type GaN at 900 /spl deg/C by low-pressure chemical vapor deposition and MOS capacitors were fabricated. The MOS capacitors were used to characterize the GaN-SiO/sub 2/ interface with a low interface-state density of 3 /spl times/ 10/sup 11/ cm/sup -2/eV/sup -1/ at 0.25 eV below the conduction band edge, even after annealing in N/sub 2/ at temperatures up to 1100 /spl deg/C; however, insulator properties were degraded by annealing in NO and NH/sub 3/ at 1100 /spl deg/C.     

Film Properties of MoSi/sub 2/ and Their Application to Self-Aligned MoSi/sub 2/ Gate MOSFET

Molybdenum silicide (MoSi/sub 2/) gate technology has been extensively investigated in conjunction with MOS device performance and reliability. Features of the MoSi/sub 2/) gate technology are to realize a low resistivity of 1 X 10/sup -4/ Omega · cm for both gate and interconnection, and to give rise to higher reliability under both positive and negative bias stress of 2 MV/cm at 250/spl deg/C. Problems on the ohmic contact between MoSi/sub 2/ and single-crystal substrates are not completely solved yet, particularly when the device is processed at high temperature after MoSi/sub 2/ deposition.