An efficient approximation for arbitrary port suppression of multiport scattering parameters

The multiport scattering (S‐) parameter matrix is increasingly utilized to compose models of large bit‐width interconnect systems with broadband characteristics (frequency range of zero to tens of gigahertz) to perform increasingly accurate signal‐integrity and power‐integrity simulations. The search for an optimal solution space often requires generation of S‐parameter models of interconnect systems for various signal/ground pin mappings, a process that can be computationally costly if the structure is electromagnetically solved for each distinct pin mapping. To expedite this model‐generation process, we propose a method in which an N‐port structure is electromagnetically solved only once to yield an N × N S‐matrix; then, a linear system is formulated and solved to yield an (N − M) × (N − M) post‐suppressed S‐matrix (where M is the number of suppressed ports). This approach results in significant computational savings through elimination of electromagnetic field‐solver runs for each distinct pin mapping. Included in this paper is a discussion about the limitations of this technique and several numerical examples. Copyright © 2013 John Wiley & Sons, Ltd.     

Lumped-element filtering power dividers

A power divider is ideally a lossless reciprocal device performing vector summation of two or more input signals, which is an extremely important circuit component in wireless communication systems or radar systems. In this paper, a general concept of lumped-element power divider is discussed. Then, a semi-analytical synthesis technique is presented. General odd-mode and even-mode analysis method is proposed for multi-port symmetrical network and applied in the analysis of N-way lumped-element power dividers. The transmission networks and the matching networks can be synthesized step by step, which greatly simplify their analysis. The transmission networks can be synthesized by those well-known synthesis techniques for two-port networks, and thus the transmission property of power dividers can be accurately controlled. The matching networks are determined by optimization to ensure certain isolation between the output ports. The design procedure is simple and accurate. Apart from the capability of power division, power dividers are also able to play the role of impedance transform and signal processing. Some examples of power dividers with filtering capability are presented for demonstration. In this paper, a general concept of lumped-element power divider is discussed. Then, a semi-analytical synthesis technique is presented. General odd-mode and even-mode analysis method is proposed for multi-port symmetrical network and applied in the analysis of N-way lumped-element power dividers. Transmission networks and matching networks can be synthesized step by step, which greatly simplify their analysis. Apart from the capability of power division, power dividers are also able to play the role of impedance transform and signal processing.     

频谱监测中的多频随机共振检测

基于频段分离思想设计能够完成频谱监测中多频微弱信号的双稳态随机共振检测方案。使用归一化尺度变换对高频段范围内周期信号进行随机共振检测仿真实验;针对随机共振方法对多频信号检测的局限性,利用小波变换频段分离的特性,将小波变换与归一化随机共振相结合,进行多频微弱信号检测仿真实验。仿真结果表明,结合了小波变换的归一化随机共振的方案能够检测出待测频段内的多频微弱周期信号。     

Fast identification of digital amplitude modulation level at low signal-to-noise ratio

In order to rapidly and automatically identify the modulation level of digital amplitude modulated signals at low signal-to-noise ratio (SNR), a method of identifying the modulation levels of M-ary quadrature amplitude modulation (M-QAM) and M-ary amplitude shift keying (M-ASK) is proposed. In this method, wavelet transform with the optimal scale is used to identify the modulation levels of M-QAM and M-ASK signals. The performance of this method was investigated through simulations. Simulation results show that when the SNR is not lower than −4 dB, the percentage of correct identification of M-QAM is higher than 93 %, and when the SNR is not lower than −10 dB, the percentage of correct identification of M-ASK is higher than 90 %, using only 100 observed symbols. It shows that this method can rapidly acquire good performance at a low SNR. __________ Translated from Journal of Tsinghua University (Science and Technology), 2005, 46(1): 35–38 (in Chinese)     

快速独立分量分析算法在局放超声阵列信号去噪中的应用

根据阵列信号去噪需要最大限度保留"相位差"信息的要求,提出采用快速独立分量分析(fast independent component analysis,FastICA)对含噪局放超声阵列信号进行去噪处理。首先通过分离矩阵U实现混合信号中源信号与噪声信号的逐次分离;然后采用波形相似性原则对分离后的信号进行盲抽取,获得去噪后局放超声信号;在此基础之上,对局放超声阵列信号模型进行了重构。同时,提出以阵列流型平均相角差、波形变化趋势、波形相似性以及去噪前后的信噪比等参数对局放超声阵列信号的去噪效果进行综合评价。最后,将FastICA用于实验室实测局放超声阵列信号的去噪。结果表明,FastICA能够很好的抑制局放超声阵列信号中的白噪声,在保证高信噪比的情况下,可最大限度地保留阵列信号的"相位差"信息,确保良好的测向效果。     

Wide‐band aperture array using a four‐channel manifold‐type planar multiplexer and digital 2‐D IIR filterbank

Emerging wide‐band communications and spectrum‐sensing systems demand support for multiple electronically scanned beams while maintaining a frequency independent, constant far‐field beam width. Realizing existing phased‐array technology on a digital scale is computationally intensive. Moreover, digitizing wide‐band signals at Nyquist rate requires complex high‐speed analog‐to‐digital converters (ADCs), which is challenging for real developments driven by the current ADC technology. A low‐complexity alternative proposed in this paper is the use of radio‐frequency (RF) channelizers for spectrum division followed by sub‐sampling of the RF sub‐bands, which results in extensive reduction of the necessary ADC operative frequency. The RF‐channelized array signals are directionally filtered using 2‐D digital filterbanks. This mixed‐domain RF/digital aperture array allows sub‐sampling, without utilizing multi‐rate 2‐D systolic arrays, which are difficult to realize in practice. Simulated examples showing 14–19 dB of rejection of wide‐band interference and noise for a processed bandwidth of 1.6 GHz are demonstrated. The sampling rate is 400 MHz. The proposed VLSI hardware uses a single‐phase clock signal of 400 MHz. Prototype hardware realizations and measurement using 65‐nm Xilinx field‐programmable gate arrays, as well as Cadence RTL synthesis results including gate counts, area‐time complexity, and dynamic power consumption for a 45‐nm CMOS circuit operating at B _DC = 1.1 V, are presented. Copyright © 2016 John Wiley & Sons, Ltd.     

A neural network for signal decomposition problems

This paper presents the design of a neural network for signal decomposition problems with application examples. For this class of problems the proposed network has the same dynamics as the Hopfield net, but it is shown to realize the O(M²) connection paths among the M neurons with a number of wires and conductances increasing only linearly with increasing M, i.e. reducing this number by one dimension with respect to the quadratically increasing number of wires and conductances required in the Hopfield net. Other advantages of the proposed neural network are discussed in relation to classical examples of decomposition problems. In particular, a new architecture for an N-bit A/D converter is presented employing 4N conductances instead of the N(N + 1) Hopfield A/D conductances.     

基于稀疏表示的TQWT在低频振荡信号去噪中应用

为了改善低频振荡信号的去噪效果,为低频振荡信号的检测与分析提供准确可靠的数据,在分析可调Q小波变换和稀疏表示原理的基础上,给出了一种基于稀疏表示的可调Q小波变换去噪方法。该方法先利用可调Q小波变换对含噪的低频振荡信号进行稀疏分解,得到初始的小波系数。再利用基追踪去噪算法对得到的小波系数进行优化处理。最后对优化的小波系数进行重构,获取干净无噪的低频振荡信号。通过仿真分析验证了该方法的去噪效果和可靠性优于目前广泛使用的小波软、硬阈值去噪法。     

Line-to-line Voltage Space Vector Modulation for Neutral-point Clamped Multi-level Converter with DC-link Capacitor Voltage Balancing Using Redundant Vectors

This article presents space vector modulation of line-to-line voltage for the three-phase neutral-point clamped n-level converter with DC-link capacitor voltage balancing using redundant vectors. The developed modulation strategy is based on an equivalent matrix structure of the neutral-point clamped n-level converter. The relation between the 3 × (n – 1) switching functions of the matrix converter and gate signals of transistors of the neutral-point clamped n-level converter is given. A line-to-line space vector modulation strategy for a matrix inverter is used to obtain the switching function. For one switching function, there is more than one combination to produce each output voltage. Thus, redundancies of different switch configurations for generation of intermediate voltages are used to limit the deviation of capacitor voltages. The gate signals of the neutral-point clamped n-level converter can be calculated by inversing the modeling parts. Here, line-to-line voltage space vector modulation for a neutral-point clamped n-level converter is designed without using a Parks transform. Moreover, n × (n – 1) redundant vectors are used for DC bus voltage balancing. To highlight the performances of the developed modulation strategy, simulation results are given for five- and seven-level neutral-point clamped converters. Experimental results are given for a neutral-point clamped three-level converter.     

Robust adaptive beamforming algorithm based on Bayesian approach

The performance of adaptive array beamforming algorithms substantially degrades in practice because of a slight mismatch between actual and presumed array responses to the desired signal. A novel robust adaptive beamforming algorithm based on Bayesian approach is therefore proposed. The algorithm responds to the current environment by estimating the direction of arrival (DOA) of the actual signal from observations. Computational complexity of the proposed algorithm can thus be reduced compared with other algorithms since the recursive method is used to obtain inverse matrix. In addition, it has strong robustness to the uncertainty of actual signal DOA and makes the mean output array signal-to-interference-plus-noise ratio (SINR) consistently approach the optimum. Simulation results show that the proposed algorithm is better in performance than conventional adaptive beamforming algorithms. __________ Translated from Journal of Northeastern University (Natural Science), 2007, 28(6): 793–796 [译自: 东北大学学报 (自然科学版)]     

改进LCMV算法在抑制干扰噪声中的应用

根据波束空间理论提出了一种自适应波束形成算法。通过对输入数据矩阵进行预处理,使得协方差矩阵中不再包含信号子空间向量。为进一步抑制杂波干扰,新算法还引入对角加载,使得改进后的LCMV算法对于不同信噪比的期望信号与干扰信号都能形成特性良好的方向图,提高了阵列天线的输出SINR。仿真证明了算法的有效性。     

A fast second‐order signal separation algorithms with on‐line capabilities

In correlation‐based signal separation algorithms, the received mixed signals are fed to a de‐coupling system designed to minimize the output cross‐correlation functions. If minimizaion is perfect, each of the system's outputs carries only one signal independent of the others. In these algorithms, the computation burden of the output cross‐correlation functions normally slows down the separation algorithm. This paper, describes a computationally efficient method for off‐line pre‐computation of the needed cross‐correlation functions. Explicit formulas have been derived for the output cross‐correlation functions in terms of the received input signals and the de‐coupling system parameters. Then, it is shown that signal separation amounts to the least‐squares solution of a system of linear equations describing these output cross‐correlation functions, evaluated over a batch of lags. Next, a fast RLS‐type adaptive algorithm is devised for on‐line signal separation. In this respect, an algorithm is derived for updating the de‐coupling parameters as data comes in. This update is achieved recursively, along the negative of the steepest descent directions of an objective cost function describing the output cross‐correlation functions over a batch of lags, subject to equal output power constraints. Illustrative examples are given to demonstrate the effectiveness of the proposed algorithms. Copyright © 2002 John Wiley & Sons, Ltd.     

Implementation of a single-phase matrix converter induction motor drive

This paper presents an implementation of a single-phase matrix converter for a variable speed single-phase induction motor. The paper analyzes the characteristics of a single-phase ac–ac converter drive with particular emphasis on the harmonic content, input voltage utilization and variable speed performance of the motor. Both square and sinusoidal wave modulation signals in PWM generation have been used to demonstrate the effect of the modulating signal on the input voltage utilization and output harmonic content. Simulation and experimental results for an R–L and induction motor loads are presented. Promising results illustrate that a good performance of a single-phase induction motor fed by a matrix converter is achievable.     

Decentralized indirect adaptive control of interconnected systems

Continuous time decentralized indirect adaptive controllers are proposed for a large-scale system composed of N interconnected linear subsystems with unknown parameters. Each local adaptive law utilizes a normalizing signal which is generated using the local input and the outputs of all the subsystems. This requires the exchange of output signals between the different subsystems, so that the scheme is no longer totally decentralized. Nevertheless, the degree of computational complexity is about the same as that of a totally decentralized scheme and this makes the scheme very attractive.     

A new fast‐lock,low‐jitter,and all‐digital frequency synthesizer for DVB‐T receivers

Lock time and convergence time are the most important challenges in delay‐locked loops (DLLs). In this paper we cover French very high frequency band with a novel all‐digital fast‐lock DLL‐based frequency synthesizer. Because this new architecture uses a digital signal processing unit instead of using phase frequency detector, charge pump, and loop filter in conventional DLL, therefore, it shows better jitter performance, lock time, and convergence speed than previous related works. Optimization methods are used to make input and output signals of the proposed DLL in phase. The proposed architecture is designed to cover all channels of French very high frequency band by choosing number of delay cells in signal path. Simulation has been done for 22–27 delay cells, and f_REF = 16 MHz, which can produce output frequency in range of 176–216 MHz. Locking time is approximately 0.3 µs, which is equal to five clock cycles of reference clock. All of the simulation results show superiority of the proposed structure. Copyright © 2013 John Wiley & Sons, Ltd.     

Transformer partial discharge signal reconstruction and feature extraction method based on time–frequency matrix

Effectively extracting power transformer partial discharge (PD) signals is of great significance for monitoring the power transformer insulation state. However, practical and effective extraction methods have been lacking. This paper proposes a novel method for the extraction PD signals feature by the analysis of their time–frequency matrix. First, empirical mode decomposition (EMD) is carried out for raw signals to obtain the complete Hilbert time–frequency spectrum. Second, the frequency band partition is carried out. And the component of raw signals on each frequency band is constructed after filtering by a Hilbert–Huang transform (HHT) band‐pass filter. Then the time–frequency matrix is constructed by different frequency band components, and singular value decomposition is carried out. Using its singular value energy spectrum, the PD signal is reconstructed, further realizing feature extraction. Finally, the analysis result from actual examples indicates that this method can effectively extract PD signal feature frequency spectrum, and meanwhile also can eliminate the strong background interference and retain the higher time–frequency resolution. © 2017 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

DC analysis and design of a PWM buck converter operated as a dynamic power supply

Modern energy transmission and signal reproduction techniques rely upon power amplifiers that must operate with high efficiency. An increasingly popular technique for addressing this problem involves replacing the fixed power amplifier supply voltage V _{D D} with a controlled, variable voltage provided by a dynamic power supply. Although pulse‐width modulated dc‐dc buck converters typically function as fixed‐output supplies, this paper provides new theoretical dc analysis for operation wherein the output voltage is controlled and continuously variable over a wide range. A design procedure for the variable‐output buck converter is derived. Key device parameters affecting converter speed and efficiency are identified. The dc analysis and design procedure are verified experimentally, with calculated and measured parameters shown to be in good agreement. Copyright © 2016 John Wiley & Sons, Ltd.     

A narrowband active noise control system with reference synthesis

Most active noise control (ANC) algorithms require a model of the secondary path (SP). If there are large changes in the SP, online SP modeling algorithms may not be able to follow the changes quickly enough to prevent divergence. In this work, the mirror‐MFxLMS (MMFxLMS) is adapted to narrowband ANC, and the resulting algorithm is analyzed. The MMFxLMS is an algorithm similar to the MFxLMS and FxLMS but has online SP modeling; it is stable for any SP estimate and does not require auxiliary noise. In addition, a technique to alternate between MFxLMS and MMFxLMS is proposed, resulting in the M³FxLMS algorithm, which does not sacrifice performance and assures stability. However, the M³FxLMS requires a reference signal that is not available in feedback ANC. Feedback ANC is important in many practical cases, for instance, in ANC headphones. To solve this problem, a technique is proposed to synthesize a reference formed by a sum of sinusoids using measurements from the error sensor signal. This technique uses the fast Fourier transform to obtain estimates of the harmonic frequencies of the periodic noise components, and then refines and tracks these using a phase‐locked loop (PLL). The resulting algorithm enables a stable ANC system, even under large and sudden changes in the SP. The proposed PLL is also new and has a lock‐in range equal to the full band of the system.     

2D‐DOA estimation performance using split vertical linear and circular arrays

This paper presents a new approach to reduce the computational complexity in two‐dimensional (2D) matrix pencil (MP) method for direction of arrival (DOA) estimation of plane wave signals using a combination of vertical uniform linear array (VULA) and uniform circular array (UCA). By applying phase mode excitation based beamforming to the UCA, we can apply the matrix pencil (MP) method to the beamspace data using only a single snapshot. The technique is based on the split array, which is composed of two perpendicular arrays. The vertical uniform linear array used to determine the elevation DOA components is located perpendicularly at the center of the uniform circular array in the horizontal plane used to calculate the azimuth angles. Unlike common planar and circular arrays, this antenna array with its particular geometry requires no pair‐matching between the azimuth and the elevation angle estimation and can also remove the drawbacks of estimation failure problems. Using this particular geometry for the 2D MP method leads to an efficient computational methodology for real‐time implementation on a digital signal processor. The obtained simulation results of the MP method applied to both uncorrelated and correlated narrow‐band sources in the presence of white noise show good performance estimation. © 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Harmonic fold back reduction at the N‐path filters

In this paper, a method is proposed to reduce harmonic fold back (HFB) problem of N‐path filters, without increasing the input reference clock (f_CLK ) frequency. The HFB at the N‐path filter is analyzed, and simple expressions are extracted to model this problem. Using the results of the analysis, an M‐of‐N‐path filter has been proposed that behaves like an M × N‐path filter in terms of HFB problem; however, the f_CLK frequency of this structure is the same as an N‐path filter. To demonstrate the feasibility of the proposed idea, a 3‐of‐4‐path filter is designed, and its characteristics are compared with 4‐path and 12‐path filters by simulation. Impacts of different non‐idealities like clock‐phase error, mismatch, and parasitic capacitance are investigated. The transistor‐level implementation of this filter is performed in 0.18 µm Complementary Metal Oxide Semiconductor (CMOS) technology. The simulation results show that the filter has the pass‐band gain of 17 dB, tuning range of 0.2–1.2 GHz, −3 dB bandwidth of 25 MHz, quality factor of 8–48, 18 dB out‐of‐band rejection, 16 dB rejection of the third harmonic of switching frequency (f_s ), and the noise figure of 4.35 dB (using ideal G_m cells) and 6.95 dB (for practical G_m cells). The strongest harmonic folding to the filter pass‐band occurs around 11f_s with the attenuation of 23.8 dB. Each G_m cell draws about 12.4 mA from 1.8 V supply, and the out‐of‐band IIP3 and P _{1 dB,CP} are 17 and 4 dBm, respectively. Copyright © 2016 John Wiley & Sons, Ltd.