Digitally-implemented naturally sampled PWM suitable for multilevel converter control

For dynamic closed loop control of a multilevel converter with a low pulse number (ratio of switching frequency to synthesized fundamental), natural sampled pulse-width modulation (PWM) is the best form of modulation. Natural sampling does not introduce distortion or a delayed response to the modulating signal. However previous natural sampled PWM implementations have generally been analog. For a modular multilevel converter, a digital implementation has advantages of accuracy and flexibility. Re-sampled uniform PWM is a novel digital modulation technique which approaches the performance of natural PWM. Both hardware and software implementations for a five level multilevel converter phase are presented, demonstrating the improvement over uniform PWM.     

Hybrid one-cycle control scheme for fault-tolerant modular multilevel rectifiers

This paper customises the classic one-cycle control (OCC) scheme for modular multilevel rectifiers (MMRs) and overcomes the inherent defect of the OCC. To be specific, a hybrid one-cycle control scheme is proposed combining the OCC and the virtual loop mapping (VLM). First, on the basis of the classic OCC and the volt-second equivalence principle, the relationships between the MMR arm equivalent duty cycle and the sub-module (SM) duty cycle are derived. Then, by making use of VLM methods, the switching frequency of the SM is reduced and the dynamic capacitor voltage balance is obtained as well. Further, to achieve the single-line-to-ground fault-tolerance capability and eliminate the second harmonic ripple in the DC voltage, the constant power control is presented using the negative-sequence voltage compensation. Specifically, the whole control scheme only needs one proportional integration controller, which greatly reduces the complexity of system control and the system cost. The validity of the proposed scheme is verified through simulation and experimental studies.     

Novel topologies for DC-DC converter with PWM control

Two topologies for the buck converter are presented. The first converter consists of two active switches whereas the second converter, derived from the parent twoswitch converter, consists of only one active switch. The main feature of this new converter is the ability to operate at a constant switching frequency using a simple PWM control. The design of the gate circuit is simplified as there is only one switch. The converter has a good efficiency, as is proved by the experimental results. The operation of the parent two-switch converter, from which the new single-switch converter is derived, is also presented to gain insight into the design of the new converter.     

A new PWM controller with one-cycle response

This paper proposes a new nonlinear control technique that has one-cycle response, does not need a resetable integrator in the control path, and has nearly constant switching frequency. It obtains one-cycle response by forcing the error between the switched variable and the control reference to zero each cycle, while the on and off pulses of the controller are adjusted each cycle to ensure near constant switching frequency. The small switching frequency variation due to changes in the reference signal and supply voltage and delays in the circuit are quantified. Using double-edge modulation, the switching frequency variation is further reduced, thus, the associated signal distortion is minimized. An experimental 0-20 kHz bandwidth 95 W RMS power audio amplifier using the control method demonstrates the applicability of this control technique for high-fidelity audio applications. The amplifier has a power supply ripple rejection (PSRR) of 63 dB at 120 Hz. Additionally, the total harmonic distortion plus noise (THD+N) is less than 0.07% measured with a power supply ripple of 15%     

Soft-switched DC/DC converter with PWM control

In this paper, a new power converter with two variations is proposed. A novel asymmetrical pulse-width-modulation (PWM) control scheme is used to control the power converter under constant switching frequency operation. The modes of operation for both variations are discussed. The DC characteristics, which can be used in the design of the power converters, are also presented. Two 50 W power converters were built to verify the characteristics of the converters. Due to the zero-voltage-switching (ZVS) operation of the switches and low device voltage and current stresses, these power converters have high full- and partial-load efficiencies. They are, therefore, potential candidates for high-efficiency high-density power supply applications     

Improved small-signal analysis for the phase-shifted PWM power converter

A closed form cycle by cycle analysis forms the basis for a new zero-voltage switching (ZVS) phase-shifted PWM (PSPWM) full bridge power converter small-signal model. The paper derives the small-signal response equations. The PSPWM converter has an implicit "slew interval," making the converter dynamics difficult to analyze using traditional averaging techniques. The converter control to output transfer function under continuous conduction mode operation and using voltage-mode control does not exhibit a second order pole associated with the output L-C filter, making it different from a conventional PWM converter. This new PSPWM converter model shows that the output L-C filter is separated into two real poles, with one pole held at constant frequency independent of operating conditions. A characteristic pole depends only upon the converter switching frequency and inductor values. This characteristic pole is fundamental to understanding the PSPWM converter natural and forced responses. The new small-signal model is shown to be in excellent agreement with experimental results.     

基于单周期控制的高功率因数整流器仿真

为了提高电压型PWM整流器(VSR)的功率因数,减少网侧电流谐波含量,对采用单周期控制的整流器进行了研究.与传统的控制方法相比,单周期控制OCC(One-Cycle Control)技术是一种不需要乘法器的新颖功率因数校正PFC(Power Factor Correction)控制方法.阐述了三相电压型PWM整流器的拓扑结构、工作原理及控制策略,并利用saber软件进行了仿真.仿真结果表明,采用单周期控制的整流器能够实现单位功率因数.     

An integrated one-cycle control buck converter with adaptive output and dual loops for output error correction

An integrated adaptive-output switching converter is presented. This converter adopts one-cycle control for fast line response and dual error correction loops for tight load regulation. A dc level shifting technique is proposed to eliminate the use of negative supply and reference voltages in the controller and make the design compatible with standard digital CMOS process. The design accommodates both continuous and discontinuous conduction operations. To further enhance the efficiency, dynamic loss control on the power transistors is proposed to minimize the sum of switching and conduction losses. The design can be extended to other dc-dc and ac-dc conversions. The prototype of the buck converter was fabricated with a standard 0.5-/spl mu/m digital CMOS process. Experimental results show that the converter is well regulated over an output range of 0.9-2.5 V, with a supply voltage of 3.3 V. The tracking speeds are 12.25 /spl mu/s/V for a 1.6-V step-up output change and 13.75 /spl mu/s/V for a 1.6-V step-down output change, respectively, which are much faster than existing counterparts. Maximum efficiency of 93.7% is achieved and high efficiency above 75% is retained over an output power ranging from 10 to 450 mW.     

Two-switch forward soft-switching PWM DC-DC power converter

A novel prototype is presented of a two-switch forward soft-switching PWM DC-DC power converter with reduced switching and conduction power losses, which can operate under two soft commutations of zero voltage and zero current of full bridge circuit topology     

Zero-voltage-switching half-bridge DC-DC converter with modified PWM control method

Asymmetric control scheme is an approach to achieve zero-voltage switching (ZVS) for half-bridge isolated dc-dc converters. However, it is not suited for wide range of input voltage due to the uneven voltage and current components stresses. This paper presents a novel "duty-cycle-shifted pulse-width modulated" (DCS PWM) control scheme for half-bridge isolated dc-dc converters to achieve ZVS operation for one of the two switches without causing the asymmetric penalties in the asymmetric control and without adding additional components. Based on the DCS PWM control scheme, an active-clamp branch comprising an auxiliary switch and a diode is added across the isolation transformer primary winding in the half-bridge converter to achieve ZVS for the other main switch by utilizing energy stored in the transformer leakage inductance. Moreover, the auxiliary switch also operates at ZVS and zero-current switching (ZCS) conditions. Furthermore, during the off-time period, the ringing resulted from the oscillation between the transformer leakage inductance and the junction capacitance of two switches is eliminated owing to the active-clamp branch and DCS PWM control scheme. Hence, switching losses and leakage-inductance-related losses are significantly reduced, which provides the converter with the potential to operate at higher efficiencies and higher switching frequencies. The principle of operation and key features of the proposed DCS PWM control scheme and two ZVS half-bridge topologies are illustrated and experimentally verified.     

A single-phase active power filter with one-cycle control under unipolar operation

In this paper, analysis and design for a single-phase active power filter (APF) with one-cycle control is presented. The proposed control method eliminates the need of sensing the load current, a nontrivial task of calculating the harmonics and reactive current components, as well as the use of multipliers, as reported by many previously reported approaches. In addition, the switching loss is reduced by employing unipolar operation, where only two out of four switches are operated at switching frequency while the other two are stationary on or off during an entire half-line cycle. The design methodology taking electromagnetic interference filter into account is also discussed in detail. The theoretical analysis is verified by experiments.     

一种应用于PWM D类音频功率放大器的CMOS Rail-to-Rail比较器

提出了一种应用于CMOS D类音频功率放大器的Rail-to-Rail PWM比较器,其输入级为Rail-to-Rail结构,输出级为AB类输出。基于CSMC 0.5μm CMOS工艺的BSIM3V3 Spice模型,采用Hspice对PWM比较器的特性进行了仿真,典型模型下的直流开环增益为50dB,电源抑制比为52dB,ICMR为0.04V~4.98V,传输时延为24.5ns,版图有效面积为210×75μm2。由于PWM比较器的良好性能参数,所以其不仅适用于D类音频功率放大器,也能应用于各类低频数据转换电路。     

改善PWM电源控制器低负载运行的缓冲放大器和LED

德州仪器公司的UCC3895是建立一个高效脉宽调制、开关模式电源的良好基础．它适合于电流模式或电压模式控制。该设计采用两组互补输出（A至D）驱动一个全桥功率变换器．用相对于A和B的相移输出C和D控制功率。制造商的数据手册有这方面的详细说明（参考文献1）。但是．当用于轻负载并构置电流模式控制时．在起动条件下控制器的滞后输出C和D上会产生不对称宽度的脉冲。参考文献2对这个问题及变通方法有完整的描述。     

A high efficiency PWM CMOS class-D audio power amplifier

Based on the difference close-loop feedback technique and the difference pre-amp, a high efficiency PWM CMOS class-D audio power amplifier is proposed. A rail-to-rail PWM comparator with window function has been embedded in the class-D audio power amplifier. Design results based on the CSMC 0.5 μm CMOS process show that the max efficiency is 90%, the PSRR is -75 dB, the power supply voltage range is 2.5-5.5 V, the THD+N in 1 kHz input frequency is less than 0.20%, the quiescent current in no load is 2.8 mA, and the shutdown current is 0.5 μA. The active area of the class-D audio power amplifier is about 1.47 × 1.52 mm2. With the good performance, the class-D audio power amplifier can be applied to several audio power systems.     

一种高效率 PWM CMOS D类音频功率放大器

基于反馈系统的闭环结构,采用全差分前置放大和全差分反馈结构,提出了一种高效率PWM CMOS D类音频功率放大器,并采用一种具有滞回结构Rail-to-Rail比较器作为PWM比较器,以保证良好的噪声性能。整个电路基于CSMC 0.5μm CMOS工艺进行实现,最大转换效率达到90％,电源电压范围为2.5-5.5V,1kHz下的THD+N小于0.20％,电源抑制比为-75dB,空载消耗电流为2.8mA,待机电流为0.5μA,有效芯片面积为1.47mm*1.52mm,最大功率可以达到2.5W,能应用于各种高效率中小功率音频放大系统。     

A new control scheme for single-phase PWM multilevel rectifier withpower-factor correction

A new control scheme for a single-phase bridge rectifier with three-level pulsewidth modulation is proposed to achieve high power factor and low current distortion. The main circuit consists of a diode-bridge rectifier, a boost inductor, two AC power switches, and two capacitors. According to the proposed control scheme based on a voltage comparator and hysteresis current control technique, the output capacitor voltages are balanced and the line current will follow the supply current command. The supply current command is derived from a DC-link voltage regulator and an output power estimator. The major advantage of using a three-level rectifier is that the blocking voltage of each AC power device is clamping to half of the DC-link voltage and the generated harmonics of the three-level rectifier are less than those of the conventional two-level rectifier. There are five voltage levels (0, ±V_DC/2, ±V_DC) on the AC side of the diode rectifier. The high power factor and low harmonic currents at the input of the rectifier are verified by software simulations and experimental tests     

Dual sepic PWM switching-mode DC/DC power converter

A steady-state analysis and experimental results for a dual sepic pulse-width-modulated (PWM) DC/DC power converter for both continuous and discontinuous modes of operation are presented. The converter is dual to a sepic converter, but it can also be derived from a forward converter by replacing one of its rectifier diodes with a coupling capacitor. The circuit acts as a step-down or step-up converter, depending on the value of the ON switch duty cycle. The transformerless version of the converter has a positive DC/DC voltage transfer function. Therefore, the circuit is suitable for distributed power systems. Design equations for all circuit components are derived. Experimental results measured at 100 kHz were in good agreement with theoretical predictions     

PWM型功率放大器长线传输波形整型

为解决PWM功率放大器输出长线传输引发的波形畸变,可能伤及力矩电动机的问题,对实际系统结构进行了理论分析,找出了可能引发波形畸变的原因,并给出了3种解决方法.实际试验结果证实所给方法的有效性.     

A PWM plus phase-shift control bidirectional DC-DC converter

A pulse-width modulation (PWM) plus phase-shift control bidirectional dc-dc converter is proposed. In this converter, PWM control and phase-shift control are combined to reduce current stress and conduction losses, and to expand ZVS range. The operation principle and analysis of the converter are explained, and ZVS condition is derived. A prototype of PWM plus phase-shift bidirectional dc-dc converter is built to verify the analysis.     

Multicarrier PWM strategies for multilevel inverters

Analytical solutions of pulsewidth-modulation (PWM) strategies for multilevel inverters are used to identify that alternative phase opposition disposition PWM for diode-clamped inverters produces the same harmonic performance as phase-shifted carrier PWM for cascaded inverters, and hybrid PWM for hybrid inverters, when the carrier frequencies are set to achieve the same number of inverter switch transitions over each fundamental cycle. Using this understanding, a PWM method is then developed for cascaded and hybrid inverters to achieve the same harmonic gains as phase disposition PWM achieves for diode-clamped inverters. Theoretical and experimental results are presented in the paper.