共查询到20条相似文献,搜索用时 843 毫秒
1.
Li Shutao Wang Yaonan Wu Jie 《电子科学学刊(英文版)》2001,18(4):346-350
In this paper a novel log-domain current-mode integrator based on MOS transistors in subthreshold is proposed. The integrator's time-constant is tunable by varying a reference bias current. By use of the integrator, a fifth-order Chebyshev lowpass filter with 0.1dB ripples is designed. The simulation results demonstrate that the proposed filter has such advantages as low power supply(1.5V), very low power dissipation (μW level), nearly ideal frequency response, very small sensitivity to components in passband, and adjustable cut-off frequency over a wide range. The circuit is composed of NMOS transistors and grounded capacitors which make it suitable for fully integrated circuit implementation. 相似文献
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差分式CMOS多功能电流模式滤波器 总被引:5,自引:5,他引:0
王春华 《微电子学与计算机》2005,22(1):163-165
本文提出多端输出的CMOS电流加法器,在此基础上提出了新型差分式CMOS多功能电流模式滤波器的信号流图和电路。该滤波电路能同时产生二阶低通、带通、高通输出,并通过适当的连接能产生二阶带阻和全通滤波输出。对提出的滤波器截止频率为1MHz的电路进行了计算机PSPICE仿真。 相似文献
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In this work, new Kerwin-Huelsman-Newcomb (KHN) biquads employing current-controlled current conveyors (CCCIIs) in voltage-mode (VM) as well as in current-mode (CM) are presented. The parameters of the proposed circuits can be electronically controlled thanks to the tunability properties of the CCCIIs. The VM circuit is derived from a previously reported one by modifying its summing circuit and replacing the current conveyor(CCIIs) and resistors at their x-input terminals with CCCIIs. On the other hand, the CM circuit is derived from the adjoint graph of the signal-flow graph corresponding to the classical KHN circuit. This circuit is a multi-input single-output CM universal filter, which offers all the main advantages of the CM circuits as well as those of the classical KHN circuit. In addition to the three basic filter responses, they also allow the realization of the notch and the all pass responses. 相似文献
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A novel current reference based on subthreshold MOSFETs with high power supply rejection ratio (PSRR) is presented. The proposed circuit takes full advantages of the I-V transconductance characteristics of MOSFET operating in the subthreshold region and the enhancement pre-regulator with the high gain negative feedback loop for the current reference core circuit. The proposed circuit, designed with the SMIC 0.18 μm standard CMOS logic process technology, exhibits a stable current of about 1.701 μA with much low temperature coefficient of 2.5×10−4 μA/°C in the temperature range of −40 to 150 °C at 1.5 V supply voltage, and also achieves a best PSRR over a broad frequency. The PSRR is about −126 dB at dc frequency and remains −92 dB at the frequency higher 1 MHz. The proposed circuit operates stably at the supply voltage higher 1.2 V and has good process compatibility. 相似文献
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This paper introduces a new low-voltage, low-power FVF current mirror circuit. The bulk-driven (BD) technique is employed to achieve extended input voltage swing and low supply voltage. Besides, the quasi-floating gate (QFG) is used to achieve high frequency performance. The merging of (BD) and (QFG) appear as a good and attractive solution to improve the circuit performance with reduced supply voltage. Benefiting from the interesting properties of (BD-QFG) MOSFET (MOST) technique, the proposed FVF current mirror circuit exhibits superior performance compared to other previously reported works. The workability of the proposed circuit has been verified through ELDO simulator based on a 0.18 μm USMC process. It achieves an enhanced bandwidth (2.7 GHz), low power consumption (79.33 μW), a low input impedance (130 Ω), and high output impedance (9.5 G Ω) from a low supply voltage (0.8 V). Monte Carlo simulation is also carried out, which proves the robust performance of the proposed circuit against mismatches. An application of the proposed current mirror is presented in the form of the current comparator to ensure the workability of the proposed BD-QFG current mirror. 相似文献
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This paper presents an on-chip current flattening circuit designed in 0.18-μm CMOS technology, which can be integrated with secure microsystems, such as smart cards, as a countermeasure against power analysis attacks. The robustness of the proposed countermeasure is evaluated by measuring the number of current traces required for a differential power analysis attack. We analyze the relationship between the required number of current traces and the dynamic current variations, and we show empirically that the required numbers of current traces is proportional to an inverse of the square of the rms value of the flattened current. Finally, we evaluate the effectiveness of the proposed design by using the experimental results of the fabricated chip. The analysis of the experimental results confirms the effectiveness of the current flattening circuit. 相似文献
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In this paper, analysis and design of a new current-mode instrumentation amplifier (CMIA) circuit is presented. The proposed circuit employs two Current Operational Amplifiers (COA) as active building blocks, one resistor and two transistors operating as variable resistors to electronically control the differential-mode gain. The main feature of the proposed CMIA is that unlike most previously reported CMIAs, its CMRR has negligible sensitivity to mismatches. In addition, in the proposed circuit both active building blocks operate in negative feedback loop which results in an overall enhanced performance. SPICE simulation results using 0.18 μm TSMC CMOS parameters and supply voltage of ±0.9 V show a constant CMRR of about 51 dB regardless of mismatches and wide bandwidth ranging from 14.8 MHz to about 3 MHz for differential-mode gains between 3 and 18 dB, respectively. 相似文献
10.
Jiun-Wei Horng 《Microelectronics Journal》2011,42(5):693-700
Three current-mode universal biquadratic filters each with five input terminals and one output terminal are presented. The first proposed circuit uses three multi-output second-generation current conveyors, two grounded capacitors and three resistors. This circuit offers the following advantageous features: orthogonal controllability of resonance angular frequency and quality factor, high output impedance, the versatility to synthesize all standard filter types without component matching condition and using grounded capacitors. The second proposed circuit uses three multi-output second-generation current conveyors, two grounded capacitors and two resistors. This circuit offers the following advantageous features: using minimum passive components, high output impedance, the versatility to synthesize all standard filter types without component matching condition and using grounded capacitors. The third proposed circuit uses three multi-output second-generation current conveyors, two grounded capacitors and three grounded resistors. This circuit offers the following advantageous features: the versatility to synthesize all standard filter types, high output impedance and using only grounded passive components. Each of the proposed circuits can get five kinds of filter functions by using only one current input signal. 相似文献
11.
Jiun-Wei Horng 《Circuits, Systems, and Signal Processing》2008,27(4):553-562
A new high input impedance voltage-mode universal biquadratic filter with three input terminals and five output terminals
is presented. The proposed circuit uses three plus-type differential difference current conveyors, two grounded resistors
and two grounded capacitors. The proposed circuit can realize all the standard filter functions: lowpass, bandpass, highpass,
notch and allpass, without component matching conditions. The proposed circuit offers the features of high input impedance,
low active and passive sensitivities and the use of only grounded resistors and capacitors. 相似文献
12.
阐述了微型计算机串行通信中20mA电流环方式较之电平驱动方式的优点,提出了一种基于通用串行接口实现电流环方式通信的设计方案。设计了合理的接线图和电路原理图,并就有关电路设置、工作原理进行了详细说明。 相似文献
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Erkan Yuce 《Analog Integrated Circuits and Signal Processing》2006,49(2):161-166
In this paper, two novel circuits for realizing floating inductance, floating capacitance, floating frequency dependent negative
resistance (FDNR) and grounded to floating admittance converter depending on the passive component selection are proposed.
Both of the proposed simulators employ second-generation current controlled conveyors (CCCIIs) and only grounded passive elements.
The non-ideal current and voltage gain as well as parasitic impedance effects on the first proposed circuit are investigated.
Also, simulation results using SPICE program are given for the first introduced floating simulator to verify the theory and
to exhibit the performance of the circuit. 相似文献
17.
新型差动输入CMOS电流传送器及其应用 总被引:1,自引:0,他引:1
基于P阱CMOS工艺提出了一种新的差动输入电流传送器。通过引入误差抑制负反馈电路,有效地减小了信号失真,拓宽了电路线性动态范围。文中还详细分析了电路性能,并由此指导电路的优化。给出的几个典型应用电路表明,与第二代电流传送器(CCII)相比,差动输入电流传送器的通用性更强,可获得较简洁的电路结构。本文最后设计了一个既可作为电流模式又可作为电压模式的MOSFET-C二阶滤波器。PSPICE模拟表明所提出的电路与其它同类电路相比具有更好的电路特性。 相似文献
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All-pass filters are widely used to shift the phase of an analog signal without altering its magnitude. In this study, a new realization of all-pass filter using one current controlled conveyor (CCCII), one operational amplifier (OP-AMP) and two capacitors is presented. The proposed circuit does not use any resistors thus it is suitable for easy integration. Also the pole frequency of the proposed circuit can be tuned electronically. Simulation results are included to verify theory. 相似文献
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一系列新的基于电流模式的二阶滤波器 总被引:1,自引:0,他引:1
本文提出了一种新的基于电流模式的二阶滤波器综合电路,适当选择电路元件,可综合出一系列电流模式二阶低通、高通和带通滤波电路,对其中部分电路进行了理论设计和灵敏度分析,结果表明本文提出的电路灵敏度低、增益可独立调节。计算机仿真结果证实了理论分析的正确性。 相似文献
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This paper describes the design of an adiabatic-CMOS/CMOS-adiabatic logic interface circuit for a group of low-power adiabatic logic families with a similar clocking scheme. The circuit provides interfacing between several recently proposed low-power adiabatic logic circuits and traditional digital CMOS circuits. One advantage of this design is that it is insensitive to clock overlap. With the proposed interface circuit, both adiabatic and CMOS logic circuits are able to co-exist on a single chip, taking advantage of the strengths of each approach in the design of low power systems. 相似文献