Optimum design and fabrication of InAlAs/InGaAs HEMT's on GaAs withboth high breakdown voltage and high maximum frequency of oscillation

A simple model to describe the dependence of the breakdown voltage between gate and drain on width of the gate recess in an InAlAs/InGaAs high electron mobility transistor (HEMT) is presented. In this model, the depletion region laterally spreads to the drain region. It enables us to express the dependence of device parameters on the width of the gate recess. The model suggests that the breakdown voltage increases with the width of the gate recess and then saturates, which is experimentally confirmed. Calculations based on the model show that the maximum frequency of oscillation (f_max) also increases with the width of the gate-recess due to the reduction in both the drain conductance and the gate-to-drain capacitance, and then slightly decreases with the width due to the increase in the source resistance. We fabricated InAlAs/InGaAs HEMT's lattice-mismatched on GaAs substrates with optimum recess-width, and these exhibited both a high breakdown voltage of 14 V and a high f_max of 127 GHz at a gate length of 0.66 μm     

Super low noise InGaP gated PHEMT

Very high performance InGaP/InGaAs/GaAs PHEMTs will be demonstrated. The fabricated InGaP gated PHEMTs devices with 0.25 × 160/cm² and 0.25 × 300 μm² of gate dimensions show 304 mA/mm and 330 mA/mm of saturation drain current at V_GS = 0 V, V_DS = 2 V, and 320 mS/mm and 302 mS/mm of extrinsic transconductances, respectively. Noise figures for 160 μm and 300 μm gate-width devices at 12 GHz are measured to be 0.46 dB with a 13 dB associated gain and 0.49 dB with a 12.85 dB associated gain, respectively. With such a high gain and low noise, the drain-to-gate breakdown voltage can be larger than 11 V. Standard deviation in the threshold voltage of 22 mV for 160 μm gate-width devices across a 4-in wafer can be achieved using a highly selective wet recess etching process. Good thermal stability of these InGaP gated PHEMTs is also presented     

High-linearity high-current-drivabilityGa0.51In0.49P/GaAs MISFET usingGa0.51In0.49P airbridge gate structure grown byGSMBE

A novel structure Ga_0.51In_0.49P/GaAs MISFET with an undoped Ga_0.51In_0.49P layer serving as the airbridge between active region and gate pad was first designed and fabricated. Wide and flat characteristics of g_m and f_max versus drain current or gate voltage were achieved. The device also showed a very high maximum current density (610 mA/mm) and a very high gate-to-drain breakdown voltage (25 V). Parasitic capacitances and leakage currents were minimized by the airbridge gate structure and thus high f_T of 22 GHz and high f_max of 40 GHz for 1 μm gate length devices were attained. To our knowledge, both were the best reported values for 1 μm gate GaAs channel FET's     

0.1 μm Schottky-collector AlAs/GaAs resonant tunneling diodes

The Schottky-collector resonant tunneling diode (RTD) is an RTD with the normal N+ collector and ohmic contact replaced by a Schottky contact, thereby eliminating the associated parasitic resistance. With submicron Schottky contact dimensions, the remaining components of the parasitic series resistance can be greatly reduced, resulting in an increased maximum frequency of oscillation, f_max. AlAs/GaAs Schottky-collector RTDs were fabricated using 0.1 μm T-gate technology developed for high electron mobility transistors. From their measured dc and microwave parameters, and including the effect of the quantum well lifetime, f_max=900 GHz is computed     

4H-SiC MESFET's with 42 GHz fmax

We report for the first time the development of state-of-the-art SiC MESFETs on high-resistivity 4H-SiC substrates. 0.5 μm gate MESFETs in this material show a new record high f_max of 42 GHz and RF gain of 5.1 dB at 20 GHz. These devices also show simultaneously high drain current, and gate-drain breakdown voltage of 500 mA/mm, and 100 V, respectively showing their potential for RF power applications     

Enhancement-mode high electron mobility transistors (E-HEMTs)lattice-matched to InP

The fabrication and characterization of high-speed enhancement-mode InAlAs/InGaAs/InP high electron mobility transistors (E-HEMTs) have been performed. The E-HEMT devices were made using a buried-Pt gate technology. Following a Pt/Ti/Pt/Au gate metal deposition, the devices were annealed in a nitrogen ambient, causing the bottom Pt layer to sink toward the channel. This penetration results in a positive shift in threshold voltage. The dc and RF performance of the devices has been investigated before and after the gate annealing process. In addition, the effect of the Pt penetration was investigated by fabricating two sets of devices, one with 25 nm of Pt as the bottom layer and the other with a 5.0 nm bottom Pt layer. E-HEMTs were fabricated with gate lengths ranging from 0.3 to 1.0 μm. A maximum extrinsic transconductance (g_mext) of 701 mS/mm and a threshold voltage (V_T) of 167 mV was measured for 0.3 μm gate length E-HEMTs. In addition, these same devices demonstrated excellent subthreshold characteristics as well as large off-state breakdown voltages of 12.5 V. A unity current-gain cutoff frequency (f _t) of 116 GHz was measured as well as a maximum frequency of oscillation (f_max) of 229 GHz for 0.3 μm gate-length E-HEMTs     

Metamorphic InAlAs/InGaAs HEMTs on GaAs substrates with a novelcomposite channels design

We report on fabrication and performance of novel 0.13 μm T-gate metamorphic InAlAs/InGaAs HEMTs on GaAs substrates with composite InGaAs channels, combining the superior transport properties of In_0.52Ga_0.48As with low-impact ionization in the In_0.32Ga_0.68As subchannel. These devices exhibit excellent DC characteristics, high drain currents of 750 mA/mm, extrinsic transconductances of 600 mS/mm, combined with still very low output conductance values of 20 mS/mm, and high channel and gate breakdown voltages. The use of a composite InGaAs channels leads to excellent cut-off frequencies: f_max of 350 GHz and an f_T 160 GHz at V_DS=1.5 V. These are the best microwave frequency results ever reported for any FET on GaAs substrate     

Epitaxially-grown GaN junction field effect transistors

Junction field effect transistors (JFETs) are fabricated on a GaN epitaxial structure grown by metal organic chemical vapor deposition (MOCVD). The dc and microwave characteristics of the device are presented. A junction breakdown voltage of 56 V is obtained corresponding to the theoretical limit of the breakdown field in GaN for the doping levels used. A maximum extrinsic transconductance (g_m ) of 48 mS/mm and a maximum source-drain current of 270 mA/mm are achieved on a 0.8 μm gate JFET device at V_GS=1 V and V_DS=15 V. The intrinsic transconductance, calculated from the measured g_m and the source series resistance, is 81 mS/mm. The f_T and f_max for these devices are 6 GHz and 12 GHz, respectively. These JFET's exhibit a significant current reduction after a high drain bias is applied, which is attributed to a partially depleted channel caused by trapped hot-electrons in the semi-insulating GaN buffer layer. A theoretical model describing the current collapse is presented, and an estimate for the length of the trapped electron region is given     

Demonstration of submicron depletion-mode GaAs MOSFETs withnegligible drain current drift and hysteresis

We successfully fabricated submicron depletion-mode GaAs MOSFETs with negligible hysteresis and drift in drain current using Ga₂ O₃(Gd₂O₃) as the gate oxide. The 0.8-μm gate-length device shows a maximum drain current density of 450 mA/mm and a peak extrinsic transconductance of 130 mS/mm. A short-circuit current gain cutoff frequency (f_T) of 17 GHz and a maximum oscillation frequency (f_max) of 60 GHz were obtained from the 0.8 μm×60 μm device. The absence of drain current drift and hysteresis along with excellent characteristics in the submicron devices is a significant advance toward the manufacture of commercially useful GaAs MOSFETs     

Extremely high transconductance Ge/Si0.4Ge0.6p-MODFET's grown by UHV-CVD

Ge-channel modulation-doped field-effect transistors (MODFET's) with extremely high transconductance are reported. The devices were fabricated on a compressive-strained Ge/Si_0.4Ge_0.6 heterostructure with a Hall mobility of 1750 cm²/Vs (30,900 cm²/Vs) at room temperature (77 K). Self-aligned, T-gate p-MODFET's with L_g=0.1 μm displayed an average peak extrinsic transconductance (g(m_ext)) of 439 mS/mm, at a drain-to-source bias voltage (V_ds) of -0.6 V, with the best device having a value of g(m_ext)=488 mS/mm. At 77 K, values as high as g(m_ext)=687 mS/mm were obtained at a bias voltage of only V_ds=-0.2 V. These devices also displayed a unity current gain cutoff frequency (f_T) of 42 GHz and maximum frequency of oscillation (f_max) of 86 GHz at V_ds=-0.6 V and -1.0 V, respectively     

Partially depleted SOI NMOSFET's with self-aligned polysilicon gateformed on the recessed channel region

A new SOI NMOSFET with a “LOCOS-like” shape self-aligned polysilicon gate formed on the recessed channel region has been fabricated by a mix-and-match technology. For the first time, we developed a new scheme for implementing self-alignment in both source/drain and gate structure in recessed channel device fabrication. Symmetric source/drain doping profile was obtained and highly symmetric electrical characteristics were observed. Drain current measured from 0.3 μm SOI devices with V_z of 0.773 V and T_ox=7.6 nm is 360 μA/μm at V_GS=3.5 V and V _DS=2.5 V. Improved breakdown characteristics were obtained and the BV_DSS (the drain voltage for 1 nA/μm of I_D at T_GS=0 V) of the device with L_eff=0.3 μm under the floating body condition was as high as 3.7 V     

Fabrication and characterization of a depletion-mode ZnS0.07Se0.93 MESFET

We report the fabrication and characterization of a depletion-mode n-channel ZnS_0.07Se_0.93 metal-semiconductor field effect transistor (MESFET). A ZnSSe FET could be a key element in opto-electronic integration consisting of light emitters, light receivers and MESFET pre-amplifiers. Mesa isolation, recess etching and self-alignment techniques were adopted to optimize the MESFET performance. Source and drain (S/D) ohmic contacts and gate Schottky contact were formed by Cr/In/Cr and Au deposition, respectively. Depletion mode FET's with varying gate width-to-length ratio of W/L=200 μm/20 μm, 200 μm/4 μm and 200 μm/2 μm were fabricated. A 2 μm FET was characterized as follows: the turn-on voltage, V_on≈1.75 V, the pinch-off voltage, V_p≈-13 V, the unit transconductance, g_m≈8.73 mS/mm, and the breakdown voltage with zero gate-source bias, BV≈28 V     

An all implanted self-aligned enhancement mode n-JFET with Zn gatesfor GaAs digital applications

An all implanted self-aligned n-channel JFET fabrication process is described where Zn implantation is used to form the p⁺ gate region. A refractory metal (W) gate contact is used to allow subsequent high temperature activation of the self-aligned Si source and drain implant. 0.7 μm JFET's have a maximum transconductance of 170 mS/mm with a saturation current of 100 mA/mm at a gate bias of 0.9 V. The p⁺/n homojunction gate has a turn on voltage of 0.95 V at a current of 1 mA/mm. The drain-source breakdown voltage is 6.5 V. Microwave measurements made at a gate bias of 1 V show an f_t of 19 GHz with an f_max of 36 GHz. These devices show promise for incorporation in both DCFL and complementary logic circuits     

Temperature-dependent nonlinearities in GaN/AlGaN HEMTs

Temperature-dependent nonlinearities of GaN/AlGaN HEMTs are reported. The large-signal device model of the transistor is obtained by using a physics-based analysis. The model parameters are obtained as functions of bias voltages and temperature. The analysis of the device has been carried out using a time-domain technique. f_max for a 0.23 μm×100 μm Al_0.13Ga_0.87N/GaN FET is calculated as 69 GHz at 300 K, while at 500 K, f_max decreases to 30 GHz, which are in agreement with the experimental data within 7% error. f_max as obtained from calculated unilateral gain, decreases monotonically with increasing temperature. For shorter gate lengths irrespective of the operating temperature f_max is less sensitive to bias voltage scaling. For longer gate length devices, f_max becomes less sensitive to the bias voltage scaling at elevated temperatures. 1-dB compression point (P_1-dB ) at 4 GHz for a 1 μm×500 μm Al_0.15Ga_0.85N/GaN FET is 13 dBm at 300 K. At 500 K, P_1-dB decreases to 2.5 dBm for the same operating frequency. Similar results for output referred third intercept point (OIP3) are reported for different gate length devices     

A novel InGaAs/InAlAs insulated gate pseudomorphic HEMT with asilicon interface control layer showing high DC- and RF-performance

A novel InGaAs/InAlAs insulated gate pseudomorphic HEMT (IG-PHEMT) utilizing a silicon interface control layer (Si ICL) was successfully fabricated and its DC and RF performances were characterized. The device showed high transconductance of 177 mS/mm even for a gate length of 1.6 μm. As compared with the conventional Schottky gate PHEMTs, the gate leakage current was reduced by 4 orders of magnitudes and the gate breakdown voltage was increased up to 39 V. Well-behaved RF characteristics with the current gain cutoff frequency, f_T, of 9 GHz and the maximum oscillation frequency, f_max, of 38 GHz were obtained for the 1.6 μm-gate-length device     

Low noiseIn0.32(AlGa)0.68As/In0.43Ga0.57As metamorphic HEMT on GaAs substrate with 850 mW/mm output powerdensity

A double-pulse-doped InAlGaAs/In_0.43Ga_0.57As metamorphic high electron mobility transistor (MHEMT) on a GaAs substrate is demonstrated with state-of-the-art noise and power performance, This 0.15 μm T-gate MHEMT exhibits high on- and off-state breakdown (V_ds>6 V and V_dg>13 V, respectively) which allows biasing at V_ds>5 V. The 0.6 mm device shows >27 dBm output power (850 mW/mm) at 35 GHz-the highest reported power density of any MHEMT. Additionally, a smaller gate periphery 2×50 μm (0.1 mm) 43% MHEMT exhibits a F_min=1.18 dB and 10.7 dB associated gain at 25 GHz, and also is the first noise measurement of a -40% In MHEMT. A double recess process with selective etch chemistries provides for high yields     

Recess dependent breakdown behavior of GaAs-HFETs

GaAs based HEMT devices were fabricated with a constant recess towards the source, whereas the recess width towards the drain was varied. While the off-state breakdown voltage has been improved by the use of a wide recess towards the drain, no dependence of the on-state breakdown on the recess configuration was observed. The constant breakdown voltage in the on-state is analysed by the feedback parameters obtained from an extraction of the small signal equivalent circuit. Although the extrinsic gate drain capacitance could be reduced by the use of a wider recess configuration, it is assumed that the intrinsic drift region is independent of the recess configuration     

GaAs MOSFETs fabrication with a selective liquid phase oxidizedgate

The N-channel depletion-mode GaAs MOSFETs with a liquid phase chemical enhanced selective gate oxide grown at low temperature are demonstrated. The proposed selective oxidation method makes the fabrication process of GaAs MOSFETs more reliable and self side-wall passivation possible. The fabricated GaAs MOSFETs exhibit current-voltage characteristics with complete pinch-off and saturation characteristics. The 2 μm gate-length MOSFETs with a gate oxide thickness of 35 nm show transconductance larger than 80 mS/mm and maximum drain current density of 380 mA/mm. In addition, microwave characteristics with f_T of 1.8 GHz and f_max of 5.2 GHz have been achieved from the 3 μm×60 μm GaAs MOSFETs     

Temperature-dependence investigation of a high-performance inverteddelta-doped V-shaped GaInP/InxGa1-xAs/GaAspseudomorphic high electron mobility transistor

A newly designed inverted delta-doped V-shaped GaInP/In_xGa_1-xAs/GaAs pseudomorphic high electron mobility transistor (PHEMT) has been successfully fabricated and studied. For a 1×100 μm² device, a high gate-to-drain breakdown voltage over 30 V at 300 K is found. In addition, a maximum transconductance of 201 mS/mm with a broad operation regime for 3 V of gate bias (565 mA/mm of drain current density), a very high output drain saturation current density of 826 mA/mm, and a high DC gain ratio of 575 are obtained. Furthermore, good temperature-dependent performances at the operating temperature ranging from 300 to 450 K are found. The unity current gain cutoff frequency f_T and maximum oscillation frequency f_max up to 16 and 34 GHz are obtained, respectively. Meanwhile, the studied device shows the significantly wide and flat gate bias operation regime (3 V) for microwave performances     

Ga2O3(Gd2O3)/InGaAsenhancement-mode n-channel MOSFETs

We have demonstrated the first Ga₂O₃(Gd₂O₃) insulated gate n-channel enhancement-mode In_0.53Ga_0.47As MOSFET's on InP semi-insulating substrate. Ga₂O₃(Gd₂ O₃) was electron beam deposited from a high purity single crystal Ga₅Gd₃O₁₂ source. The source and drain regions of the device were selectively implanted with Si to produce low resistance ohmic contacts. A 0.75-μm gate length device exhibits an extrinsic transconductance of 190 mS/mm, which is an order of magnitude improvement over previously reported enhancement-mode InGaAs MISFETs. The current gain cutoff frequency, f_t, and the maximum frequency of oscillation, f_max, of 7 and 10 GHz were obtained, respectively, for a 0.75×100 μm² gate dimension device at a gate voltage of 3 V and drain voltage of 2 V