共查询到11条相似文献,搜索用时 93 毫秒
1.
2.
电力静电感应晶体管大电压特性的改善 总被引:3,自引:2,他引:1
A novel structure for designing and fabricating a power static induction transistor(SIT)with excellent high breakdown voltage performance is presented.The active region of the device is designed to be surrounded by a deep trench to cut off the various probable parasitical effects that may degrade the device performance,and to avoid the parallel-current effect in particular.Three ring-shape junctions(RSJ)are arranged around the gate junction to reduce the electric field intensity.It is important to achieve maximum gate–source breakdown voltage BVGS, gate–drain breakdown voltage BVGD and blocking voltage for high power application.A number of technological methods to increase BVGD and BVGS are presented.The BVGS of the power SIT has been increased to 110 V from a previous value of 50–60 V,and the performance of the power SIT has been greatly improved.The optimal distance between two adjacent ring-shape junctions and the trench depth for the maximum BVGS of the structure are also presented. 相似文献
3.
4.
可控硅(SCR)作为静电放电(ESD)保护器件,因具有高的鲁棒性而被广泛应用,但其维持电压很低,容易导致闩锁问题。针对高压集成电路的ESD保护,提出了一种新颖的具有高维持电压的SCR结构(HHVSCR)。通过添加一个重掺杂的N型掺杂层(NIL),减小了SCR器件自身固有的正反馈效应,从而提高了SCR的维持电压。Sentaurus TCAD仿真结果表明,与传统的SCR相比,改进的HHVSCR无需增加额外的面积就可将维持电压从1.88 V提高到11.9 V,可应用于高压集成电路的ESD防护。 相似文献
5.
6.
为改善传统Y源DC-DC变换器开关管电压应力高、占空比范围小等缺点,本文提出了一种改进型开关电感Y源变换器(ISLY)。该变换器升压能力明显提高,并且存在连续输入电流,与Y源、改进型Y源拓扑相比,增大了占空比的可调节范围,使电路具有更好的控制灵活性,同时减小了功率开关管的电压应力,从而提升工作效率、节约成本。本文对ISLY进行了详细的理论分析,提供了MATLAB/Simulink仿真结果与实验数据及波形,验证了该 DC-DC 变换器的合理性。 相似文献
7.
8.
9.
设计了一种应用于流水线ADC中的新型高线性度采样开关,该开关采用比较器、反相器链、CMOS对管开关,自举电容等实现,具有较高的线性度。其基本原理为:使MOS管栅极电压实时跟随输入电压,保证其差值恒定,从而实现整体采样保持电路较高的无杂散动态范围。通过Flip-around型采样保持电路进行验证,其无杂散动态范围可达91... 相似文献
10.
针对5 V电源的静电放电(ESD)防护,提出一种利用PMOS管分流的新型优化横向可控硅(PMOS-MLSCR)。相比于传统MLSCR,PMOS-MLSCR具有更高的维持电压和相对较低的触发电压,有效避免了传统MLSCR面临的闩锁风险。基于0.18 μm BCD工艺,采用TCAD仿真模拟PMOS-MLSCR和传统MLSCR,并通过模拟TLP测试器件特性。仿真结果表明,PMOS-MLSCR的维持电压相对于传统MLSCR提升了3.64 V,触发电压降低了1.49 V,并且满足5 V电源ESD防护的设计窗口。 相似文献
11.
A new static induction thyristor (SITH) with a strip anode region and p~- buffer layer structure (SAP-B) has been successfully designed and fabricated. This structure is composed of a p~- buffer layer and lightly doped n~-regions embedded in the p~+-emitter. Compared with the conventional structure of a buried-gate with a diffused source region (DSR buried-gate), besides the simple fabrication process, the forward blocking voltage of this SITH has been increased to 1600 V from the previous value of 1000 V, the blocking gain increased from 40 to 70, and the turn-off time decreased from 0.8 to 0.4μs. 相似文献