Current-mode linguistic hedge circuit for adaptive fuzzy logiccontrollers

A CMOS current-mode linguistic hedge `very' circuit which can be applied to adjust the membership function of a fuzzy set for obtaining adaptive fuzzy logic control is proposed. The design constraints of the proposed circuit are also discussed. Simulation results show that this circuit has high speed, large dynamic range and high accuracy     

High-performance current-mode multi-input loser-take-all minimum circuit

A new current-mode multi-input looser-take-all minimum circuit is presented. the circuit has very compact and simple architecture with only three transistors per input. It is shown that the proposed circuit exhibits better performance and is more robust to parametric variations compared to its previous counterparts.     

Compact current-mode loser-take-all circuit

A CMOS circuit is presented that takes an array of analogue input currents and generates an array of binary output voltages in which the output corresponding to the minimum input current is high and all other outputs are low. This loser-take-all circuit also encodes the minimum current as a voltage that is distributed to all elements through a global wire. Because transistors operate in the subthreshold regime, a single compact cell implemented with as few as two transistors per cell dissipates power in the microwatt range. A three-cell loser-take-all circuit was fabricated using a MOSIS 2 μm p-well process, and experimental data are presented     

A new OTA-C current-mode biquad filter with single input and multiple outputs

A new current-mode biquad-filtering circuit with single input and multi-outputs based on operational transconductance amplifier (OTA) is presented using three OTAs, two grounded capacitors and one grounded resistor, it can simultaneously realize second-order lowpass, bandpass, highpass, notch and allpass filters. The characteristic parameters can be adjusted orthogonally by a bias current of OTA and all capacitors are gounded. Morever, the circuit enjoys low sensitivities.     

Low-voltage BiCMOS dynamic minimum circuit using a parallelcomparison algorithm for fuzzy controllers

The authors present a low-voltage BiCMOS dynamic minimum circuit using a parallel comparison algorithm for VLSI implementation of fuzzy controllers. Using low-voltage BiCMOS dynamic circuits and a parallel comparison algorithm, a four-4-bit-input minimum circuit designed, based on a 1μm BiCMOS technology, shows a 9.5ns comparison time, which is a ×2.5 improvement in speed as compared to that based on CMOS technology     

BiCMOS dynamic minimum circuit using a parallel comparison algorithm for fuzzy controllers

A BiCMOS dynamic minimum circuit using a parallel comparison algorithm for the VLSI implementation of fuzzy controllers is presented. Using BiCMOS dynamic circuits and a parallel comparison algorithm a four 4-bit-input minimum circuit, designed based on a 2 mu m BiCMOS technology shows a 7.4 ns comparison time, which is a *3 improvement in speed as compared with the CMOS circuit. In addition, this circuit has an expansion capability for realising large-scale minimum circuits.<>     

CMOS multiple input voltage winner takes all circuit

A new kind of multiple input voltages winner takes all circuit, made with only MOS transistors is presented. Simulation and experimental results have shown that the new structure offers low power consumption combined with excellent frequency response     

CMOS current-mode pseudo-exponential function circuit

A current-mode analogue circuit that implements a pseudo-exponential function is proposed. The design of the circuit is based on Taylor's series approximation, using MOS transistors in the saturation region. The advantage of this circuit is that the output current presents a very low temperature coefficient (TC) and is also immune to the body-effect. Simulation and experimental results show that the circuit offers a maximum output range of ~30 dB, with an error of less than 1 dB and TC=-233 ppm/°C     

High-performance current-mode instrumentation amplifier circuit

A high-performance current-mode instrumentation amplifier circuit is described in this paper. It has a high common mode rejection ratio, high gain, high accuracy, wide bandwidth and bandwidth gain-independence. It utilizes commercially available integrated circuits and is easily implemented. Experimental results show that at low frequencies a common mode rejection ratio of 120 dB is attainable.     

Design of anti-jamming current-sensing circuit for current-mode buck regulator

A novel anti-jamming integrated CMOS current-sensing circuit for current-mode buck regulators is presented.Based on the widely-used traditional current-sensing structure,anti-jamming performance is improved significantly by adding on-chip capacitors and one-shot circuit.Also the transient response is faster through the introduction of current offset.The circuit iS concise,simple to implement and suits for SoC applications with single power supply.A dual-output current-mode DC-DC buck converter with proposed structure has been fabricated with a 0.5μm CMOS process for validation.In the 2.5-5.5 V input range,the two channels work steadily in the load current range of 0-600 mA.And the measured maximum efficiency is up to 96%.     

电流模降压变换器抗干扰电流采样电路设计

A novel anti-jamming integrated CMOS current-sensing circuit for current-mode buck regulators is presented. Based on the widely-used traditional current-sensing structure, anti-jamming performance is improved significantly by adding on-chip capacitors and one-shot circuit. Also the transient response is faster through the introduction of current offset. The circuit is concise, simple to implement and suits for SoC applications with single power supply. A dualoutput current-mode DC-DC buck converter with proposed structure has been fabricated with a 0.5 μm CMOS process for validation. In the 2.5–5.5 V input range, the two channels work steadily in the load current range of 0–600 mA. And the measured maximum efficiency is up to 96%.     

A high-precision current-mode WTA-MAX circuit with multichipcapability

This paper presents a circuit design technique suitable for the realization of winner-take-all (WTA), maximum (MAX), loser-take-all (LTA), and minimum (MIN) circuits. The technique presented is based on current replication and comparison. Traditional techniques rely on the matching of an N transistors array, where N is the number of system inputs. This implies that when N increases, as the size of the circuit and the distance between transistors will also increase, transistor matching degradation and loss of precision in the overall system performance will result. Furthermore, when multichip systems are required, the transistor matching is even worse and performance is drastically degraded. The technique presented in this paper does not rely on the proper matching of N transistors, but on the precise replication and comparison of currents. This can be performed by current mirrors with a limited number of outputs. Thus, N can increase without degrading the precision, even if the system is distributed among several chips. Also, the different chips constituting the system can be of different foundries without degrading the overall system precision. Experimental results that attest these facts are presented     

Equivalent circuit models in current-mode circuits for time delay calculations

In this paper time delay calculations for current-mode circuits are considered and equivalent circuit models for delay estimation are developed. Three different equivalent circuit structures for the Core Circuit used in the multipurpose IC DU-TCC1209 are examined separately; however the relation obtained for the time delay can be applied to any CMOS current-mode circuit. The proposed calculation methods are verified with SPICE using 0.35 μm TSMC MOSIS technology parameters and with bench-test measurements using DU-TCC1209.     

An integrated CMOS current-sensing circuit for low-Voltage current-mode buck regulator

An integrated current-sensing circuit for low-voltage buck regulator is presented. The minimum achievable supply voltage of the proposed current-sensing circuit is 1.2 V implemented in a CMOS technology with V/sub TH/=0.85 V, and the current-sensing accuracy is higher than 94%. With the developed current-sensing circuit, a buck regulator, which is able to operate at a 1.2-V supply, is implemented. A maximum output current of 120 mA and power-conversion efficiency higher than 89% are achieved.     

Algorithmic analogue-to-quaternary convertor circuit using current-mode CMOS

A new current-mode CMOS algorithmic analogue-to-quaternary data convertor circuit has been realised in a standard polysilicon-gate CMOS technology. This circuit accepts an analogue current input and develops a set of quaternary, base-four, output currents. A single type of convertor cell may be cascaded to the desired number of quaternary output digits. The reference current that defines the full scale input range may be set externally. This circuit is input-output compatible with other previously described VLSI-compatible current-mode CMOS quaternary threshold logic and memory circuits.<>     

面向蓄电池的多输入源低功耗充电电路设计

针对蓄电池的储能问题,提出了一种多输入源且可扩充的高效充电电路和相应的控制算法。该充电电路主要由数字控制单元（DCU）、比较器、基于Dickson电荷泵结构的时钟倍压器（CVD）以及模拟开关组成,可以对多个独立能量采集器（EH）进行电能收集。该系统支持通过热插拔方式扩充任意数量的EH。提出的控制算法可以将从各个EH采集到的能量传递到能量储存装置而不会互相干扰。采用0.18 μm CMOS工艺对提出电路进行了具体实现。实验结果显示,相比类似的蓄电池充电系统,该充电电路的功耗最低,只需1.72μW的功耗,能够为三个输入源提供高达96.1%的最大充电效率。     

Electronically tunable current-mode second-order universal filter using minimum elements

A new electronically tunable universal filter with single-input, triple-output employing only four elements (two capacitors and two negative-type second generation current controlled conveyors (CCCII)) is proposed. The proposed filter realises three basic filter functions simultaneously: lowpass, highpass and bandpass. The validity of the proposed filter is verified through PSPICE simulations.     

一个具有平滑转换特性的电流型DAC单元电路

数模转换器（digital-analogue converter, DAC）在当前电子系统中发挥着重要作用,电流型DAC因其优良的特性而得到广泛应用。单元电路在开关瞬间的非理想转换特性对电流型DAC的性能有直接影响。文中对导致电流型DAC单元电路非理想转换特性的各类寄生效应进行了分析,并提出了一种结构简单的单元电路以改善非理想的输出特性。仿真结果显示其能有效抑制各类寄生效应,实现了输出的平滑转换。通过在一个抖频电路中的应用,该单元电路的可行性得以验证。