RF noise in 0.18-/spl mu/m and 0.13-/spl mu/m MOSFETs

Studied the gate finger number and gate length dependence on minimum noise figure (NF/sub min/) in deep submicrometer MOSFETs. A lowest NF/sub min/ of 0.93 dB is measured in 0.18-/spl mu/m MOSFET at 5.8 GHz as increasing finger number to 50 fingers, but increases abnormally when above 50. The scaling gate length to 0.13 /spl mu/m shows larger NFmin than the 0.18-/spl mu/m case at the same finger number. From the analysis of a well-calibrated device model, the abnormal finger number dependence is due to the combined effect of reducing gate resistance and increasing substrate loss as increasing finger number. The scaling to 0.13-/spl mu/m MOSFET gives higher NF/sub min/ due to the higher gate resistance and a modified T-gate structure proposed to optimize the NF/sub min/ for further scaling down of the MOSFET.     

Experimental evidence for nonlucky electron model effect in 0.15-/spl mu/m NMOSFETs

It is shown that in 0.15-/spl mu/m NMOSFETs the device lifetime under channel hot-carrier (CHC) stress is lower than that under drain avalanche hot-carrier (DAHC) stress and therefore the hot-carrier stress-induced device degradation in 0.15-/spl mu/m NMOSFETs cannot be explained in the framework of the lucky electron model (LEM). Our investigation suggests that such a "non-LEM effect" may be due to increased interface state generation by the movement of the maximum impact ionization site from the lightly doped drain (LDD) diffusion region to the boundary of the bulk and LDD region beneath the gate oxide. This paper provides experimental evidence for the non-LEM effect by comparing the degradation characteristics and the maximum impact ionization sites as a function of gate oxide thickness and gate length.     

A fully integrated V-band PLL MMIC using 0.15-/spl mu/m GaAs pHEMT technology

A fully integrated V-band phase-locked loop (PLL) MMIC with good phase noise and low-power consumption is developed using 0.15-/spl mu/m GaAs pHEMTs. For V-band frequency division,a wideband divide-by-3 frequency divider is proposed using cascode FET-based harmonic injection locking. The fourth subharmonic mixer using anti-parallel diode pair is employed as a high-frequency phase detector. In this way, the required frequency of the reference oscillator is lowered to one twelfth of V-band output signal. An RC low-pass filter and DC amplifier are also integrated to effectively suppress the spurious and harmonic signals, and to increase the loop gain. To reduce the circuit interactions and frequency pulling effect, buffer amplifiers are used at the output of VCO and frequency divider. The fabricated V-band PLL MMIC shows the locking range of 840 MHz around 60.1GHz under a very low power dissipation of 370 mW. Good phase noise of -95.5 dBc/Hz is measured at 100 kHz offset. The chip size is as small as 2.35/spl times/1.80 mm/sup 2/. To the best of our knowledge, the PLL MMIC of this work is one of the highest frequency monolithic PLLs that integrates all the required elements on a single chip.     

High-performance and low-cost 0.15-/spl mu/m nMOSFETs using simultaneous N-gate and source/drain doping process

A fabrication method for high performance and low cost nMOSFETs suitable for 0.15 and sub-0.15 /spl mu/m CMOS technology is proposed. In this method, n-poly gate doping prior to the definition of gate poly was skipped, i.e., gate poly is simultaneously doped by the source/drain ion implantation. Then, the source/drain implantation dose was increased by the amount used for gate pre-doping process. Although gate pre-doping is skipped, device performances such as device on-off current characteristics, active and poly sheet resistance and junction leakage current are compatible to the pre-doping ones. Moreover, the proposed method has the advantages of low cost and high yield because one mask step and several processes are reduced. The degree of active damage by the doubled source/drain implantation dose was investigated using the transmission electron microscopy, and high resolution x-ray diffraction spectroscopy.     

A 1-/spl mu/m Bipolar VLSI Technology

A 1-/spl mu/m VLSI process technology has been developed for the fabrication of bipolar circuits. The process employs electron-beam slicing writing, plasma processing, ion implantation, and low-temperature oxidation/annealing to fabricate bipolar device structures with a minimum feature size of 0.9 /spl mu/m. Both nonisolated I/sup 2/L and isolated Schottky transistor logic (STL) devices and circuits have been fabricated with this process technology. The primary demonstration vehicle is a seated LSI, I/sup 2/L, 4-bit processor chip (SBP0400) with a minimum feature size of 1 /spl mu/m. Scaled SPB0400's have been fabricated that operate at clock speeds 3X higher than their full-size counterparts at 50-mA chip current. Average propagation delay has been measured as a function of minimum feature size for both I/sup 2/L and STL device designs. Power-delay products of 14 fJ for I/sup 2/L and 30 fJ for STL have been measured.     

Analysis of heat generation and thermal lensing in erbium 3-/spl mu/m lasers

The influence of energy-transfer upconversion (ETU) between neighboring ions in the upper and lower laser levels of erbium 3-/spl mu/m continuous-wave lasers on heat generation and thermal lensing is investigated. It is shown that the multiphonon relaxations following each ETU process generate significant heat dissipation in the crystal. This undesired effect is an unavoidable consequence of the efficient energy recycling by ETU in erbium 3-/spl mu/m crystal lasers, but is further enhanced under nonlasing conditions. Similar mechanisms may affect future erbium 3-/spl mu/m fiber lasers. In a three-dimensional finite-element calculation, excitation densities, upconversion rates, heat generation, temperature profiles, and thermal lensing are calculated for a LiYF/sub 4/:Er/sup 3+/ 3-/spl mu/m laser. In the chosen example, the fraction of the absorbed pump power converted to heat is 40% under lasing and 72% under nonlasing conditions. The heat generation in a LiYF/sub 4/:Er/sup 3+/ 3-/spl mu/m laser is 1.7 and the thermal-lens power up to 2.2 times larger than in a LiYF/sub 4/:Nd/sup 3+/ 1-/spl mu/m laser under equivalent pump conditions, thus, also putting a higher risk of rod fracture on the erbium system.     

1.31-1.55-/spl mu/m phased-array demultiplexer on InP

The first demultiplexers on InP at 1.31-1.55 /spl mu/m based on low-order waveguide arrays have been fabricated and characterized. We show the calculated and measured spectral responses of two devices with 6 and 10 waveguides in the grating. The on-chip loss of the devices is 4.5 dB and the crosstalks are down to -25 dB. Thanks to their large bandwidth, the devices are polarization insensitive and no strong influence of the temperature is seen.     

1.0-/spl mu/m n-Well CMOS/Bipolar Technology

High-performance 1.0-/spl mu/m n-well CMOS/bipolar on-chip technology was developed. For process simplicity, an n-well and a collector of bipolar transistors were formed simultaneously, and base and NMOS channel regions were also made simultaneously resulting in collector-isolated vertical n-p-n bipolar transistor fabrication without any additional process step to CMOS process. On the other hand, 1.0-/spl mu/m CMOS with a new "hot carrier resistant" seIf-defined Polysilicon sidewall spacer (SEPOS) LDD NMOS was developed. It can operate safely under supply voltage over 5 V without performance degradation of CMOS circuits. By evaluating ring oscillators and differential amplifiers constructed by both CMOS and bipolar transistors. it can be concluded that in a digital and in an analog combined system, CMOS has sufficiently high-speed performance for digital parts, while bipolar is superior for analog parts. In addition, bipolar transistors with an n/sup +/-buried layer were also fabricated to reduce collector resistance. Concerning the bipolar input/output buffers, the patterned n/sup +/-buried layer improves the drivability and high-frequency response. As a result, the applications of n-well CMOS/bipolar technology become clear. This technology was successfully applied to a high-speed 64-kbit CMOS static RAM, and improvement in access time was observed.     

A 2-/spl mu/m CMOS 8-MIPS digital processor with parallel processing capability

A 2-/spl mu/m CMOS VLSI digital signal processor (DSP) family, the SP50, is described that is capable of eight million instructions per second and up to six concurrent operations in each instruction. Two DSPs, the PCB5010 and PCB5011, have been developed. Both are based on a common architecture which contains two 16-bit data buses, and a 16/spl times/16/spl rarr/40-bit multiplier accumulator and 16-bit ALU, both with multiprecision support in hardware. Also implemented are two static data RAMs (128/spl times/16 or 256/spl times/16), a data ROM (51/spl times/16), a 15-word three-port register file, three address computation units, and five serial and parallel I/O interfaces. The data path is controlled by an orthogonal instruction set, using 40-bit microcode words. The controller contains a five-level stack and an instruction repeat register, and can have either on-chip program memory (RAM: 32/spl times/40; ROM: 987/spl times/40) or off-chip program memory (up to 64K/spl times/40). Benchmarks show a two to sixfold improvement in overall performance over its predecessors.     

High-power 2.3-/spl mu/m GaSb-based linear laser array

High-power 2.3-/spl mu/m In(Al)GaAsSb-GaSb type-I double quantum-well diode laser arrays were fabricated and characterized. Linear laser arrays with 19 100-/spl mu/m-wide elements on a 1-cm-long bar generated 10 W in continuous-wave (CW) mode and 18.5 W in quasi-CW mode (30 /spl mu/s/300 Hz) at a heatsink temperature of 18/spl deg/C. Array power conversion efficiency peaked at 30 A and was about 9%. Device internal efficiency was about 50%. Individual laser differential gain with respect to current was about twice as high as in InP-based laser heterostructures, demonstrating the potential of GaSb-based material system for high-power CW room-temperature laser diode arrays.     

A Bluetooth radio in 0.18-/spl mu/m CMOS

This paper describes the results of an implementation of a Bluetooth radio in a 0.18-/spl mu/m CMOS process. A low-IF image-reject conversion architecture is used for the receiver. The transmitter uses direct IQ-upconversion. The VCO runs at 4.8-5.0 GHz, thus facilitating the generation of 0/spl deg/ and 90/spl deg/ signals for both the receiver and transmitter. By using an inductor-less LNA and the extensive use of mismatch simulations, the smallest silicon area for a Bluetooth radio implementation so far can be reached: 5.5 mm/sup 2/. The transceiver consumes 30 mA in receive mode and 35 mA in transmit mode from a 2.5 to 3.0-V power supply. As the radio operates on the same die as baseband and SW, the crosstalk-on-silicon is an important issue. This crosstalk problem was taken into consideration from the start of the project. Sensitivity was measured at -82 dBm.     

1.5-/spl mu/m InGaAsP-InP slab-coupled optical waveguide lasers

We report the demonstration of high-power semiconductor slab-coupled optical waveguide lasers (SCOWLs) operating at a wavelength of 1.5 /spl mu/m. The lasers operate with large (4/spl times/8 /spl mu/m diameter) fundamental mode and produce output power in excess of 800 mW. These structures have very low loss (/spl sim/0.5 cm/sup -1/) enabling centimeter-long devices for efficient heat removal. The large fundamental mode allows 55% butt-coupling efficiency to standard optical fiber (SMF-28). Comparisons are made between SCOWL structures having nominal 4- and 5-/spl mu/m-thick waveguides.     

1.58-/spl mu/m broad-band erbium-doped tellurite fiber amplifier

This paper describes the development of a 1.58-/spl mu/m broad-band and gain-flattened erbium-doped tellurite fiber amplifier (EDTFA). First, we compare the spectroscopic properties of various glasses including the stimulated emission cross sections of the Er/sup 3+4/ I/sub 13/2/ /sup 4/I/sub 15/2/ transition and the signal excited-state absorption (ESA) cross sections of the Er/sup 3+4/ I/sub 13/2/ - /sup 4/I/sub 9/2/ transition. We detail the amplification characteristics of a 1.58-/spl mu/m-band EDTFA designed for wavelength-division-multiplexing applications by comparing it with a 1.58-/spl mu/m-band erbium-doped silica fiber amplifier. Furthermore, we describe the 1.58-/spl mu/m-band gain-flattened EDTFA we developed using a fiber-Bragg-grating-type gain equalizer. We achieved a gain of 25.3 dB and a noise figure of less than 6 dB with a slight gain excursion of 0.6 dB over a wide wavelength range of 1561-1611 nm. The total output power of the EDTFA module was 20.4 dBm and its power conversion efficiency reached 32.8%.     

50-GHz optically injection-locked 1.55-/spl mu/m VCSELs

High-speed directly modulated diode lasers are important for optical communications and optical interconnects. In this work, we demonstrate greatly enhanced resonance frequency for vertical-cavity surface-emitting lasers, from 7 to 50 GHz, under ultrahigh injection-locking conditions. In addition, a 20-dB gain is achieved for small signal modulation below resonance frequency.     

Efficient thulium-doped 2-/spl mu/m germanate fiber laser

We report an efficient fiber laser operating near 2 /spl mu/m. The glass for the fiber is germanate that is highly doped with thulium. The effect of cross relaxation energy transfer between thulium ions as observed from emission spectrum of the glass samples results in the laser having a very high slope efficiency of 58% with respect to launched power. This corresponds to a quantum efficiency of 1.79, indicating that each pump photon leads to near 1.8 excited Tm/sup 3+/ ions.     

A 0.18-/spl mu/m CMOS bioluminescence detection lab-on-chip

The paper describes a bioluminescence detection lab-on-chip consisting of a fiber-optic faceplate with immobilized luminescent reporters/probes that is directly coupled to an optical detection and processing CMOS system-on-chip (SoC) fabricated in a 0.18-/spl mu/m process. The lab-on-chip is customized for such applications as determining gene expression using reporter gene assays, determining intracellular ATP, and sequencing DNA. The CMOS detection SoC integrates an 8 /spl times/ 16 pixel array having the same pitch as the assay site array, a 128-channel 13-bit ADC, and column-level DSP, and is fabricated in a 0.18-/spl mu/m image sensor process. The chip is capable of detecting emission rates below 10/sup -6/ lux over 30 s of integration time at room temperature. In addition to directly coupling and matching the assay site array to the photodetector array, this low light detection is achieved by a number of techniques, including the use of very low dark current photodetectors, low-noise differential circuits, high-resolution analog-to-digital conversion, background subtraction, correlated multiple sampling, and multiple digitizations and averaging to reduce read noise. Electrical and optical characterization results as well as preliminary biological testing results are reported.     

Multifunctional characteristics of 1.5-/spl mu/m two-section amplifier-modulator-detector SOA

The multifunctional characterization of a two-section amplifier-modulator-detector semiconductor optical amplifier (AMD-SOA) is presented. Detectivity is analyzed in terms of bandwidth and responsivity while modulation properties are characterized by temporal response and extinction ratio. Receiver sensitivities of -26 dBm at 155 Mb/s and -19.5 dBm at 622 Mb/s and error-free signal modulation/transmission with simultaneous 10 dB amplification at 622 Mb/s with a 2/sup 23/-1 PRBS signal are reported. This device could find application as transparent add-drop node in photonic packet-switched optical ring networks.     

Room-temperature 2.81-/spl mu/m continuous-wave operation of GaInAsSb-AlGaAsSb laser

GaInAsSb-AlGaAsSb multiple quantum-well (QW) lasers with an emission wavelength of 2.81 /spl mu/m are reported. The ridge waveguide lasers with highly strained QWs show continuous-wave laser emission up to 25/spl deg/C; in pulsed mode, the lasers operate up to 60/spl deg/C. For pulsed operation, a threshold current density of 360 A/cm/sup 2/ is found for devices with 30-/spl mu/m stripe width and 2-mm cavity length at room temperature. A low threshold current density at infinite length of 248 A/cm/sup 2/ is derived.     

Coherence-collapse threshold of 1.3-/spl mu/m semiconductor DFB lasers

The onset of the coherence-collapse threshold is theoretically and experimentally studied for monomode 1.3-/spl mu/m antireflection/high reflection distributed-feedback lasers taking into account facet phase effects. The variation of the coherence collapse from chip to chip due to the facet phase is in the range of 7 dB and remains almost independent of the grating coefficient. Lasers that operate without coherence collapse under -15-dB optical feedback, while exhibiting an efficiency as high as 0.30 W/A, are demonstrated. Such lasers are adequate for 2.5 Gb/s isolator-free transmission without under the International Telecommunication Union recommended return loss.     

Optimized retrograde N-well for 1-/spl mu/m CMOS technology

Using experiment and simulation, transistors in a high-energy implanted N-well are designed for optimum device performance suitable for 1-/spl mu/m CMOS technology. The effect of process parameters on device performance is obtained. Superior body effect, junction capacitance, punchthrough voltage, and subthreshold slope are achieved for 1-/spl mu/m n- and p-channel transistors. With shallow P/P+ epitaxial material, this retrograde N-well approach also provides latch-up immunity for high-density CMOS.