Positive flatband voltage shift in MOS capacitors on n-type GaN

GaN MOS capacitors were fabricated using silicon dioxide deposited by low-pressure chemical vapor deposition oxide at 900°C. The MOS capacitor flatband voltage shift versus temperature was used to determine a pyroelectric charge coefficient of 3.7 × 10⁹ q/cm²-K, corresponding to a pyroelectric voltage coefficient of 7.0 × 10⁴ V/m-K     

2 MeV ion irradiation effects on AlGaN/GaN HFET devices

AlGaN/GaN heterostructure field effect transistors (HFETs) were irradiated with 2 MeV protons, carbon, oxygen, iron and krypton ions with fluences ranging from 1 × 10⁹ cm^?2 to 1 × 10¹³ cm^?2. DC, pulsed I–V characteristics, loadpull and S-parameters of the AlGaN HFET devices were measured before and after irradiation. In parallel, a thick GaN reference layer was also irradiated with the same ions and was characterized by X-ray diffraction, photoluminescence, Hall measurements before and after irradiation. Small changes in the device performance were observed after irradiation with carbon and oxygen at a fluence of 5 × 10¹⁰ cm^?2. Remarkable changes in device characteristics were seen at a fluence of 1 × 10¹² cm^?2 for carbon, oxygen, iron and krypton irradiation. Similarly, remarkable changes were also observed in the GaN layer for irradiations with fluence of 1 × 10¹² cm^?2. The results found on devices and on the GaN layer were compared and correlated.     

Effects of wet-ROA on shallow interface traps of n-type 4H-SiC MOS capacitors

The effects of wet re-oxidation annealing （wet-ROA） on the shallow interface traps of n-type 4H-SiC metal oxide-semiconductor （MOS） capacitors were investigated by Gray-Brown method and angle-dependent X- ray photoelectron spectroscopy technique. The results present the energy distribution of the density of interface traps （Dit） from 0 to 0.2 eV below SiC conduction band edge （Ec） of the sample with wet-ROA for the first time, and indicate that wet-ROA could reduce the Dit in this energy range by more than 60%. The reduction in Dit is attributed to the reaction between the introduced oxygen and the SiOxCy species, which results in C release and SiOxCy transformation into higher oxidation states, thus reducing the SiOxCy content and the SiOxCy interface transition region thickness.     

Effect of NO annealing conditions on electrical characteristics of n-type 4H-SiC MOS capacitors

This paper presents the results of the effect of NO annealing temperature and annealing time on the interfacial properties of n-type 4H-SiC MOS capacitors. The interface trap density measured by conductance technique at 330°C decreases as NO annealing temperature increases from 930°C to 1130° and annealing time is extended from 30 min. to 180 min. The changes in effective oxide charge between room temperature and high temperature are calculated and used to compare different n-type 4H-SiC MOS capacitors. Higher NO annealing temperature and longer NO annealing time decrease the change in effective oxide charge, which is consistent with the NO annealing temperature/time dependence of interface trap density measured by conductance technique. However, NO annealing temperature has more pronounced influence on the SiO₂/SiC interface than NO annealing time.     

A 1.8-V MOSFET-only ΣΔ modulator using substrate biaseddepletion-mode MOS capacitors in series compensation

A low-voltage high-linearity MOSFET-only ΣΔ modulator for speech band applications is presented. The modulator uses substrate biased MOSFETs in the depletion region as capacitors, linearized by a series compensation technique. A second-order fully differential single-loop architecture has been realized in a conventional 0.25-μm digital n-well CMOS process without extra layers for capacitors. An SNDR of 72 dB and an SNR of 77 dB is obtained with 8-kHz signal bandwidth at an oversampling ratio of 64. The circuit consumes about 1 mW from a single 1.8-V power supply and occupies a core area of 0.08 mm²     

MOS capacitors obtained by wet oxidation of n-type 4H-SiC pre-implanted with nitrogen

The manufacture process and the electrical characterization of MOS devices fabricated by wet oxidation of N⁺ implanted n-type 4H-SiC are here presented. Different implantation fluence and energy values were used with the aims to study the effect of the N concentration both at the SiO₂/SiC interface and within the SiO₂ film. High doses, able to amorphise a surface SiC layer to take advantage of the faster oxidation rate of amorphous with respect to crystalline SiC, were also evaluated. The electrical quality of the SiO₂/SiC system was characterized by capacitance-voltage measurements of MOS capacitors. The analyses of the collected data show that only the implanted N which is located at the oxide-SiC interfaces is effective to reduce the interface states density. On the contrary, the interface states density remains high (the same of an un-implanted reference sample) when the implanted N is completely embedded in the region consumed by the oxidation. Furthermore, none generation of fixed positive charges in the oxide was found as a consequence of the different N concentrations enclosed in the oxide films. These results were independent of the amorphisation of the implanted layer by the N⁺ ions. Our results demonstrate that by using a suitable N ion implantation and an appropriate wet oxidation treatment, it is possible to obtain a reduced thermal budget process able to decrease the interface state density near the conduction band edge. The proposed approach should be interesting for the development of the MOSFET technology on SiC.     

Electron irradiation effects in MOS systems

Flat-band shift measurements were made on p-type MOS devices irradiated with electrons at various gate-bias voltages. A structured reproducible curve of flat-band shift versus gate bias was obtained which could not be readily accounted for with existing models. Experimental data were taken over a wide range of negative and positive gate-bias voltages (consistent with electrical breakdown limits) in order to identify fundamental mechanisms as a basis for formulating a more general model of the entire device. A model is presented based on the known work functions and electron affinities for Al-SiO2-Si devices. It assumes that traps in the Oxide are occupied according to Fermi-Dirac statistics, subject to constraints determined by the interface parameters. A linearized quasi-Fermi level is assumed in the oxide, and the resulting distribution of charged traps is used with Poisson's equation to obtain a self-consistent energy-band structure throughout the entire device.     

Random error effects in matched MOS capacitors and current sources

Explicit formulas are derived using statistical methods for the random errors affecting capacitance and current ratios in MOS integrated circuits. They give the dependence of each error source on the physical dimensions, the standard deviations of the fabrication parameters, the bias conditions, etc. Experimental results, obtained for both matched capacitors and matched current sources using a 3.5-/spl mu/m NMOS technology, confirmed the theoretical predictions. Random effects represent the ultimate limitation on the achievable accuracy of switched-capacitor filters, D/A converters, and other MOS analog integrated circuits. The results indicate that a 9-bit matching accuracy can be obtained for capacitors and an 8-bit accuracy for MOS current sources without difficulty if the systematic error sources are reduced using proper design and layout techniques.     

Effect of ionizing radiation on MOS capacitors

A numerical model of metal-oxide-semiconductor (MOS) capacitor has been developed to investigate the effect of ionizing radiation on the characteristics of the device during exposure and also in the post-irradiated condition. The model takes into account the effect of radiation-induced changes in silicon-dioxide as well as in silicon substrate of MOS structure. It is found that the total high frequency capacitance of the device during exposure to radiation is different from its value in the post-irradiated condition. The results of the study are expected to be useful in predicting the behavior of MOS based devices operating in radiation environment.     

Radiation effects on thin-oxide MOS capacitors caused by electron beam evaporation of aluminum

The effects of electron-beam evaporation of Al on fast surface states, oxide charges and generation lifetime in MOS capacitors were studied. Fast surface states were increased when the thickness of the oxide was reduced to less than 400 Å. Negative charges were induced near the A1/SiO₂ interface. Both negative charges and fast surface states were reduced by using higher deposition temperatures, even though deposition temperatures were lower than post-metallization-annealing temperatures.Generation centers were also induced by electron beam evaporation. However, such generation centers were removed completely by the cleaning of furnace tubes with HCl.     

MOS characteristics of NO-grown oxynitrides on n-type 6H-SiC

The growth of high-quality thin oxynitrides in nitric oxide (NO) ambient on n-type 6H-SiC substrate is reported. The performance and reliability of NO-grown oxynitride are compared with those of NO-annealed, N₂O-grown, N₂O-annealed and N₂-annealed oxides. NO-grown device shows the best interfacial properties and oxide reliability among all the samples. X-ray photoelectron spectroscopy analysis indicates the highest nitrogen pileup at the SiO₂/SiC interface of NO-grown sample. Therefore, the best performance of NO-grown sample can be related to the fact that oxide growth in NO has the advantage of providing higher nitrogen accumulation at the SiO₂/SiC interface and in the oxide bulk than the other growth techniques.     

Investigation of Bulk and DTMOS triple-gate devices under 60 MeV proton irradiation

In this paper, the influence of proton irradiation is experimentally studied in triple-gate Bulk FinFETs with and without Dynamic Threshold MOS configuration (DTMOS). The drain current, transconductance, Drain Induced Barrier Lowering (DIBL) and the important figures of merit for the analog performance such as transconductance-over-drain current, output conductance and intrinsic voltage gain will be compared. Furthermore, the Low-Frequency (LF) noise will be also analyzed in the DT mode and the standard biasing configuration. The results indicate that the better electrical characteristics and analog performance of DTMOS FinFETs make them very competitive candidates for low-noise RF analog applications in a radiation environment.     

Comparison of MOS capacitors on n- and p-type GaN

The electrical characteristics of both n- and p-type GaN metal-oxide semiconductor (MOS) capacitors utilizing plasma-enhanced CVD-SiO₂ as the gate dielectric were measured. Both capacitance and conductance techniques were used to obtain the MOS properties (such as interface state density). Devices annealed at 1000°C/30 min. in N₂ yielded an interface state density of 3.8×10¹⁰ cm⁻² eV⁻¹ at 0.19 eV from the conduction band edge, and it decreased to 1.1×10¹⁰ cm⁻² eV⁻¹ deeper into the band gap. A total fixed oxide charge density of 8×10¹² q cm⁻² near the valence band was estimated. Unlike the symmetric interface state density distribution in Si, an asymmetric interface state density distribution with lower density near the conduction band and higher density near the valence band was determined.     

Reliability investigations of 850 nm silicon photodiodes under proton irradiation for space applications

This paper deals with the robustness of silicon photodiodes under proton irradiation for space applications. Our interest is focused on the impact on darkness current and noise equivalent power (NEP), which corresponds to the smaller optical signal detectable by photodiodes. The photodiodes studied were selected for their very small NEP (2 × 10^?14 W/Hz^1/2) and darkness current (50 pA at ?10 mV). Proton irradiations at 60, 100 and 150 MeV energies with fluences ranging from 10¹⁰ to 10¹¹ protons/cm² have been conducted. After irradiation, the darkness current and the NEP at 870 nm of photodiodes dramatically, respectively, increase of about 10,000% and 1000% requiring to estimate the critical dose which can be tolerated by the photodiode before reaching failure criteria and to accurately calculate the minimal shield thickness embedded around the system. Lifetime distributions are also computed in operating conditions using an electrical model based on the decrease of carriers lifetimes caused by formation of defects during irradiation.     

Fabrication of buried channel waveguides in fused silica usingfocused MeV proton beam irradiation

Low-loss channel waveguides have been fabricated in fused silica using a beam of MeV protons focused down to a spot size of several microns. By using a combination of beam and sample scanning, single- and multimode graded index waveguides with lateral dimensions down to approximately 5 μm×5 μm have been fabricated using ion doses in the range (3×10¹⁴)-(6×10¹⁶) ions/cm ². Typical beam currents in the range 100 pA-10 nA were used. Optical mode profiles have been measured at 670 nm and propagation losses of the order of 3 dB/cm measured in unannealed samples. Annealing the substrate for 1 h at 500°C reduced these losses to below 0.5 dB/cm     

Effects of surface states on relaxation phenomena in MOS capacitors

A numerical simulation of a silicon MOS capacitor pulsed from equilibrium into deep inversion has been performed with a view to accurately investigating the effects associated with surface states. A continuum of acceptor surface states has been assumed across the energy gap but, of course, the conclusions may be extended to the case of donor-like states. The results of the calculations show that soon after application of the voltage step a considerable portion of the trapped electrons is released from the upper half energy gap into the conduction band giving rise to a spike in the external current. The emission of these electrons is so rapid that it cannot be detected by the usual slow response current meter, nor is it able to induce any relevant variation into the depletion layer width and, consequently, into the high-frequency capacitance. At the same time, electrons trapped in the surface states disappear also through recombinations with holes generated in the bulk. During a time interval, which turns out to be small in comparison to the duration of the whole transient, every hole generated recombines at the surface giving rise to a small delay in the formation of the inversion layer. After that this latter begins to build up and surface states behave as if they were in a quasi-equilibrium condition with the valence band.     

The positive charge neutralisation after bi-directional stress on MOS capacitors

The aim of this work is to study the positive charge relaxation after bidirectional electron injections in a p-metal-oxide-silicon capacitor submitted to a constant current. This relaxation is studied following two steps. When the stressed sample is submitted to a nonstressing constant current, the positive charge neutralisation follows an exponential law with time. This allows us to estimate the electron capture cross-section (≈10^–16 to ≈2 × 10^–15 cm²). When the sample is let without any applied field, the positive charge relaxation follows a logarithmic law with time. It is also shown that the capture cross-section depends on the stress and relaxation times.     

1.8 V–3 GHz CMOS limiting amplifier with efficient frequency compensation

A compact robust CMOS limiting amplifier (LA) for high data traffic optical links is presented in this work. The core considers two different blocks. First, four common-source inverter amplifiers are included, which optimize the gain-bandwidth product of the structure. And second, two additional compensation stages are placed strategically between the gain stages alleviating the pernicious load effect. These stages develop two different compensation techniques simultaneously thus increasing the bandwidth. The proposed design consumes 113 mW with a single 1.8 V supply. It achieves a cut-off frequency up to 3 GHz and provides a gain of 21 dB. The circuit is packaged in a QFN24 and mounted on a commercial FR4 PCB.     

The electron irradiation effects on silicon gate dioxide used for power MOS devices

The work provides experimental results of high energy electron irradiation effects on silicon dioxide used for power MOS devices. A systematic increase of the threshold voltage has been observed in irradiated IGBT and VDMOS devices processed on Si1 0 0 and Si1 1 1, respectively. The threshold voltage shift has been interpreted as a result of the accumulated charge in the gate oxide. Single event gate rupture has been observed and attributed to the recoil ion interaction with the gate SiO₂. The result has been corroborated by reliability stress tests. After electron irradiation, an increase in breakdown voltage appeared on all devices which was attributed to a change in the surface impact ionisation coefficient. The change is most notable in devices processed on Si substrate with 1 1 1 orientation.     

Investigation of electron-hole generation in MOS capacitors on 4H SiC

This paper investigates electron-hole generation in n-type MOS capacitors on 4H-SiC with the gate oxide directly grown in either 100% NO or 10% N/sub 2/O. High-temperature capacitance-transient measurements were used to determine and compare the contributions of carrier generation in the bulk and at the SiO/sub 2/-SiC interface. The effective generation rate in the bulk is similar in the MOS capacitors with either type of gate oxide, whereas the effective surface-generation rate is much lower in the case of oxides grown in 100% NO. Moreover, the effective surface-generation rate in these oxides is reduced to the level that is comparable to the effective bulk-generation rate. This result demonstrates the high quality of MOS capacitors with the gate oxide directly grown in 100% NO.