Effect of Hygrothermal Aging on Interfacial Reliability of Silicon/Underfill/FR-4 Assembly

The reliability issues have been converted to the underfill adjacent interfaces since the introduction of the underfill to flip chip package in 1990's. Both thermal cycling and hygrothermal conditioning severely attack the interfaces to de- laminate. The moisture migrating into the underfill decreases the adhesion strength, swells to deform the assembly, and weakens the mechanical and thermal properties of the material. In this study, interfacial reliability of a silicon/underfill/FR-4 assembly exposed at 85degC/85%RH was studied using moire interferometry and micro-digital image speckle correlation (mu-DiSC) techniques. A thermal aging study was simultaneously performed to understand the long-term reliability of the assembly. The results showed that the thermal aging relieved the stresses induced by hygrothermal swelling mismatch between dissimilar materials involved, whereas increased the strains induced by hygrothermal swelling. It indicated the time effect is not negligible when the assembly is subjected to the moisture conditioning, otherwise, the deformation induced by the swelling could be overestimated. The mu-DiSC technique was applied to measure the critical interfacial fracture toughness of the silicon/underfill interface. The results showed that the moisture could significantly reduce the interfacial strength due to the break of hydrogen bonding. By combining the moire and mu-DiSC results, it was concluded that the hygrothermal loading could increase the possibility of interfacial delamination in a flip chip package. Finally, the morphologies of the fractured surface were studied with the aid of scanning electron microscope. Remarkable changes of the failure mode were observed.     

Measurement of underfill interfacial and bulk fracture toughness in flip-chip packages

Flip-chip package reliability is greatly improved by encapsulating the solder interconnections between a polymeric encapsulant or underfill. However, thermo-mechanical stresses within such packages often lead to failures initiating in the vicinity of chip and underfill interface. In this study, we present experimental results geared towards measuring and understanding such failure mechanisms. We provide the bulk fracture toughness of the underfill material and interfacial fracture toughness between the underfill material and the silicon die. The bulk and interfacial fracture toughness measurements are performed as a function of temperature. We use the single edge notch bending test to calculate the bulk fracture toughness of the underfill and to measure the interfacial fracture toughness, we use a novel technique referred to as the wedge delamination method. The wedge delamination method provides substantial advantage in measuring the interfacial fracture toughness for brittle materials over traditional methods. Using the wedge delamination method we compare the fracture strength between the underfill and silicon at the front-face and side-wall interfaces. Additionally, the influence of dicing technique on fracture toughness is also investigated.     

Novel reworkable fluxing underfill for board-level assembly

Underfills are traditionally applied for flip-chip applications. Recently, there has been increasing use of underfill for board-level assembly including ball grid arrays (BGAs) and chip scale packages (CSPs) to enhance reliability in harsh environments and impact resistance to mechanical shocks. The no-flow underfill process eliminates the need for capillary flow and combines fluxing and underfilling into one process step, which simplifies the assembly of underfilled BGAs and CSPs for SMT applications. However, the lack of reworkability decreases the final yield of assembled systems. In this paper, no-flow underfill formulations are developed to provide fluxing capability, reworkability, high impact resistance, and good reliability for the board-level components. The designed underfill materials are characterized with the differential scanning calorimeter (DSC), the thermal mechanical analyzer (TMA), and the dynamic mechanical analyzer (DMA). The potential reworkability of the underfills is evaluated using the die shear test at elevated temperatures. The 3-point bending test and the DMA frequency sweep indicate that the developed materials have high fracture toughness and good damping properties. CSP components are assembled on the board using developed underfill. High interconnect yield is achieved. Reworkability of the underfills is demonstrated. The reliability of the components is evaluated in air-to-air thermal shock (AATS). The developed formulations have potentially high reliability for board-level components.     

Processing and reliability of CSPs with underfill

The use of chip scale packages (CSPs) is rapidly expanding, particularly in portable electronic products. Many CSP designs will meet the thermal cycle or thermal shock requirements for these applications. However, mechanical shock and bending requirements often necessitate the use of underfills to increase the mechanical strength of the CSP-to-board connection. This paper examines the assembly process with capillary and fluxing underfills. Issues of solder paste versus flux only, solder flux residue cleaning and reworkability are investigated with the capillary flow underfills. Fluxing underfills eliminate the issues of flux-underfill compatibility, but require placement into a predispensed underfill. Voiding during placement is discussed. To evaluate the relative performance of the underfills, a drop test was performed and the results are presented. All of the underfills significantly (5-6x) improved the reliability in the drop test compared to nonunderfilled parts. Test vehicles were also subjected to liquid-to-liquid thermal shock testing. The use of underfill improved the thermal shock performance by /spl ges/5x.     

Die cracking and reliable die design for flip-chip assemblies

Die cracking during underfill cure or thermal cycling is a cause for concern in flip-chip assemblies. In this work, an integrated process-reliability modeling methodology has been developed to determine the stresses at the backside of the die during underfill cure and subsequent thermal cycling. The predicted die stresses have been compared with experimental data, and excellent agreement is seen between the theoretical predictions and the experimental data. The modeling methodology has been used to understand the effect of material and geometry parameters such as substrate thickness, die thickness, standoff height, interconnect pitch, underfill modulus and coefficient of thermal expansion (CTE), and solder mask CTE on die stresses and thus die cracking. Based on underfill-cure and thermal cycling models for specific cases, the critical flaw size to induce catastrophic die cracking has been calculated using linear-elastic fracture mechanics. Design recommendations, including die thinning and polishing, have been made to reduce the tensile stresses on the backside of the die and thus die cracking     

Applications of fracture mechanics to quantitative accelerated life testing of plastic encapsulated microelectronics

Accelerated testing must address the failure mechanisms active within the devices undergoing tests in order to assess lifetimes in a meaningful way. The assumption of constant temperature, thermally activated lifetime, based upon the Arrhenius assumptions, does not always provide the necessary understanding to interpret accelerated tests in microelectronics. Plastic encapsulants, dielectric polymers, and underfill materials are subject to delamination and cracking with thermal cycling. Crack propagation during use environment exposure, drives the potential for failure of microelectronic devices and is therefore a necessary focal point in qualification and life testing. This paper reviews the available research in the application of fracture mechanics to this class of problems in microelectronics including relevant test data. In addition, useful acceleration factor models are derived for polymer crack propagation based on principles of linear elastic fracture mechanics. Further, a simple approach to estimating the minimum temperature cycling ranges, necessary to propagate a crack, is also presented. Finally, a methodology of applying acceleration factors to develop testing plans is shown, with an example in spaceflight for a cubesat in low Earth orbit. Overall, this is a paper that shows a useful and appropriate process for creating physics of failure based life testing for delamination and cracking failures in microelectronic polymers in a temperature cycling environment.     

Vertical die crack stresses of Flip Chip induced in major package assembly processes

This paper focuses on the FEM prediction of vertical die crack stresses in a Flip Chip configuration, induced in the major package assembly processes and subsequent thermo-mechanical loading. An extended Maxwell model is used to describe the time dependent inelastic behavior of the solder bumps. Two types of viscoelastic models, describing the mechanical properties of underfill resin during and after the curing process, are used. The die stresses caused by both the soldering and the underfill curing processes are obtained. These stresses are used as initial stress-state for the further modeling of subsequent thermal cycling. Using this methodology, the complete die stress evolution in a selected Flip Chip can be obtained, the physics of thermal stress induced vertical die cracks can be better understood and the possible die cracks can be reliably predicted.     

Effects of Different Kinds of Underfills and Temperature–Humidity Treatments on Drop Reliability of Board-Level Packages

The hygrothermal and mechanical reliability of board-level packages with various underfills under sequential temperature and humidity (TH) testing and drop testing were investigated. Board-level packages with underfill had greater resistance to drop shock than that without underfill, indicating that underfill protects the package from failure by absorption of the applied drop shock. The underfill, which was composed of polypropylene glycol epoxy resin and silane, exhibited good reliability for drop shock because of the improved adhesion of the underfill compared with that without the polypropylene glycol epoxy resin and silane. In addition, the drop reliability of board-level packages with underfill decreased with increasing TH test duration. Adhesion between the substrate and underfill or between the solder and underfill was decreased by moisture absorption. Components positioned at the board center were more susceptible to failure by drop shock than were corner components.     

Double bump flip-chip assembly

Capillary underfill remains the dominate process for underfilling Hip-chip die both in packages and for direct chip attach (DCA) on printed circuit board (PCB) assemblies. Capillary underfill requires a post reflow dispense and cure operation, and the underflow time increases with increasing die area and decreasing die-to-substrate spacing. Fluxing or no-How underfills are dispensed prior to die placement and cure during the solder reflow cycle. Since filler particles in the fluxing underfill can be trapped between the solder ball and the substrate pad during placement, the filler content of fluxing underfills is typically limited to <20% or assembly yield drops dramatically. At 20% filler concentration, the coefficient of thermal expansion (CTE) of the underfill is near that of the bulk resin (50-80 ppm//spl deg/C). In this paper, a double bump Hip-chip process is described. A filled capillary underfill is coated onto a wafer and cured. The wafer is then polished to expose the solder bumps. A second solder bump is formed over the original bump by stencil printing solder paste. After dicing, the die is assembled to the PCB using unfilled fluxing underfill. In the resulting structure, the low CTE underfill is near the low CTE Si die, and the higher CTE underfill is in contact with the PCB. In addition, the standoff height is increased compared to a conventional single bump assembly. In air-to-air thermal shock tests, the double bump assembly was /spl sim/ 1.5 X more reliable than the conventional single bump construction with fluxing underfill. Modeling results are also presented.     

Adhesion issues in flip-chip on organic modules

Flip chip attach on organic carriers is a novel electronic packaging assembly method which provides advantages of high input/output (I/O) counts, electrical performance and thermal dissipation. In this structure, the flip chip device is attached to organic laminate with predeposited eutectic solder. Mechanical coupling of the chip and the laminate is done via underfill encapsulant materials. As the chip size increases, the thermal mismatch between silicon and its organic carrier becomes greater. Adhesion becomes an important factor since the C4 joints fail quickly if delamination of the underfill from either chip or the solder mask interface occurs. Newly developed underfills have been studied to examine their properties, including interfacial adhesion strength, flow characteristics, void formation and cure kinetics. This paper will describe basic investigations into the properties of these underfills and also how these properties related to the overall development process. In addition, experiments were performed to determine the effects on adhesion degradation of flip chip assembly processes and materials such as IR reflow profile, flux quantity and residues. Surface treatment of both the chip and the laminate prior to encapsulation were studied to enhance underfill adhesion. Accelerated thermal cycling and highly accelerated stress testing (HAST) were conducted to compare various underfill properties and reliability responses     

Corner bonding of CSPs: processing and reliability

The use of chip-scale packages (CSPs) has expanded rapidly, particularly in portable electronic products. Many CSP designs will meet the thermal cycle or thermal shock requirements for these applications. However, mechanical shock (drop) and bending requirements often necessitate the use of underfills to increase the mechanical strength of the CSP-to-board connection. Capillary flow underfills processed after reflow provide the most common solution to improving mechanical reliability. However, capillary underfill dispense, flow, and cure steps and the associated equipment add cost and complexity to the assembly process. Corner bonding provides an alternate approach. Dots of underfill are dispensed at the four corners of the CSP site after solder paste print but before CSP placement. During reflow, the underfill cures, providing mechanical coupling between the CSP and the board at the corners of the CSP. Since only small areas of underfill are used, board dehydration is not required. This paper examines the manufacturing process for corner bonding including dispense volume, CSP placement, and reflow. Drop test results are then presented. A conventional, capillary process was used for comparison of drop test results. Test results with corner bonding were intermediate between complete capillary underfill and nonunderfilled CSPs. Finite-element modeling results for the drop test are also included.     

Reliability of microBGA assembly using no-flow underfill

In this paper, the reliability of the microBGA assembly using no-flow underfill is studied by thermal shock and bending cycle. Recently, a more promising underfill technology so-called “no-flow underfill” has been invented to cope with the limitations, which promises low cost assembly. The research results of self-alignment about no-flow underfill show that the self-alignment of microBGA using no-flow underfill is inferior to that using flux. There is residual displacement more or less in various offset volumes. Therefore, the effect of no-flow underfill on reliability of microBGA assembly needs to be investigated systematically. In this study, samples are reflowed with an optimized “rapid ramp” temperature profile, and using flux and no-flow underfill, respectively. One group of samples are subjected to thermal shock at temperature −40–125°C, and dwell time 15 min. Another group of samples is subjected to cyclic bending at a bending speed of 300 mm/min between 500 and −500 μ at the center of a microBGA package. The fatigue lifetime distribution is examined with the aid of “Weibull” method to investigate the effect of no-flow underfill on the reliability of microBGA assembly, and the failure mechanism is investigated by using the scanning electron microscope. Our experiment results show that the no-flow underfill can greatly enhance the mechanical fatigue lifetime. The underfilled material improves the stress distribution in solder joints. For assemblies with no underfills, the fracture always occurs in the outermost solder joint. The issue is improved by underfilling with no-flow underfill. However, the no-flow underfill cannot improve the thermal reliability of microBGA assembly, because the coefficient of thermal expansion (CTE) of no-flow underfill is too great at present. It is necessary to reduce the no-flow underfill CTE, so as to apply actually to BGA and CSP etc. Moreover, it is displayed that the fatigue lifetime of the residual displacement solder is less than 50% of that of the non-misaligned solder. The residual displacement is formed when the misalignment is >25% during mounting. Therefore, when the no-flow underfill is used in microBGA assembly, care must be taken to keep the mount position, and misalignment <25%.     

A new experimental method to evaluate creep fatigue life of flip-chip solder joints with underfill

A new accelerated stress test method was developed to evaluate creep life of flip-chip solder joints with underfill. With this method, a cyclic creep test can be done simply by applying a displacement to the FR-4 printed circuit board (PCB) board in the axial direction. The creep fatigue test was performed under displacement control with real-time electrical continuity monitoring. Test results show that the displacement arising from the force is equivalent to the thermal stress during thermal expansion. It was found that the magnitude of displacement was proportional to the inelastic strain sustained by the solder joints. This indicates that the creep fatigue life obtained will not only reflect the quality of the solder joints, but can also be used to characterize the reliability of the flip-chip assembly. Finite element modeling was also performed to confirm the agreement of deformation of the solder joints under mechanical and thermal loading. Results suggest that deformation and strain of the flip-chip assembly are consistent or comparable between the mechanical and thermal cycling. The failure analysis indicates that fatigue cracks often initiate from the top edge of a corner solder joint in the creep fatigue test, which is similar to what would happen in thermal cycling test. Lastly, the effect of underfill on the creep fatigue test is discussed. It is postulated that the test method is applicable to other flip-chip assemblies, such as conductive adhesive interconnections.     

Characterization of underfill materials for functional solderbumped flip chips on board applications

The curing conditions and material properties such as the TCE (thermal coefficient of expansion), T_g (glass transition temperature), flexural storage modulus, tangent delta, and moisture content of nine different underfill materials from three different vendors are measured. Their flow rate and the effect of moisture content on mechanical (shear) strength in solder bumped flip chips on organic substrate are also determined experimentally. Furthermore, their effects on the electrical performance (voltage) of functional flip chip devices on organic substrate are measured. Finally, a simple methodology is presented for the selection of underfills from the measurement results of these nine different underfill materials     

In process stress analysis of flip-chip assemblies during underfill cure

Low cost flip chip on board assemblies are analyzed during the underfill cure process to determine residual stress generation. In situ stress measurements are performed over the active face of the die during processing and relative in-plane stresses are measured. Experimental measurements are made using flip-chip test vehicles, based on the Sandia National Laboratories’ ATC04 assembly test chip. Four different commercial underfill materials have been evaluated and a relative comparison is presented with respect to the residual stresses produced by each underfill on the flip-chip assemblies. Significant stress variations are observed between the four underfills studied. Correlation between the glass transition temperature (T_g) and storage modulus (G^′) are made relative to residual stresses produced during underfill cure. Stress relaxation characteristics are also evaluated for the low cost flip-chip assemblies.     

The effects of rheological and wetting properties on underfill filler settling and flow voids in flip chip packages

As the bump diameter and bump pitch of flip chip packages get smaller, the underfill becomes more resistant to flow. Therefore, low viscosity underfills are used in the process to increase the throughput. Problems associated with low viscosity underfills include filler settling and flow induced voids due to fast edge flow. In this paper, we will discuss how the rheological properties can affect underfill filler settling and flow voids. The effects of yield stress of underfill on filler settling and the effects of shear thickening of underfill at large shear rates on flow voids of underfill were investigated. It was shown that the underfills with small fillers have shear-thickening viscosity and yield stress. The filler settling of underfills with yield stress was greatly reduced. A video underfill flow metrology with quartz die packages was developed for flow void observation. The correlation between underfill, substrate properties, and flow voids formation based on the video underfill flow measurement will be discussed.     

Die stress characterization in flip chip on laminate assemblies

Minimizing device side die stresses is especially important when multiple copper/low-k interconnect redistribution layers are present. Mechanical stress distributions in packaged silicon die resulting during assembly or environmental testing can be accurately characterized using test chips incorporating integral piezoresistive sensors. In this paper, measurements of thermally induced stresses in flip chip on laminate assemblies are presented. Transient die stress measurements have been made during underfill cure, and the room temperature die stresses in final cured assemblies have been compared for several different underfill encapsulants. In addition, stress variations have been monitored in the assembled flip chip die as the test boards were subjected to slow temperature changes from -40 to +150/spl deg/C. Using these measurements and ongoing numerical simulations, valuable insight has been gained on the effects of assembly variables and underfill material properties on the reliability of flip chip packages.     

Adhesion characterization of no-flow underfills used in flip chipassemblies and correlation with reliability

Adhesion is one of the key properties of underfills used in flip chip assemblies. This paper characterizes the adhesion strengths of no-flow underfill materials to various die passivations using the shear test techniques. A novel shear test vehicle with planner underfill layers between the die and substrate is presented. The adhesion strengths and failure modes of the no-flow underfill materials during shear testing correlate well with their thermal shock reliability test results. Underfill adhesion related failures such as delamination and crack are investigated and correlated between flip chip assemblies and shear test vehicle assemblies without solder joint interconnects     

Processing and reliability of fast-flow, snap-cure underfills. I.Processing and moisture sensitivity

This series of articles studies the processing, moisture sensitivity, reliability, and failure mode analysis of a number of commercial fast-flow, snap-cure underfill materials. It includes data on process analysis, processing times, and reliability of the test vehicles in air-to-air thermal cycling (-55°C to 125°C), liquid to liquid thermal shock (-55°C to 125°C), and J Standard 020 Revision A Level 3 Moisture Sensitivity Preconditioning followed by reliability testing. Samples cured using a second reflow pass are compared to baseline samples cured in a standard batch oven based on the underfill manufacturer's recommended cure schedule. Results from the processing of these new materials have shown a greatly reduced flow time from earlier generation underfill materials as all of these materials had flow times of less than 30 s under 5-mm test die. Through differential scanning calorimetry analysis, it was shown that materials requiring less than 8 min to cure exhibited at least 95% conversion (percentage of material cured) through the modified second side renew profile. Some of these commercial underfills have also passed J Standard 020 Revision A Level 3 Moisture Sensitivity testing. Specifically in this paper, the flip chip processing, underfill processing, moisture preconditioning, and preconditioning failure modes are presented     

Studies on the reliability of power packages based on strength and fracture criteria

Thermal cycling induced failure in power packages has been studied comparing thermal cycling (TC) with thermal shock (TS) tests by thermo-mechanical analyses. The major question for the time reduction is if the failure mechanism changes and if it depends on loading type and duration. These questions were addressed by theoretical analyses including coupled transient thermal–mechanical analyses and interface fracture mechanics applying the cohesive zone approach. By the latter, critical states for delamination failures could be derived. Finally, critical interface fracture parameters of the package were compared with results from the button shear test.