Nitride based high power devices: design and fabrication issues

We have modeled the breakdown voltage, critical current density and maximum operating frequency of several nitride based high power and high temperature electronic devices. It is found that the minority carrier recombination lifetime and the critical field for electric breakdown are important model parameters which influence device design and performance. Planar geometry GaN Schottky devices were fabricated and used to experimentally estimate these important parameters. Current–voltage measurements have indicated the importance of the non-planar geometries for achieving large breakdown voltages. The minority carrier (hole) diffusion length and recombination lifetime have been measured using the electron beam induced current technique. The measured hole lifetime of 7 ns and estimate for the critical field indicate the possibility of AlGaN based thyristor switch devices operating at 5 kV with current densities up to 200 A/cm² and at frequency above 2 MHz. The GaN structural and optical material quality as well as processing requirements for etching are also discussed.     

Material requirements for high voltage, high power IGBT devices

The two basic package types of current IGBT modules, which evolved from opposing requirements of traction and power transmission applications, are presented. It is shown that reliability and lifetime aspects given by traction puts most stringent limitations on the choice of materials at given cost targets. The materials used today for high power packaging and the future developments of high power IGBT-packages are discussed.     

RESURF AlGaN/GaN HEMT for high voltage power switching

A novel HEMT configuration based on the RESURF technique is proposed for very high voltage power switching applications. It employs a p-n junction below the 2-DEG channel and two field plates, one extending from the gate and the other from the drain, to distribute the electric field over the gate to drain separation. 2-D simulations indicate a breakdown voltage >1 KV at on-resistance of ~1 mΩ·cm² (neglecting contact resistances) for the device     

Reliability issues in 650V high voltage bipolar-CMOS-DMOS integrated circuits

Dominant failure modes in high power/high voltage (650V) BCD-technologies are threshold voltage instabilities of the lateral DMOS transistor due to sodium ingression and parasitic leakage currents in low voltage devices induced by high surface potentials originating from the high voltage devices. The failure mechanisms and their temperature dependence have been characterized and process and layout improvements are demonstrated.     

Reliability of high voltage/high power L/S-band Hbt technology

This paper presents the qualification methodology and results of an InGaP HBT process industrialised by UMS to cover high power L and S band applications. The high level of robustness of the technology has been demonstrated with RF test up to 9 dB compression without any degradation. MTTF of 12 FIT/mm² of semiconductor at a junction temperature of 175 °C have been demonstrated based on more than 560,000 component hours. Also, following the activation period, an asymptotic decrease of the Beta is pointed out both at WLR and long term reliability test and modelled by a Black law. Activation energy between 0.52 and 0.75 eV and a Black factor between 1 and 2 was found. An original and complete failure analysis methodology including NIR emission microscopy, FIB and TEM analysis, have been used to characterised infant mortality for which the root cause is attributed to the propagation through the base–emitter junction of dislocation in the epitaxy. Activation energy of 0.58 eV was determined for this mechanism.     

Influence of surface states on the voltage robustness of AlGaN/GaN HFET power devices

In this work we discuss the influence of the donor-like surface state density (SSD) on leakage currents and the breakdown voltages of AlGaN/GaN heterostructure field-effect transistors (HFET) at high temperature reverse bias (HTRB) step stress. A method to extract charges at the surface by high voltage capacitance voltage (HV–CV) profiling of the gate–drain diode of a HFET is presented. Two samples with different surface passivation are compared. The SSD of the first sample is found to be similar to the polarization charge, whereas it is elevated by a factor of three on the second sample. The influence of the SSD on the electric field is investigated with electroluminescence (EL). The elevated SSD of the second sample engenders severe deficiencies in robustness found in the HTRB. The stress data, the simulation model and the images of EL indicate that the catastrophic failure arises in the dielectric underneath the gate field plate (GFP).     

High-voltage SiC and GaN power devices

The recent progress in the development of high-voltage SiC and GaN power switching devices is reviewed. The experimental performance of various rectifiers and transistors, which have been demonstrated, is discussed. Material and processing challenges and reliability concerns on SiC and GaN power devices are also described. The future trends in device development and commercialization are pointed out.     

高压电网继电保护装置可靠性评估

继电保护装置是高压电力输送系统的主要构成部分之一,高压继电保护中电压传感器对继电设备检测数据稳定性,直接对高压电网继电保护装置的可靠性产生影响,本文对高压网继电保护系统装置可靠性评估研究主要从继电保护的主要技术要点和进一步加强继电保护措施进行分析.     

Reliability of smart power devices

Smart power devices of the last generation are able to integrate a full electronic system, including logic and analog functions and power drivers, in a true single chip solution exploiting the advanced features made available by mixed BCD processes developed for this purpose. The complexity of the ICs and their applications together with the severe stress conditions which these devices can experience in the field makes the reliability assurance of the Smart Power ICs a very challenging task and for this purpose a complete approach is necessary combining an application oriented IC qualification methodology with structural evaluations to test the intrinsic reliability of the basic process elements. In this context the knowledge of the main failure mechanisms is fundamental both for an effective detection in qualification and for an early prevention during IC design.     

基于介质电场增强理论的SOI横向高压器件与耐压模型

SOI(Silicon On Insulator)高压集成电路(High Voltage Integrated Circuit,HVIC)因其具有高速、低功耗、抗辐照以及易于隔离等优点而得以广泛应用。作为SOIHVIC的核心器件,SOI横向高压器件较低的纵向击穿电压,限制了其在高压功率集成电路中的应用。为此,国内外众多学者提出了一系列新结构以提高SOI横向高压器件的纵向耐压。但迄今为止,SOI横向高压器件均采用SiO2作为埋层,且实用SOI器件击穿电压不超过600V;同时,就SOI横向器件的电场分布和耐压解析模型而言,现有的模型仅针对具有均匀厚度埋氧层和均匀厚度漂移区的SOI器件建立,而且没有一个统一的理论来指导SOI横向高压器件的纵向耐压设计。笔者围绕SOI横向高压器件的耐压问题,从耐压理论、器件结构和耐压解析模型几方面进行了研究。基于SOI器件介质层电场临界化的思想,提出介质电场增强ENDIF(Enhanced Dielectric LayerField)理论。在ENDIF理论指导下,提出三类SOI横向高压器件新结构,建立相应的耐压解析模型,并进行实验。(1)ENDIF理论对现有典型横向SOI高压器件的纵向耐压机理统一化ENDIF理论的思想是通过增强埋层电场而提高SOI横向器件的纵向耐压。ENDIF理论给出了增强埋层电场的三种途径:采用低εr(相对介电常数)介质埋层、薄SOI层和在漂移区/埋层界面引入电荷,并获得了一维近似下埋层电场和器件耐压的解析式。ENDIF理论可对现有典型SOI横向高压器件的纵向耐压机理统一化,它突破了传统SOI横向器件纵向耐压的理论极限,是优化设计SOI横向高压器件纵向耐压的普适理论。(2)基于ENDIF理论,提出以下三类SOI横向高压器件新结构,并进行理论和实验研究①首次提出低εr型介质埋层SOI高压器件新型结构及其耐压解析模型低εr型介质埋层SOI高压器件包括低εr介质埋层SOI高压器件、变εr介质埋层SOI高压器件和低εr介质埋层PSOI(PartialSOI)高压器件。该类器件首次将低介电系数且高临界击穿电场的介质引入埋层或部分埋层,利用低εr介质增强埋层电场、变εr介质调制埋层和漂移区电场而提高器件耐压。通过求解二维Poisson方程,并考虑变εr介质对埋层和漂移区电场的调制作用,建立了变εr介质埋层SOI器件的耐压模型,由此获得RESURF判据。此模型和RESURF判据适用于变厚度埋层SOI器件和均匀介质埋层SOI器件,是变介质埋层SOI器件(包括变εr和变厚度介质埋层SOI器件)和均匀介质埋层SOI器件的统一耐压模型。借助解析模型和二维器件仿真软件MEDICI研究了器件电场分布和击穿电压与结构参数之间的关系。结果表明,变εr介质埋层SOI高压器件的埋层电场和器件耐压可比常规SOI器件分别提高一倍和83%,当源端埋层为高热导率的Si3N4而不是SiO2时,埋层电场和器件耐压分别提高73%和58%,且器件最高温度降低51%。解析结果和仿真结果吻合较好。②提出并成功研制电荷型介质场增强SOI高压器件笔者提出的电荷型介质场增强SOI高压器件包括:(a)双面电荷槽SOI高压器件和电荷槽PSOI高压器件,其在埋氧层的一侧或两侧形成介质槽。根据ENDIF理论,槽内束缚的电荷将增强埋层电场,进而提高器件耐压。电荷槽PSOI高压器件在提高耐压的基础上还能降低自热效应;(b)复合埋层SOI高压器件,其埋层由两层氧化物及其间多晶硅构成。该器件不仅利用两层埋氧承受耐压,而且多晶硅下界面的电荷增强第二埋氧层的电场,因而器件耐压提高。开发了基于SDB(Silicon Direct Bonding)技术的非平面埋氧层SOI材料的制备工艺,并研制出730V的双面电荷槽SOILDMOS和760V的复合埋层SOI器件,前者埋层电场从常规结构的低于120V/μm提高到300V/μm,后者第二埋氧层电场增至400V/μm以上。③提出薄硅层阶梯漂移区SOI高压器件新结构并建立其耐压解析模型该器件的漂移区厚度从源到漏阶梯增加。其原理是:在阶梯处引入新的电场峰,新电场峰调制漂移区电场并增强埋层电场,从而提高器件耐压。通过求解Poisson方程,建立阶梯漂移区SOI器件耐压解析模型。借助解析模型和数值仿真,研究了器件结构参数对电场分布和击穿电压的影响。结果表明:对tI=3μm,tS=0.5μm的2阶梯SOI器件,耐压比常规SOI结构提高一倍,且保持较低的导通电阻。仿真结果证实了解析模型的正确性。     

基于Cockcroft-Walton电路的PMT高压电源

根据当前实验室资源的需要合理分配与利用的需求,设计与实现了一种高效率、低纹波的PMT高压电源。该电源主要有LM10CLN电压控制部分,基于Cockcroft-Walton升压电路部分,反馈和保护电路部分和I-V转换部分来实现。最后完成电路的PCB板制作,通过对样品的试验,验证了本方案是可行的。电路运行良好,电路的线性度、纹波大小均符合要求。     

基于JY2410的LED高压驱动电源

采用高亮度的小功率贴片LED驱动芯片JY2410作为主控制器,设计一款在输入电压200~260V、输出恒流电流约为30mA的高效节能、低成本LED驱动恒流驱动电源。主要通过改变输入电压以及不同的驱动负载来测定JY2410的应用价值,该电路设计简单、成本低、效率高,特别适合应用于要求不高的照明应用。     

Temperature measurement on series resistance and devices in power packs based on on-state voltage drop monitoring at high current

Based on the on-state voltage drop monitoring at high current, an alternative method for thermo-sensitive parameters calibration is reported. The main goal is that it allows the simultaneous calibration of the series resistance and power devices voltage drop on temperature. Thereby, the average temperature over all power devices and the temperature difference in average inside the pack can be measured in real applications.     

面向开关过程的大功率电力电子器件建模

传统的大功率电力电子装置仿真中,通常将电力电子装置的开关动态过程视为理想过程,不能如实反映工作过程中的电压电流尖峰脉冲对系统的影响,针对该问题文章提出了一种面向开关过程的大功率电力电子器件建模方法,运用插值建模的方法,对大功率电力电子器件进行兼顾全面性和细致性的仿真,正确反映开关动态过程中大功率电力电子器件过程中的电压电流尖峰现象,从而获得较高的仿真精度。     

Reliability and performance limitations in SiC power devices

Despite silicon carbide’s (SiC’s) high breakdown electric field, high thermal conductivity and wide bandgap, it faces certain reliability challenges when used to make conventional power device structures like power MOS-based devices, bipolar-mode diodes and thyristors, and Schottky contact-based devices operating at high temperatures. The performance and reliability issues unique to SiC discussed here include: (a) MOS channel conductance/gate dielectric reliability trade-off due to lower channel mobility as well as SiC–SiO₂ barrier lowering due to interface traps; (b) reduction in breakdown field and increased leakage current due to material defects; and (c) increased leakage current in SiC Schottky devices at high temperatures.Although a natural oxide is considered a significant advantage for realizing power MOSFETs and IGBTs in SiC, devices to date have suffered from poor inversion channel mobility. Furthermore, the high interface state density presently found in the SiC–SiO₂ system causes the barrier height between SiC and SiO₂ to be reduced, resulting in increased carrier injection in the oxide. A survey of alternative dielectrics shows that most suffer from an even smaller conduction band offset at the SiC–dielectric interface than the corresponding Silicon–dielectric interface and have a lower breakdown field strength than SiO₂. Thus, an attractive solution to reduce tunneling such as stacked dielectrics is required.In Schottky-based power devices, the reverse leakage currents are dominated by the Schottky barrier height, which is in the 0.7–1.2 eV range. Because the Schottky leakage current increases with temperature, the SiC Schottky devices have a reduction in performance at high temperature similar to that of Silcon PN junction-based devices, and they do not have the high temperature performance benefit associated with the wider bandgap of SiC.Defects in contemporary SiC wafers and epitaxial layers have also been shown to reduce critical breakdown electric field, result in higher leakage currents, and degrade the on-state performance of devices. These defects include micropipes, dislocations, grain boundaries and epitaxial defects. Optical observation of PN diodes undergoing on-state degradation shows a simultaneous formation of mobile and propagating crystal stacking faults. These faults nucleate at grain boundaries and permeate throughout the active area of the device, thus degrading device performance after extended operation.     

A high power active circulator using GaN MMIC power amplifiers

This paper presents a 2.4 GHz hybrid integrated active circulator consisting of three power amplifiers and three PCB-based Wilkinson power dividers.The power amplifiers were designed and fabricated in a standard0.35- m Al Ga N/Ga N HEMT technology,and combined with three traditional power dividers on FR4 using bonding wires.Due to the isolation of power dividers,the isolation between three ports is achieved; meanwhile,due to the unidirectional characteristics of the power amplifiers,the nonreciprocal transfer characteristic of the circulator is realized.The measured insertion gain of the proposed active circulator is about 2–2.7 d B at the center frequency of 2.4 GHz,the isolation between three ports is better than 20 d B over 1.2–3.4 GHz,and the output power of the designed active circulator achieves up to 20.1–21.2 d Bm at the center frequency.