The design and analysis of dual control voltages delay cell for low power and wide tuning range ring oscillators in 65 nm CMOS technology for CDR applications

In this paper three delay cell structures used in four-stage ring oscillator are evaluated. In the first structure, the control voltage is employed to the gate of PMOS transistors which are inserted in series with the input PMOS transistors. In this case the minimum power dissipation is gained. Since the control voltage is injected to the PMOS transistors parallel with input transistors, the better tuning range in higher frequency and lower phase noise is achieved. In order to make a tradeoff between the tuning range, phase noise and power dissipation, the PMOS transistors activated with the control voltage are applied to the oscillator in both the series and parallel paths. In improved structure, the oscillator works in 2.65–13.93 GHz under 1 V supply voltage in 65 nm CMOS technology. The phase noise is −94.33 dBc/Hz at 1 MHz offset from 3.7 GHz center frequency, while the power dissipation is 328.6 μW and the chip area is 139.5 µm².     

Performance analysis of mode division multiplexing based free space optics system incorporating on–off keying and polarization shift keying under dynamic environmental conditions

In this paper, we propose a novel mode division multiplexing (MDM) based FSO transmission system incorporating polarization shift keying (PolSK) to enhance the information carrying capacity of the system. Using numerical simulations, we report the transmission of two independent 40 Gbps information signals using distinct Laguerre Gaussian modes up to an FSO transmission reach of 90 km under the influence of clear environmental conditions using the proposed system. Further, the influence of different environmental conditions such as rain, haze, and fog on the performance of the proposed link using bit error rate as performance metrics has also been investigated in this paper. Also, we report a comparative analysis of PolSK and on–off keying modulation formats in the proposed MDM-FSO link under the same environmental conditions. The simulation results show that under different weather conditions, PolSK based MDM-FSO transmission system demonstrates better performance.

     

The temperature dependent analysis of Au/TiO2 (rutile)/n-Si (MIS) SBDs using current–voltage–temperature (I–V–T) characteristics

In this study, the main electrical parameters of Au/TiO₂(rutile)/n-Si Schottky barrier diodes (SBDs) were analyzed by using current–voltage–temperature (I–V–T) characteristics in the temperature range 200–380 K. Titanium dioxide (TiO₂) thin film was deposited on a polycrystalline n-type Silicon (Si) substrate using the DC magnetron sputtering system at 200 °C. In order to improve the crystal quality deposited film was annealed at 900 °C in air atmosphere for phase transition from amorphous to rutile phase. The barrier height (Φ_b) and ideality factor (n) were calculated from I–V characteristics. An increase in the value of Φ_b and a decrease in n with increasing temperature were observed. The values of Φ_b and n for Au/TiO₂(rutile)/n-Si SBDs ranged from 0.57 eV and 3.50 (at 200 K) to 0.82 eV and 1.90 (at 380 K), respectively. In addition, series resistance (R_s) and Φ_b values of MIS SBDs were determined by using Cheung's and Norde's functions. Cheung's plots are obtained from the donward concave curvature region in the forward bias semi-logarithmic I–V curves originated from series resistance. Norde's function is easily used to obtain series resistance as a function of temperature due to current counduction mechanism which is dominated by thermionic emission (TE). The obtained results have been compared with each other and experimental results show that R_s values exhibit an unusual behavior that it increases with increasing temperature.