Organizing and coordinating talk and silence in organizations

The computer stores mountains of information that it communicatesworldwide through an enormous bandwidth. We must learn to exercisesevere, intelligent selectivity in mining our data mountains,and to communicate information in ways that will inform andnot bury the recipients. This is today's task of organizationaldesign. Organizing combines human efforts efficiently, dividingthe undertaking into separate but interdependent tasks and securinggood coordination in their performance. An effective organizationand its buildings balance opportunity for reflective deliberationagainst opportunity for mutual exchange of ideas and information.That balance is lost if talk drowns out silence. In our time,silence is unlikely to drown out talk. In recent years, we have been learning a great deal about thegeneral nature and organization of complex systems. We ourselvesare complex systems and we are surrounded by a host of othercomplex systems: social, technical and natural. Among the importantsocial systems are business and non-profit organizations, ona smaller scale families, and on a larger scale, ethnic groupsand nations. Among the important technical systems are machines,buildings of innumerable kinds and electronic networks. Amongthe important natural systems are multicelled organisms andecosystems.     

Patterning and Templating for Nanoelectronics

The semiconductor industry will soon be launching 32 nm complementary metal oxide semiconductor (CMOS) technology node using 193 nm lithography patterning technology to fabricate microprocessors with more than 2 billion transistors. To ensure the survival of Moore's law, alternative patterning techniques that offer advantages beyond conventional top‐down patterning are aggressively being explored. It is evident that most alternative patterning techniques may not offer compelling advantages to succeed conventional top‐down lithography for silicon integrated circuits, but alternative approaches may well indeed offer functional advantages in realising next‐generation information processing nanoarchitectures such as those based on cellular, bioinsipired, magnetic dot logic, and crossbar schemes. This paper highlights and evaluates some patterning methods from the Center on Functional Engineered Nano Architectonics in Los Angeles and discusses key benchmarking criteria with respect to CMOS scaling.     

Large-scale failures of f(-alpha) scaling in natural image spectra

Several studies have demonstrated that the power spectra of natural image ensembles scale as f(-alpha). A stronger claim that has been made is that the power spectra of single natural images typically also scale as f(-alpha). Results are presented that challenge this latter claim. The results are based on a method for estimating large-scale structure in single images that compares aliasing artifacts produced by image windows of different shape. Failures of f(-alpha) scaling are found at large scales in many natural images. These failures cannot be accounted for by f(-alpha) scaling models such as a linear superposition model or a model based on two-dimensional occlusions in the image plane. The results imply that claims about f(-alpha) scaling in single natural images have been exaggerated. The results also offer insight into why such failures of f(-alpha) scaling occur.     

Long-range correlations of elastic fields in semi-flexible fiber networks

The mechanical properties of semi-flexible networks have been the subject of intense theoretical and experimental studies concerned primarily with the understanding of the complex behavior of biological systems such as the cell. Here it is shown that the elasticity of these networks, both elastic constants and elastic fields, while fluctuating significantly with position, is long-range correlated and the correlation functions exhibit power law scaling. The correlations are lost when the fiber stiffness is reduced. The range of scales over which correlations are observed is bounded below by the mean fiber segment length and above by the filament persistence length. Therefore, these networks can be regarded as stochastic fractal elastic media over the respective range of scales. This implies that no scale decoupling exists and no representative volume element can be identified on scales below the upper correlation cut-off scale.     

Tunable Tribotronic Dual‐Gate Logic Devices Based on 2D MoS2 and Black Phosphorus

With the Moore's law hitting the bottleneck of scaling‐down in size (below 10 nm), personalized and multifunctional electronics with an integration of 2D materials and self‐powering technology emerge as a new direction of scientific research. Here, a tunable tribotronic dual‐gate logic device based on a MoS₂ field‐effect transistor (FET), a black phosphorus FET and a sliding mode triboelectric nanogenerator (TENG) is reported. The triboelectric potential produced from the TENG can efficiently drive the transistors and logic devices without applying gate voltages. High performance tribotronic transistors are achieved with on/off ratio exceeding 106 and cutoff current below 1 pA μm^–1. Tunable electrical behaviors of the logic device are also realized, including tunable gains (improved to ≈13.8) and power consumptions (≈1 nW). This work offers an active, low‐power‐consuming, and universal approach to modulate semiconductor devices and logic circuits based on 2D materials with TENG, which can be used in microelectromechanical systems, human–machine interfacing, data processing and transmission.     

Mutually connected phase-locked loop networks: dynamical models and design parameters

Distribution of timing signals is an essential factor for the development of digital systems for telecommunication networks, integrated circuits and manufacturing automation. Originally, this distribution was implemented by using the master?slave architecture with a precise master clock generator sending signals to phaselocked loops (PLL) working as slave oscillators. Nowadays, wireless networks with dynamical connectivity and the increase in size and operation frequency of the integrated circuits suggest that the distribution of clock signals could be more efficient if mutually connected architectures were used. Here, mutually connected PLL networks are studied and conditions for synchronous states existence are analytically derived, depending on individual node parameters and network connectivity, considering that the nodes are nonlinear oscillators with nonlinear coupling conditions. An expression for the network synchronisation frequency is obtained. The lock-in range and the transmission error bounds are analysed providing hints to the design of this kind of clock distribution system.     

Charge noise in liquid-gated single-wall carbon nanotube transistors

The noise properties of single-walled carbon nanotube transistors (SWNT-FETs) are essential for the performance of electronic circuits and sensors. Here, we investigate the mechanism responsible for the low-frequency noise in liquid-gated SWNT-FETs and its scaling with the length of the nanotube channel down to the nanometer scale. We show that the gate dependence of the noise amplitude provides strong evidence for a recently proposed charge-noise model. We find that the power of the charge noise scales as the inverse of the channel length of the SWNT-FET. Our measurements also show that surprisingly the ionic strength of the surrounding electrolyte has a minimal effect on the noise magnitude in SWNT-FETs.     

Effect of fiber orientation on the non-affine deformation of random fiber networks

The study of fiber networks is essential in understanding the mechanical properties of many polymeric and biological materials. These systems deform non-affinely, i.e. the local deformation is different than the applied far-field. The degree of non-affinity increases with decreasing scale of observation. Here, we show that this relationship is a power law with a scaling exponent independent of the type of applied load. Preferential fiber orientation influences non-affinity in a significant way: this parameter generally increases upon increasing orientation. However, some components of non-affinity, such as that associated with the normal strain in the direction of the preferential fiber orientation, decrease. In random networks, the nature of the far-field has little influence on the level of non-affinity. This is not the case in oriented networks.     

Geometric scaling effects in electrical field flow fractionation. 2. Experimental results

Geometric scaling of microelectrical field flow fractionation (micro-EFFF) systems is investigated experimentally and compared to theory and to macroscale EFFF systems. Experimental results are presented to demonstrate that the miniaturized system operates according to the scaling theory associated with the system. Demonstrated improvements in the channels include increased retention and resolution and decreased peak broadening, electrical time constants, relaxation time, power consumption, and sample size. Additionally, scaling effects related to the compression of separation zones in the miniaturized EFFF systems are discussed.     

Analysis of dynamic morphogen scale invariance

During the development of some tissues, fields of multipotent cells differentiate into distinct cell types in response to the local concentration of a signalling factor called a morphogen. Typically, individual organisms within a population differ in size, but their body plans appear to be scaled versions of a common template. Similarly, closely related species may differ by three or more orders of magnitude in size, yet common structures between species scale to have similar proportions. In standard reaction–diffusion equations, the morphogen range has a length scale that depends on a balance between kinetic and transport processes and not on the length or size of the field of cells being patterned. However, as shown here for a class of morphogen-patterning systems, a number of conditions lead to scale invariance of the morphogen distribution at equilibrium and during the transient approach to equilibrium. Equilibrium scale invariance requires conservation of the total binding site number and total input flux. Dynamic scale invariance additionally requires sufficient binding to slow the diffusion of ligand. The equations derived herein can be extended to the study of other perturbations to gain further insight into the processes regulating the robustness and scaling of morphogen-mediated pattern formation.     

Lead–natural rubber composites as X-ray shields

Abstract

A series of lead–natural rubber composites have been produced on a laboratory scale, and their X-ray protection power measured. The effect of antioxidants on the physicomechanical properties and aging characteristics of the composites was investigated. Flex properties and age retention properties showed perceptible improvement upon the addition of antioxidants without changing the X-ray shielding power. An attempt was made to study the morphology of the fractured surfaces of the composites.

MST/347     

Constructing cities,deconstructing scaling laws

Cities can be characterized and modelled through different urban measures. Consistency within these observables is crucial in order to advance towards a science of cities. Bettencourt et al. have proposed that many of these urban measures can be predicted through universal scaling laws. We develop a framework to consistently define cities, using commuting to work and population density thresholds, and construct thousands of realizations of systems of cities with different boundaries for England and Wales. These serve as a laboratory for the scaling analysis of a large set of urban indicators. The analysis shows that population size alone does not provide us enough information to describe or predict the state of a city as previously proposed, indicating that the expected scaling laws are not corroborated. We found that most urban indicators scale linearly with city size, regardless of the definition of the urban boundaries. However, when nonlinear correlations are present, the exponent fluctuates considerably.     

Coarsening of γ′-precipitates in single-crystal superalloy SRR 99

Abstract

The effects of isothermal annealing between 800 and 1200°C on the microstructure of single–crystal SRR 99 have been investigated. During aging at either 800 or 900°C, the precipitates adopt an irregular, rounded, and highly interconnected array which suggests that they have undergone coalescence. Aging at higher temperatures was found to produce a regular cuboidal precipitate morphology, although long–term aging promoted the formation of γ′-‘rafts’. The precipitate size distributions were found to be broader than those predicted by the Lifshitz-Slyosov and Wagner theory, and the coarsening kinetics also showed significant deviations from the power law prediction of this theory. The reasons for these deviations are discussed in the light of the available models, and it is suggested that a progressive transition in the dominant coarsening mechanism takes place.

MST/371     

Wafer scale homogeneous bilayer graphene films by chemical vapor deposition

The discovery of electric field induced band gap opening in bilayer graphene opens a new door for making semiconducting graphene without aggressive size scaling or using expensive substrates. However, bilayer graphene samples have been limited to μm(2) size scale thus far, and synthesis of wafer scale bilayer graphene poses a tremendous challenge. Here we report homogeneous bilayer graphene films over at least a 2 in. × 2 in. area, synthesized by chemical vapor deposition on copper foil and subsequently transferred to arbitrary substrates. The bilayer nature of graphene film is verified by Raman spectroscopy, atomic force microscopy, and transmission electron microscopy. Importantly, spatially resolved Raman spectroscopy confirms a bilayer coverage of over 99%. The homogeneity of the film is further supported by electrical transport measurements on dual-gate bilayer graphene transistors, in which a band gap opening is observed in 98% of the devices.     

Single-electron devices in silicon

Miniaturisation of silicon microelectronics continues to be a major driving force for the technological progress in computing and electronics. As modern device fabrication is approaching the nanometre scale, quantum effects are dominating device properties. This may set a lower bound for the size of conventional devices, and therefore ultimately limit their performance. On the other hand, quantum effects could enable the development of new types of devices, which might overcome the limitations of classical physics. This review outlines the recent progress in the field of single-electron devices for charge sensing and metrological applications. It illustrates the gap between large-scale commercial fabrication and research prototypes as well as technologies that could close this gap in the future. Any viable roadmap towards commercialisation of single-electron devices is likely to leverage the highly developed silicon-based fabrication methods that have enabled impressive progress in information and communication technology. The scope of this review ranges from random dopant fluctuations in classical devices to single-dopant transistors, and covers electron pumps as well as top-down fabricated single-electron transistors in direct-current and radio-frequency operation.

This review was submitted as part of the 2016 Materials Literature Review Prize of the Institute of Materials, Minerals and Mining run by the Editorial Board of MST. Sponsorship of the prize by TWI Ltd is gratefully acknowledged     

Cache Memory Design for Single Bit Architecture with Different SenseAmplifiers

Most modern microprocessors have one or two levels of on-chip caches to make things run faster, but this is not always the case. Most of the time, these caches are made of static random access memory cells. They take up a lot of space on the chip and use a lot of electricity. A lot of the time, low power is more important than several aspects. This is true for phones and tablets. Cache memory design for single bit architecture consists of six transistors static random access memory cell, a circuit of write driver, and sense amplifiers (such as voltage differential sense amplifier, current differential sense amplifier, charge transfer differential sense amplifier, voltage latch sense amplifier, and current latch sense amplifier, all of which are compared on different resistance values in terms of a number of transistors, delay in sensing and consumption of power. The conclusion arises that single bit six transistor static random access memory cell voltage differential sense amplifier architecture consumes 11.34 μW of power which shows that power is reduced up to 83%, 77.75% reduction in the case of the current differential sense amplifier, 39.62% in case of charge transfer differential sense amplifier and 50% in case of voltage latch sense amplifier when compared to existing latch sense amplifier architecture. Furthermore, power reduction techniques are applied over different blocks of cache memory architecture to optimize energy. The single-bit six transistors static random access memory cell with forced tack technique and voltage differential sense amplifier with dual sleep technique consumes 8.078 μW of power, i.e., reduce 28% more power that makes single bit six transistor static random access memory cell with forced tack technique and voltage differential sense amplifier with dual sleep technique more energy efficient.     

An investigation into the links between island patterns and the mechanisms of thin film deposition

Statistical analysis of pictures of island arrays grown on a substrate during thin-film deposition can yield useful information to the experimentalist such as the shape of the island size distribution. We present an investigation of how this type of information can in turn be used to identify the most important mechanisms governing the growth process. We have used a computational model based on deposition, diffusion, and aggregation (DDA) for the following situations: (1) normal DDA where the island size distributions scale with coverage and are distinguished by the critical island size; (2) DDA plus monomer evaporation, which yields scaling island size distributions that lie between a powerlaw and the normal DDA results depending on the evaporation rate; (3) DDA with a finite probability of islands absorbing monomers, which yields similar distributions to case (2) but crucially does not display the scaling with coverage; and (4) DDA with mobile islands where an even more dramatic departure from scaling is observed.     

2.45 GHz 0.8 mW voltage-controlled ring oscillator (VCRO) in 28 nm fully depleted silicon-on-insulator (FDSOI) technology

MOS bulk transistor is reaching its limits: sub-threshold slope (SS), drain induced barrier lowering (DIBL), threshold voltage (VT) and VDD scaling slowing down, more power dissipation, less speed gain, less accuracy, variability and reliability issues. Fully depleted devices are mandatory to continue the technology roadmap. FDSOI technology relies on a thin layer of silicon that is over a buried oxide (BOx). Called ultra thin body and buried oxide (UTBB) transistor, FDSOI transistors correspond to a simple evolution from conventional MOS bulk transistor. The capability to bias the back-gate allows us to implement calibration techniques without adding transistors in critical blocks. We have illustrated this technique on a very low power voltage-controlled oscillator (VCO) based on a ring oscillator (RO) designed in 28 nm FDSOI technology. Despite the fact that such VCO topology exhibits a larger phase noise, this design will address aggressively the size and power consumption reduction. Indeed we are using the efficient back-gate biasing offered by the FDSOI MOS transistor to compensate the mismatches between the different inverters of the ring oscillator to decrease jitter and phase noise. We will present the reasons which led us to use the FDSOI technology to reach the specifications of this PLL. The VCRO exhibits a 0.8 mW power consumption, with a phase noise about --94 dBc/Hz@1 MHz.     

Investigation of static transmission expansion planning using the symbiotic organisms search algorithm

Transmission expansion planning (TEP) has become a complex problem in restructured electricity markets. This article presents the symbiotic organisms search (SOS) algorithm, a novel metaheuristic optimization technique for solving TEP problems in power systems. The SOS algorithm is inspired by the interactions among organisms in an ecosystem. The TEP problem is formulated here as an optimization problem to determine the cost-effective expansion planning of electrical power systems. Several constraints, such as power flow of the lines, right-of-way validity and maximum line addition, are taken into consideration. First, the SOS algorithm is tested with several benchmark functions. Then, it is applied on three standard power system networks (IEEE 24-bus system, Brazilian 46-bus system and Brazilian 87-bus system) in a TEP study to demonstrate the optimization capability of the proposed SOS algorithm. The results are compared with those produced by other state-of-the-art algorithms.     

Fast approximate methods for the reliability analysis of computer networks

The complexity of computer communication networks has taken a dramatic upswing, following significant developments in electronic technology such as medium and large scale integrated circuits and microprocessors. Although components of a computer communication network are broadly classified into software, hardware and communications, the most important problem is that of ensuring the reliable flow of information from source to destination. An important parameter in the analysis of these networks is to find the probability of obtaining a situation in which each node in the network communicates with all other remaining communication centres (nodes). This probability, termed as overall reliability, can be determined using the concept of spanning trees. As the exact reliability evaluation becomes unmanageable even for a reasonable sized system, we present an approximate technique using clustering methods. It has been shown that when component reliability ⩾ 0.9, the suggested technique gives results quite close to those obtained by exact methods with an enormous saving in computation time and memory usage. For still quicker reliability analysis while designing the topological configuration of real-time computer systems, an empirical form of the reliability index is proposed which serves as a fairly good indicator of overall reliability and can be easily incorporated in a design procedure, such as local search, to design maximally reliable computer communication network.