硅基铝T形梁MEMS可变电容的设计与模拟

提出了一种新颖的运用于射频通信系统VCO中的RFMEMS可变电容。该电容使用平行板和T形梁结构,使用硅衬底,整个结构由铝材料组成,结构简单,与集成电路工艺兼容,从而能够实现片上可变电容。通过静电力驱动上极板向下运动,电容值相应地发生改变,当上极板加电压从2.4V变化到4.3V时,电容值从0.25pF变化到0.33pF,变化率为中心电容的27%。使用Coventor软件对该器件进行了模拟,给出的模拟结果包括容量、调节范围、瞬时响应、Pullin电压和运用该可变电容的VCO的电路模拟。     

Integrated RF components in a SiGe bipolar technology

Several components for the design of monolithic RF transceivers on silicon substrates are presented and discussed. They are integrated in a manufacturable analog SiGe bipolar technology without any significant process alterations. Spiral inductors have inductance values in the range of ~0.15-80 nH with typical maximum quality-factors (Q_max ) of 3-20. The Q_max's are highest if the doping concentration under the inductors is kept minimum. It is shown that the inductor area is an important parameter toward optimization of Q_max at a given frequency. The inductors can be represented in circuit design by a simple lumped-element model. MOS capacitors have Q's of ~20/f (GHz)/C(pF), metal-insulator-metal (MIM) capacitors reach Q's of ~80/f (GHz)/C(pF), and varactors with a 40% tuning range have Q's of ~70/f (GHz)/C(pF). Those devices can he modeled by using lumped elements as well. The accuracy of the modeling is verified by comparing the simulated and the measured high-frequency characteristics of a fully integrated, passive-element bandpass filter     

用Tow-Thomas电路设计含有限非零传输零点有源滤波器的方法

Tow-Thomas电路是一种实现全极点滤波器的典型电路。本文给出了用Tow-Thoms电路设计含有限非零传输零点有源滤波器的方法，从而使Tow-Thomas电路可用于单片集成滤波器电路。而文中给出的公式可用于计算外接元件。设计实例表明了文中给出的计算公式的正确性。     

A 10-b 300-MHz interpolated-parallel A/D converter

A monolithic 10-b A/D converter that realized a maximum conversion frequency of 300 MHz is described. Through the development of the interpolated-parallel scheme, the severe requirement for the transistor V_be matching can be alleviated drastically, which improves differential nonlinearity (DNL) significantly to within ±0.4 LSB. Furthermore, an extremely small input capacitance of 8 pF can be attained, which translates into better dynamic performance such as SNR of 56 dB and THD of -59 dB for an input frequency of 10 MHz. Additionally, the folded differential logic circuit has been developed to reduce the number of elements, power dissipation, and die area drastically. Consequently, the A/D converter has been implemented as a 9.0-mm×4.2-mm chip integrating 36 K elements, which consumes 4.0 W using a 1.0-μm-rule, 25-GHz f_t, double-polysilicon self-aligned bipolar technology     

高重复频率高压脉冲发生器

正 (一)引言 激光电光调制技术以及其它一些物理实验需要重复频率高、电压幅度高、宽度可变的快速高压矩形脉冲发生器。根据需要,我们设计了双臂式充放电电路。同时调试安装了两种规格的高压脉冲发生器。 采用国产FM-30束射四极管作为高压充放电管,达到的指标如下: (1)脉冲幅度:最高5kV(250V5kV连续可调,零电位为250V)。 (2)前后沿时间:负载电容为100pF时,0.5s;负载电容为200pF时,0.8s     

Dynamic element matching for high-accuracy monolithic D/A converters

A novel way to obtain a very high accuracy in the bit weighting required for bipolar monolithic digital-to-analog (D/A) converters is described. The new method combines passive division using matched elements with a time division concept, needs no trimming, and is insensitive to element aging. A 12-bit monolithic D/A network with internal reference sources, built as a test circuit, demonstrates the versatility of this new technique.     

Monolithic integration of optical neurochip with variablesensitivity photodetector

A monolithic integration of an optical neurochip with variable interconnection capability is reported. The neurochip is a three-dimensional optoelectronic integrated circuit, in which a variable sensitivity photodetector is directly fabricated on a light emitting diode. The principle of operation and the fundamental characteristics of the monolithic neurochip are described in detail. The optical crosstalk was significantly reduced and the optical coupling efficiency between the light emitting diode and the variable sensitivity photodetector was improved as compared to the previous hybrid structure. The monolithic neurochip is suitable for a large scale integration because there is little optical crosstalk, high efficiency, and no need of optical alignment     

GaAs MMIC用无源元件的模型

制作了不同结构参数的GaAs MMIC无源元件,包括矩形螺旋电感、MIM电容和薄膜电阻,建立了无源元件的等效电路模型库,采用多项式公式表征无源元件的模型参数和性能参数,便于电路设计的应用.并提取得到MIM电容的单位面积电容值,约为195pF/mm2,NiCr薄膜电阻的方块电阻约为16.1Ω/□.分析结构参数对螺旋电感性能的影响可知,减小线圈面积相关的寄生损耗有助于获得高品质的电感.     

Offset cancelling circuit

A monolithic offset cancelling circuit to reduce the offset voltage at an integrated audio-amplifier output is described. This offset voltage is detected using a low-pass filter with a very large time constant for which only one small on-chip capacitor is needed. The circuit was realized with a bipolar cell-based semicustom array. Measurements have shown that a -3-dB bandwidth below 5 Hz can be realized with a capacitor value of 50 pF. The resulting offset voltage at the audio-amplifier output was 2.5 mV. The offset cancelling circuit increases the wideband noise voltage at the audio-amplifier output by 0.15-MV RMS over the frequency range of 10 Hz to 30 kHz. The use of the offset cancelling circuit eliminates the need for a large external electrolytic capacitor. If an audio amplifier with a single supply voltage is used, a second electrolytic capacitor, needed to obtain a stable reference at half the supply voltage, can be eliminated     

Monolithic clockless-A/D-converter integrated circuits

New circuit arrays and systems of MOS-type monolithic clockless-A/D-converter integrated circuit have been proposed. A fabricated 5-bit monolithic clockless-A/D converter was composed of the self-scanning part associated with the continuously variable threshold voltage device (CVTD), the logic circuit part associated with the AND-GATE circuit and inverter circuit and the decoder part. The minimum converting time and the resolution accuracy for 1 bit were about 2 µs and 3.1 percent, Furthermore, the circuit system and the array, the device structure, and the electrical characteristics are discussed in details.     

A 0.35 μm CMOS AM demodulator

This paper presents a 0.35 μm CMOS AM demodulator circuit. Design details, simulations and measurements results of the monolithic implementation of a highly accurate synchronous rectifier are shown. The circuit implements an envelope detector with a ±1.5 V output swing on a 15 pF load. It dissipates 15 mW from a ±2.5 V voltage supply, and presents SNR = 81 dB measured at a THD = ?40 dB for an input signal having 100% modulation index.     

Design and implementation of a CMOS VCXO for FM stereo decoders

A circuit technique to simulate large variable capacitance of both positive and negative polarities over a given frequency range is discussed. The simulated capacitance can be varied by voltage control from -60 to +100 pF. The capacitor-simulating circuit is connected in parallel with a resonator to tune its parallel resonance. An oscillator with grounded resonator is also developed. Together with the variable capacitor, a voltage-controlled crystal oscillator (VCXO) is realized. The oscillation frequency of the oscillator can be tuned continuously from 452 to 461 kHz by voltage control. Detailed analyses to completely characterize the oscillator with a simple expression are presented. The prototype of the VCXO has been fabricated in a 4-μm standard CMOS process     

A fully compensated active pull-down ECL circuit withself-adjusting driving capability

A new active pull-down emitter-coupled logic (ECL) circuit having full compensation against fluctuations in supply voltage and temperature is proposed. This circuit needs no capacitors but a feed-back circuit to adjust its pull-down capability to its load capacitance. The speed performance is compared between the active pull-down ECL circuit and the conventional ECL circuit using 0.8 μm SPICE parameters. The active pull-down ECL circuit is twice as fast as the conventional ECL circuit under the load capacitance of 0.8 pF with the same power dissipation. The relation between the power dissipation and the operating frequency is compared among the CMOS, the conventional ECL, and the active pull-down ECL circuits. The comparison adapts a new method in which the circuit parameters are optimized at each operating frequency. The SPICE simulation using this new method shows the conventional ECL circuit has a lower power dissipation than the CMOS circuit, even in the low operating frequency region of 100 MHz. The new active pull-down ECL circuit has the lowest power dissipation among the three circuits. The power dissipation of this circuit shows 47% lower than the CMOS circuit and 29% lower than the conventional ECL circuit at the operating frequency of 600 MHz and the load capacitance of 0.8 pF     

差动电容敏感式力学传感器的信号提取电路

通过对加速度计的研究,开发了一类利用差动电容敏感的力学传感器的信号检测电路。在电路中给出了所使用的电子元器件,并进行分析求解,给出了电路的输出电压和传感器信号拾取电容变化量之间的正比例关系。经过实验测试,当电容变化0.01 pF时,就有10 mV的输出电压。故该电路可以检测微弱电容的变化,特别是电容变化量为0.01~1.00 pF的小电容变化。     

A Discretely Adaptive Delta Modulation Codec

A discretely variable slope delta modulation (DVSD) codec is described, which is suitable for integrated circuit realization. The step size is varied by a pulse number modulation method that does not require a precision digital-to-analog conversion circuit. An adaptation algorithm is discussed, taking into consideration the effect of transmission errors. The quantizer and integrator portion has been fabricated on a monolithic chip using MOS technology. Results obtained from an experimental 32 kbit/s codec demonstrate its excellent performance.     

Monolithic dual-gate GaAs FET digital phase shifter

The design, fabrication, and characterization of a fully monolithic FET digital phase-shifter circuit is described. The circuit is designed around a unique dual-gate FET structure Operating as a switchable single-pole, double-throw amplifier. Each 2.5 × 3.0-mm chip has one bit (e.g., 22.5°, 90°, etc.) of phase control. The circuit, which includes all dc bypass circuitry on-chip, features thin-film lumped element capacitors and inductors, air-bridge crossovers and interconnects, via-hole frontside grounding, and integral beam leads. The fabrication of these elements is described in some detail. The phase-shifter circuit gives a peak gain of 3 dB across a 10-percent bandwidth in X-band. A method of achieving continuous phase and amplitude control using a 90° bit chip is described. Finally, phase performance of a four-bit digital phase shifter realized by cascading four monolithic active phase-shifter chips is reported.     

Design method for monolithic analogue filters

A new concept, compatible with m.o.s. or bipolar technology, for the design of monolithic analogue active filters is proposed. The method uses only ratioed capacitors as passive components and is especially suitable for the implementation of high-frequency filters. A high-Q, f0 = 1 MHz bandpass filter is presented as an example, using a total capacitance of only 58 pF.     

A simple three-terminal IC bandgap reference

A new configuration for realization of a stabilized bandgap voltage is described. The new two-transistor circuit uses collector current sensing to eliminate errors due to base current. Because the stabilized voltage appears at a high impedance point, the application to circuits with higher output voltage is simplified. Incorporation of the new two-transistor cell in a three-terminal 2.5-V monolithic reference is described. The complete circuit is outlined in functional detail together with analytical methods used in the design. The analytical results include sensitivity coefficients, gain and frequency response parameters, and biasing for optimum temperature performance. The performance of the monolithic circuit, which includes temperature coefficients of 5 ppm//spl deg/C over the military temperature range, is reported.     

Monolithic Dual-Gate GaAs FET Digital Phase Shifter

The design, fabrication, and characterization of a fully monolithic FET digital phase-shifter circuit is described. The circuit is designed around a unique dual-gate FET structure operating as a switchable single-pole, double-throw amplifier. Each 2.5 X 3.0-mm chip has one bit (e.g., 22.5°, 90°, etc.) of phase control. The circuit, which includes all dc bypass circuitry on-chip, features thin-film lumped element capacitors and inductors, air-bridge crossovers and interconnects, via-hole frontside grounding, and integral beam leads. The fabrication of these elements is described in some detail. The phase-shifter circuit gives a peak gain of 3 dB across a 10-percent bandwidth in X-band. A method of achieving continuous phase and amplitude control using a 90° bit chip is described. Finally, phase performance of a four-bit digital phase shifter realized by cascading four monolithic active phase-shifter chips is reported.     

一种串联蓄电池组电压巡检仪的设计

在线监测是目前工业中常见的监测方式,工业级应急电源的蓄电池便是需要监测的对象。用一种以单片机技术为核心,利用V/F转换的方法对单体蓄电池电压进行实时监测,采用光电隔离与变压器隔离的方法解决采集电路和单片机处理电路电气隔离的问题。给出巡检仪硬件结构框架,通过3种通信方式实现数据通信,并给出采集电路的供电方法。