Activation efficiencies for a standard qualification implant in gaas annealed by a rapid thermal process

Recently a 150 keV, 2 × 10¹² cm⁻², Si²⁹ implant, with furnace annealing at 850° C for 10 min with a GaAs proximity wafer, has been proposed as a standard qualification test for semi-insulating GaAs. In general, the electrical activation efficiency of implanted wafers is determined either from Hall effect data or from capacitance-voltage (C-V) data; however, the Hall effect method requires sizable depletion corrections at low implant doses. In this paper, we examine the proposed standard, and the methods of determining activation, from three points of view: (1) rapid-thermal annealing (RTA) vs furnace annealing; (2) a Si proximity cap vs a GaAs proximity cap; and (3) Hall effect vs C-V. Our conclusions are: (1) RTA produces higher activation efficiencies, at least for our particular wafers, than furnace annealing; (2) Si and GaAs proximity caps produce nearly equivalent activation efficiencies; and (3) the Hall effect, when corrected for depletion, is a useful technique for measuring activation efficiency, and appears to be more accurate than the C-V technique.     

Electrical and optical activation studies of Si-implanted GaN

Comprehensive and systematic electrical and optical activation studies of Si-implanted GaN were made as a function of ion dose and anneal temperature. Silicon ions were implanted at 200 keV with doses ranging from 1×10¹³ cm^?2 to 5×10¹⁵ cm^?2 at room temperature. The samples were proximity-cap annealed from 1050°C to 1350°C with a 500-Å-thick AlN cap in a nitrogen environment. The optimum anneal temperature for high dose implanted samples is approximately 1350°C, exhibiting nearly 100% electrical activation efficiency. For low dose (≤5×10¹⁴ cm^?2) samples, the electrical activation efficiencies continue to increase with an anneal temperature through 1350°C. Consistent with the electrical results, the photoluminescence (PL) measurements show excellent implantation damage recovery after annealing the samples at 1350°C for 20 sec, exhibiting a sharp neutral-donor-bound exciton peak along with a sharp donor-acceptor pair peak. The mobilities increase with anneal temperature, and the highest mobility obtained is 250 cm²/Vs. The results also indicate that the AlN cap protected the implanted GaN layer during high-temperature annealing without creating significant anneal-induced damage.     

Electrical and optical characterization studies of lower dose Si-implanted AlxGa1−xN

Electrical and optical activation studies of lower dose Si-implanted Al_xGa_1?xN (x=0.14 and 0.24) have been made systematically as a function of ion dose and anneal temperature. Silicon ions were implanted at 200 keV with doses ranging from 1×10¹³ cm^?2 to 1×10¹⁴ cm^?2 at room temperature. The samples were proximity cap annealed from 1,100°C to 1,350°C with a 500-Å-thick AlN cap in a nitrogen environment. Nearly 100% electrical activation efficiency was obtained for Al_0.24Ga_0.76N implanted with a dose of 1 × 10¹⁴ cm^?2 after annealing at an optimum temperature around 1,300°C, whereas for lower dose (≤5×10¹³ cm^?2) implanted Al_0.24Ga_0.76N samples, the electrical activation efficiencies continue to increase with anneal temperature up through 1,350°C. Seventy-six percent electrical activation efficiency was obtained for Al_0.14Ga_0.86N implanted with a dose of 1 × 10¹⁴ cm^?2 at an optimum anneal temperature of around 1,250°C. The highest mobilities obtained were 89 cm²/Vs and 76 cm²/Vs for the Al_0.14Ga_0.86N and Al_0.24Ga_0.76N, respectively. Consistent with the electrical results, the photoluminescence (PL) intensity of the donor-bound exciton peak increases as the anneal temperature increases from 1,100°C to 1,250°C, indicating an increased implantation damage recovery with anneal temperature.     

Si-and Be-implantations in lnP:Fe activated by halogen lamp rapid thermal annealing

Halogen lamp rapid thermal annealing is performed at different temperatures and time durations to activate InP:Fe implanted with 200 keV Si and 60 keV Be ions in the range of 5 x 10¹² -4 x 10¹⁴ cm^-2 . Better electrical properties are obtained in the rapid thermal annealed material than in conventional furnace annealed material. The mea-sured maximum dopant activation and electron mobility for a 200 keV/1 x 10¹⁴ cm^-2 Si-implant are 76% and 1440 cm²/V-s, respectively. For a 60 keV/4 x 10¹⁴ cm^-2 Be-implant an activation of 28% and a sheet resistance of 810 Ω/sq are obtained by using rapid thermal annealing. An implant profile broadening is observed in Be-implanted samples activated with either furnace annealing or rapid thermal annealing.     

Halogen lamp rapid thermal annealing of Si- and Be-implanted In0.53Ga0.47As

Halogen lamp rapid thermal annealing was used to activate 100 keV Si and 50 keV Be implants in In_0.53Ga_0.47As for doses ranging between 5 × 10¹²−4 × 10¹⁴ cm⁻². Anneals were performed at different temperatures and time durations. Close to one hundred percent activation was obtained for the 4.1 × 10¹³ cm⁻² Si-implant, using an 850° C/5 s anneal. Si in-diffusion was not observed for the rapid thermal annealing temperatures and times used in this study. For the 5 × 10¹³ cm⁻² Be-implant, a maximum activation of 56% was measured. Be-implant depth profiles matched closely with gaussian profiles predicted by LSS theory for the 800° C/5 s anneals. Peak carrier concentrations of 1.7 × 10¹⁹ and 4 × 10¹⁸ cm⁻³ were achieved for the 4 × 10¹⁴ cm⁻² Si and Be implants, respectively. For comparison, furnace anneals were also performed for all doses.     

Sensitivity analysis of ion implanted silicon wafers after rapid thermal annealing

In this study, we have investigated sensitivities of the ion implanted silicon wafers processed by rapid thermal annealing (RTA), which can reveal the variation of sheet resistance as a function of annealing temperature as well as implantation parameters. All the wafers were sequentially implanted by the arsenic or phosphorous implantations at 40, 80, and 100 keV with the dose level of 10¹⁴ to 2 × 10¹⁶ ions/cm². Rapid thermal annealing was carried out for 10 s by the infrared irradiation at a temperature between 850 and 1150°C in the nitrogen ambient. The activated wafer was characterized by the measurements of the sheet resistance and its uniformity mapping. The values of sensitivities are determined from the curve fitting of the experimental data to the fitting equation of correlation between the sheet resistance and process variables. From the sensitivity values and the deviation of sheet resistance, the optimum process conditions minimizing the effects of straggle in process parameters are obtained. As a result, a strong dependence of the sensitivity on the process variables, especially annealing temperatures and dose levels is also found. From the sensitivity analysis of the 10 s RTA process, the optimum values for the implant dose and annealing temperature are found to be in the range of 10¹⁶ ions/cm² and 1050-1100°C, respectively. The sensitivity analysis of sheet resistance will provide valuable data for accurate activation process, offering a guideline for dose monitoring and calibration of ion implantation process.     

Rapid thermal annealing of magnesium implanted GaAs-GaAIAs heterostructures experimental and simulated distributions

The use of rapid thermal annealing (RTA) techniques to anneal ion implanted GaAs compounds is expected to have a significant impact on device technology. Due to the short duration of the heat treatment, the implanted impurities may be activated without significant diffusion. For heterojunction bipolar transistor (HBT) applications, high doses of p-type impurities are required to compensate the doping levels of N-GaAlAs emitter and n⁺ GaAs contact layers. Multi-implantations were chosen to maintain a flat profile down to the base layer. Energies of 30, 60, 150, and 340 keV with doses of 6 × 10¹³, 9 × 10¹³,6 × 10¹⁴, and 9 × 10¹⁴ cm⁻², respectively, have been used. Annealing cycles with time durations of a few seconds and temperature in the range of 850–950°C are described. Electrical properties of the annealed samples have been investigated using an electrochemical measurement technique. It was found that hole concentrations as high as 4 × 10¹⁹ cm⁻³ and electrical activities near to 75 percent can be obtained. There is no evident indiffusion and no significant outdiffusion at the optimal annealing conditions. Simulation of multilayer implantations are also carried out by an accurate model available in TITAN 2D process simulator using Pearson IV laws and taking into account the diffusion effects on profile distribution caused by RTA. A first approximation using a simple model allows a rapid evaluation of the data fitting operation. In a second approach, concentration dependent diffusivity and the contribution of the electric field at the interface are covered to perform an improved data fitting of ion implanted and annealed dopant profiles. A comparative study shows a good agreement between experimental and simulated distributions.     

Rapid thermal annealing of dual Si and P implants in InP

In this study we evaluate the effects of dual implantation with different doses of Si and P on dopant activation efficiency and carrier mobility in InP:Fe. The implants were activated by a rapid thermal annealing step carried out in an optimized phosphoruscontaining ambient. For high dose implants (10¹⁴–10¹⁵ cm⁻²), which are typically employed for source/drain regions in FETs, dual implantation of equal doses of Si and P results in a higher sheet carrier concentration and lower sheet resistance. For 10¹⁴ cm⁻² Si implants at 150 keV, the optimal P co-implant dose is equal to the Si dose for most anneal temperatures. We obtain an activation efficiency of ∼70% for dual implanted samples annealed at 850° C for 10 sec. The high activation efficiencies and low sheet resistances obtained in this study emphasize the importance of stoichiometry control through the use of P co-implants and a phosphorus-containing ambient during the thermal processing of InP.     

Effect of annealing temperature on 1.5 μm photoluminescence from Er-lmplanted 6H-SiC

The effect of post-implantation anneal on erbium-doped 6H-SiC has been investigated. 6H-SiC has been implanted with 330 keV Er⁺ at a dose of 1 × 1013 /cm2. Er depth profiles were obtained by secondary ion mass spectrometry (SIMS). The as-implanted Er-profile had a peak concentration of∼1.3 × 10¹⁸/cm³ at a depth of 770Å. The samples were annealed in Ar at temperatures from 1200 to 1900°C. The photoluminescence intensity integrated over the 1.5 to 1.6 μm region is essentially independent of annealing temperature from 1400 to 1900°C. Reduced, but still significant PL intensity, was measured from the sample annealed at 1200°C. The approximate diffusivity of Er in 6H SiC was calculated from the SIMS profiles, yielding values from 4.5 × 10⁻¹⁶ cm²/s at 1200°C to 5.5 × 10⁻¹⁵ cm²/s at 1900°C.     

Surface roughening in ion implanted 4H-silicon carbide

Silicon carbide (SiC) devices have the potential to yield new components with functional capabilities that far exceed components based on silicon devices. Selective doping of SiC by ion implantation is an important fabrication technology that must be completely understood if SiC devices are to achieve their potential. One major problem with ion implantation into SiC is the surface roughening that results from annealing SiC at the high temperatures which are needed to activate implanted acceptor ions, boron or aluminum. This paper examines the causes and possible solutions to surface roughening of implanted and annealed 4H-SiC. Samples consisting of n-type epilayers (5 × 10¹⁵ cm⁻³, 4 μm thick) on 4H-SiC substrates were implanted with B or Al to a total dose of 4 × 10¹⁴ cm⁻² or 2 × 10¹⁵ cm⁻², respectively. Roughness measurements were made using atomic force microscopy. From the variation of root mean square (rms) roughness with annealing temperature, apparent activation energies for roughening following implantation with Al and B were 1.1 and 2.2 eV, respectively, when annealed in argon. Time-dependent activation and surface morphology analyses show a sublinear dependence of implant activation on time; activation percentages after a 5 min anneal following boron implantation are about a factor of two less than after a 40 min anneal. The rms surface roughness remained relatively constant with time for anneals in argon at 1750°C. Roughness values at this temperature were approximately 8.0 nm. Annealing experiments performed in different ambients demonstrated the benefits of using silane to maintain good surface morphology. Roughnesses were 1.0 nm (rms) when boron or aluminum implants were annealed in silane at 1700°C, but were about 8 and 11 nm for B and Al, respectively, when annealed in argon at the same temperature.     

Electrical measurements on ion-implanted LPCVD polycrystalline silicon films

The electrical conduction properties of ion implanted polycrystalline silicon films have been studied. The polysilicon films were deposited by pyrolysis of silane at 647°C in LPCVD system onto oxide-coated silicon wafers to a thickness of 0.6 μm. Dopants were itroducd by implanting with boron or phosphorus ions, accelerated to 145 keV; doses ranged from 1 × 10¹² cm^?2 to 1 × 10¹⁵ cm^?2. Film resistivities spanning 8 orders of magnitude were obtained using this doping range. Current-voltage characteristics of polysilicon resistors were measured at temperatures ranging from 24 to 140°C. The associated barrier heights and activation energies were derived. The grain-boundary trapping states density was estimated to be 5 × 10¹² cm^?2. We found that both dopant atom segregation and carrier trapping at the grain boundaries play important roles in polysilicon electrical conduction properties. However, within the dose range studies, the dopant atom segragation is most detrimental to the film conductivity for doses < 1 × 10¹³ cm^?2; as the dose is increased, carrier trapping effects become more pronounced for doses up to 5 × 10¹⁴ cm^?2. For doses ? 5 × 10¹⁴ cm^?2, conduction due to carriers tunneling through the potential barriers at grain boundaries has to be considered.     

Si-implantation into GaAs grown on Si

200 keV Si implantations were performed in the dose range of 5 × 10¹² − 1 × 10¹⁴ cm⁻² in GaAs grown on Si. For comparison implants were also performed in GaAs layers grown on GaAs substrates. Implanted layers were annealed by both furnace and halogen lamp rapid thermal anneals. Significantly lower donor activations were observed in GaAs layers grown on Si substrates than in the layers grown on GaAs substrates. Extremely low dopant activations were obtained for Be implants in GaAs grown on Si. Photoluminescence and photoreflectance measurements were also performed on the implanted material.     

The effect of argon implantation on the conductivity of boron implanted silicon

Silicon wafers have been implanted with boron (3 × 10¹⁴ or 1 × 10¹⁵ ions cm^?2) and with argon (up to 1 × 10¹⁵ ions cm^?2). The energies were chosen to approximately superimpose the two impurity distributions. After the boron and argon implantations the sheet resistance of each wafer was measured following annealing in nitrogen at temperatures in the range 400–1050°C. The highest dose argon implantation produced an increase in sheet resistance which persisted throughout the entire temperature range. Lower argon doses produced a reduction in sheet resistance for anneal temperatures between 550 and 800°C. The magnitude of the reduction is a function of the boron and argon doses and of the anneal temperatures. The greatest reduction, observed after a 600°C anneal, was by a factor of 5.8. Above 800°C the low dose argon did not affect the sheet resistance.The observed reduction in sheet resistance is expected to lead to an improvement in metal to p-type silicon contacts. A particular application is in the contacts to resistors in fast bipolar logic circuits. As high electrical activity can be obtained at moderate annealing temperatures with combined boron and argon implantations, these implantations can be carried out at a late stage in an integrated circuit process schedule without the danger of additional movement of existing junctions.     

PMOS integrated circuit fabrication using BF3 plasma immersion ion implantation

The feasibility of plasma immersion ion implantation (PHI) for multi-implant integrated circuit fabrication is demonstrated. Patterned Si wafers were immersed in a BF₃ plasma forp-type doping steps. Boron implants of up to 3 × 10¹⁵ atoms/cm² were achieved by applying microsecond negative voltage (-2 to -30 kV) pulses to the wafers at a frequency of 100 Hz to 1 kHz. After implantation the wafers were annealed using rapid thermal annealing (RTA) at 1060° C for 20 sec to activate the dopants and to recrystallize the implant damaged Si. For the PMOS process sequence both the Si source-drain and polycrystalline Si (poly-Si) gate doping steps were performed using PIII. The functionality of several types of devices, including diodes, capacitors, and transistors, were electrically measured to evaluate the compatibility of PIII with MOS process integration.     

Improved oxidation procedures for reduced SiO2/SiC defects

A significant reduction in the effective oxide charge and interface state densities in oxides grown on p-type 6H-SiC has been obtained by lowering the oxidation temperature of SiC to 1050°C. Further improvements are obtained by following the oxidation with an even lower temperature re-oxidation anneal. This anneal dramatically improves the electrical properties of the Si/SiC interface, and substantially lowers the interface state density. The net oxide charge density on p-type 6H-SiC is also lowered significantly, but remains quite high, at 1.0 × 10¹² cm^-2. The interface state densities of 1.0 × 10¹¹ cnr⁻²/eV are approaching acceptable MOS device levels. The breakdown fields of the oxides are also substantially improved by both the lower oxidation temperature and re-oxidation anneal. Using a low temperature oxidation followed by a re-oxidation anneal for MOSFETs results in a room temperature mobility of 72 cm²/V-s, the highest channel mobility reported for SiC MOSFETs to date.     

Rapid capless annealing of28Si,64Zn,and9Be implants in GaAs

We report the use of tungsten-halogen lamps for rapid (−10 s) thermal annealing of ion-implanted (100) GaAs under AsH₃/Ar and N₂ atmospheres. Annealing under flowing AsH₃/Ar was carried out without wafer encapsulation. Rapid capless annealing activated implants in GaAs with good mobility and surface morphology. Typical mobilities were 3700–4500 cm²/V-s for n-layers with about 2×10¹⁷cm⁻³ carrier concentration and 50–150 cm²/v-s for 0.1–5xl0¹⁹ cm⁻³ doped p-layers. Rapid thermal annealing was performed in a vertical quartz tube where different gases (N₂, AsH₃/H₂, AsH₃/Ar) can be introduced. Samples were encapsulated with SiO when N₂ was used. Tungsten-halogen lamps of 600 or 1000 W were utilized for annealing GaAs wafers ranging from 1 to 10 cm² in area and 0.025 to 0.040 cm in thickness. The transient temperature at the wafer position was monitored using a fine thermocouple. We carried out experiments for energies of 30 to 200 keV, doses of 2×10¹² to 1×10¹⁵ cm⁻², and peak temperatures ranging from 600 to 1000‡C. Most results quoted are in the 700 to 870‡C temperature range. Data on implant conditions, optimum anneal conditions, electrical characteristics, carrier concentration profiles, and atomic profiles of the implanted layers are described. Presented at the 25th Electronic Materials Conference, Burlington, VT, June 22, 1983.     

Correlation between chemical and electrical profiles in Si+, Se+ and S+ implanted bulk and epitaxial GaAs

We compare the chemical profiles of Cr, Mn, Si and Se with the electron concentration profiles in Si, Se and S implanted semi-insulating Cr-O doped bulk GaAs substrates and undoped VPE buffer layers annealed with and without a SiO₂ encapsulant in a H₂-As₄ atmosphere. A higher activation efficiency in the net electron concentration and the gateless saturated channel current is measured for SiO₂ encapsulated wafers annealed under arsine overpressure than for capless annealed ones using Cr-O doped bulk GaAs substrates. On the other hand, the net donor concentration peak is higher for implanted buffer epi layers capless annealed under arsine overpressure than for SiO₂ encapsulated ones. Secondary ion mass spectrometry (SIMS) studies of the Cr decoration of the implant damage indicate that the damage from the 100 keV Si implant anneals out at 840°C while a temperature of 900°C is required to anneal out the 260 keV Se implant damage. An explanation of these differences is provided using an impurity redistribution model and charge neutrality considerations. Excellent Hall electron mobilities at liquid nitrogen temperature of 5400–9200 cm²/V-sec are measured for Si-implanted buffer epi substrates.     

A physically based phenomenological model using boltzmann-matano analysis for boron diffusion from polycrystalline Si into single crystal Si

The diffusion of boron in single crystal Si from a BF₂-implanted polycrystalline Si film deposited on single crystal Si has been accurately modeled. The effective diffusivities of boron in the single crystal Si substrate have been extracted using Boltzmann-Matano analysis and the new phenomenological model for B diffusivity has been implemented in the PEPPER simulation program. The model has been implemented for a range of furnace anneal conditions (800 to 950°C, from 30 min to 6h) and implant conditions (BF₂ doses varied from 5×10¹⁵ to 2×10¹⁶ cm⁻² at 70 keV).     

Studies of implanted boron emitters for solar cell applications

B implanted emitters are investigated in the back junction cell configuration and their material properties are tested in double side implanted Si wafers. B has been implanted at 5 keV at various dose conditions varying from 1 × 10¹⁴ up to 3 × 10¹⁵ at./cm² and activated at 1000°C for 10 min. N‐type 8 × 8 cm² mono‐crystalline cells are fabricated and measured. Both fill factor and efficiency increase for high‐B doses. However, at 10¹⁵ at./cm² B dose the V_oc drops, which is in agreement with lifetime degradation in the wafer. Defect evolution simulations of B_nI_m clusters formation is correlated with lifetime degradation. Copyright © 2011 John Wiley & Sons, Ltd.     

Internal-getter formation in nitrogen-doped dislocation-free silicon wafers

An experimental study is reported concerning the formation of defects in nitrogen-doped dislocation-free silicon wafers under a multistage heat treatment to produce an internal getter, the first stage being rapid thermal annealing (RTA) under different conditions. The experiments are conducted on p-Si(100) wafers of diameter 200 mm with an oxygen content of (6−7) × 10¹⁷ cm⁻³ and a doping level of 1.6 × 10¹⁴ cm⁻³, the resistivity being 10–12 ω cm. The processed wafers are examined by optical microscopy and transmission electron microscopy. With normal conditions of RTA (argon, 1250°C, 20 s), the process is found to be incapable of creating a defect-free subsurface layer of adequate thickness, though it is able to provide the desired system of defects in the bulk. The aim is achieved by changing to sequential RTA in oxygen and argon as the first stage. The reasons for the results are presented.