Testable switched-capacitor filters

A design-for-testability (DFT) methodology for switched-capacitor (SC) filters is presented, based on an architecture using some additional circuitry and providing extra capabilities for both off- and online test. A programmable biquad is used for on-chip comparison of the transfer functions for every filter stage. Test area overhead consists of the programmable biquad, a set of switches, and a finite-sequential-machine (FSM) control part. The design and implementation of an example filter are included to assess the potential usefulness of this approach     

A design synthesis system for recursive DSP algorithms represented by fully specified flow graphs

This paper describes a design synthesis environment which can generate an efficient VLSI layout from a recursive DSP algorithm specified by a graph. The design synthesis environment is divided into three parts: optimal schedule generation, circuit synthesis, and VLSI layout generation (silicon compilation). The scheduler first computes optimality conditions for a given input algorithm and then finds a schedule which satisfies the optimality conditions. We have employed a cyclo-static optimal multiprocessor compiler as a scheduler. The circuit synthesis component translates the optimal schedule into a structural specification, including the control structures, for an circuit realization. In the final part, a VLSI layout is generated from the structural specification. We have chosen the LAGER system for the silicon compilation. This paper illustrates the design synthesis process with complete details of a simple, complete example, a second order Direct Form II IIR filter.This work was supported in part under the Joint Services Electronics Program Contract # DAAL-03-90-C-0004.     

Automated design of switched-current filters

This paper describes the automated design and synthesis of switched-current (SI) filters using SCADS, a flexible CAD system integrated in a major VLSI design suite. With this system, the nonspecialist can produce high performance analog filters suitable for mixed signal CMOS IC's fabricated using only standard digital processes. To achieve high levels of performance on silicon, filter designs are realized using an enhanced differential circuit technique (S²I) in its integrators and sample-and-hold cells. The design system is described in terms of the embedded circuits, its integrated tool set, the filter design flow and the engineering procedures for ensuring reliable circuit operation. Examples of high performance video frequency filters are presented, each generated automatically by SCADS within one day. Fabricated in a 0.8 μm standard CMOS process, they demonstrate state-of-the-art performance     

Obtaining expert advice [filter synthesis]

Unlike other filter-synthesis design tools, EXSHOF employs knowledge-based synthesis of a high-order active filter. The package is completely menu driven and extremely user friendly. At the various stages of filter design it asks questions of the user and provides guidelines to these questions; i.e., it gives expert help in making decisions. It assumes that the user has little knowledge of computers and filters. Users have the option of using any of the five approximation functions or directly inputting the transfer function. It can design four types of different high-order filter structures and nine different biquad circuits. The detailed diagram of the designed circuit is presented to the user in a modular form using graphics. The frequency response of the circuit has been simulated using PSpice and it has been found that the response exactly matches the input specifications     

Enhanced dynamic range analog filter topologies with a notch/all-pass circuit example

The signal handling capability of the filters is called dynamic range. In this paper, a topological form for the synthesis of filters with high dynamic range is proposed. A biquad notch/all-pass filter is shown in conformity with the given topological form. It is shown that there is a trade-off between dynamic range and high input impedance property. The presented circuit is compared with other notch filters in the literature. It has less number of components, better high-frequency response and dynamic range compared to others. Since the circuit includes a minimum number of resistors, it can easily provide electronically tunable circuits through resistor/controlled current conveyor replacement. Simulations are performed to verify the theoretical results. Routh-Hurwitz stability analyses are also given.     

Voltage mode universal filters employing single FDCCII

In this paper, four new voltage-mode universal biquad filters configuration are proposed. First of two circuits proposed high-input impedance universal filter with single-input and three-outputs, which can simultaneously realize voltage mode low-pass, band-pass and high-pass filter responses employing all grounded passive components. The third proposed universal filter three-input and single-output, which also can realize all the standard filter functions. The fourth circuit proposed universal filter with three-input and five-outputs, which can be used as either a three-inputs single-output or a two-inputs five-outputs universal filters. It can realize all five different generic filtering signals: low-pass, band-pass, high-pass, band-stop and all-pass. Simulation results are given to confirm the theoretical analysis. The proposed biquad filters are simulated using TSMC CMOS 0.35 μm technology.     

Adequate SC model of op-amp with finite DC gain and bandwidth suitable for two-op-amp SC biquad analysis

An adequate model of a nonideal op-amp operating in a two-op-amp SC biquad is derived. The model leads to an equivalent SC circuit containing ideal components. Substitution of any op-amp in an SC biquad by its equivalent SC circuit allows the exact frequency response of the biquad to be found easily, taking into account the finite DC gain and bandwidth of op-amps.     

Switched-capacitor biquad with low influence of finite gains

The letter describes a switched-capacitor (SC) biquad which exhibits less effect of the finite gains on the Q-factor and centre frequency than other known biquads of this type. The properties of the circuit have been established by extensive simulation studies using a symbolic analysis program.     

An artificial intelligence approach to active filter synthesis

This paper deals with a novel active filter synthesis method using artificial intelligence (AI). The AI-based synthesis methodology uses original analog circuit representation performed by a Prolog backward-chaining inference mechanism. Circuit representation is specified as an analog circuit language to describe filter topologies, performance characteristics, and subcircuits. Synthesis is organized as a Prolog searching program based on backward-chaining strategy to transform input specifications into an appropriate filter structure. The Prolog program performs symbolic equation transformations to proper filter transfer characteristics. The proposed synthesis methodology has been developed for integrated continuous-time filter structures using operational transconductance amplifiers and capacitors to realize tunable and active C filters. A synthesis program has been implemented in Turbo Prolog on an IBM PC AT computer, and a filter example is presented demonstrating the use of the program.This paper was supported by the Ministry of Education of Poland Grant CPBP 02.14.     

Improving the testability of switched-capacitor filters

A design-for-test methodology for SC filters is presented, based on an architecture using some additional circuitry and providing extra capabilities for both off-and on-line tests. The approach uses a comparison (voting) mechanism to indicate whether or not two copies of a filter element (a biquad, for instance) have a similar response during their actual operation. The design and implementation of a few filter examples are included to assess the potential usefulness of this new approach.     

Second-order OTA-C filters derived from Nawrocki-Klein biquad

Based on the Nawrocki and Klein biquad and using different input and output techniques, many new filter structures and functions are developed from both voltage- and current-mode viewpoints. For example, it is found that the basic five operational transconductance amplifier (OTA) structure has the LP, BP, HP, BS and AP functions without the use of capacitor injection and component matching, a feature shared by no other existing two integrator loop OTA-capacitor (OTA-C) circuit, including the original NK biquad. Various BS, LPN, HPN, AP and universal architectures are obtained, which require fewer OTAs and may be more useful than the original biquad. This research shows that the NK biquad is one of the most important second-order OTA-C filters at least from the viewpoint of filter architectures and functions, and thus should receive attention in continuous-time filter design     

Improving the testability of switched-capacitor filters

A design-for-test methodology for SC filters is presented, based on an architecture using some additional circuitry and providing extra capabilities for both off- and on-line tests. The approach uses a comparison (voting) mechanism to indicate whether or not two copies of a filter element (a biquad, for instance) have a similar response during their actual operation. The design and implementation of a few filter examples are included to assess the potential usefulness of this new approach.     

Biquad alternatives for high-frequency switched-capacitor filters

Biquad sections are the basic building block of practical switched-capacitor (SC) filters. The authors focus on the amenability of various biquad options for high-frequency operation. A comparison on the basis of analysis and a recent nonideal SC network simulation tool are confirmed by results from a VLSI 1.25-/spl mu/m CMOS test chip. A differencing-input SC biquad is shown to have a significant performance advantage over other circuits.     

A 3 V 10 MHz pseudo-differential SC bandpass filter using gainenhancement replica amplifier

This paper describes the design strategy and implementation of a high frequency low voltage pseudo-differential SC filter which use opamps with gain enhancement replica amplifier. Experimental results of a biquad SC bandpass with a center frequency of 10 MHz and a Q of 10 are presented. The realized opamp has an open-loop unity-gain bandwidth of 850 MHz, a phase margin of about 62°, and a dc gain of 50 dB. The prototype filter dissipates 23 mW from a 3 V supply and occupies 0.3 mm ² in a 0.8 μm N-well single-poly, double-metal CMOS process     

New monolithic switched-capacitor differentiators with good noiserejection

Inverting and noninverting switched-capacitor (SC) differentiators suitable for integrated-circuit implementation are proposed and analyzed. Their structures are simple, parasitic-free, and less sensitive to offset voltage and power-supply voltage changes. In addition, their fabrication process and operating clocks are fully compatible with conventional SC integrators. Noise analysis shows a good low-frequency noise-rejection capability. The high-frequency noise can be suppressed and does not overdrive the output of the SC differentiators. To demonstrate the application of the SC differentiators in the SC filter, a bandpass differentiator-type biquad is presented. Both the differentiators and the biquad have been fabricated and measured. The differentiation waveforms and the good consistency between the measured and the simulated circuit responses verify the correct operation of the SC differentiators     

基于MOCCCII-C的双二阶电流模式滤波器

本文提出了一种基于多输出端电流控制电流传输器(multiple outputs current controlled conveyors II)的双二阶电流模式滤波器电路,该滤波器结构简单,仅包含2个有源器件、2个接地电容.在不改变内部电路的情况下只需改变外部输入电流的接入方式和接入数目就可以实现二阶低通、高通、带通、带阻、全通滤波功能,面向实际电路完成了PSpice仿真,结果表明提出的电路正确有效.     

一种用于图象处理的二维开关电容滤波器新的设计系统

本文描述二维实时滤波器开关电容网络的新的设计方法。该设计是在综合法的基础上,利用无损、非倒数原形电路而得到的开关电容网络。本文所使用的几个计算机软件,均已写好并调试,可将其集成为一个完整的设计系统。本文作为该设计系统的实际应用,举例设计一个二维高性能滤波器,该滤波器可以像一个CMOS单片那样实现。若与数字滤波器实现相比较,可达到降低成本和减少功耗的目的。     

Mixed analog/digital, FIR/IIR realization of a linear-phase lowpassfilter

A 5 kHz linear-phase lowpass filter is implemented in a 2-μm BiCMOS technology as a combination of sigma-delta front-end, a digital shift register, a switched capacitor (SC) summer circuit with 50 input capacitors, and an SC biquad running at a 1 MHz clock. The measured group delay variation in the passband is less than 1 μs and the measured total harmonic distortion (THD) is -80 dB for an input sine wave amplitude of 0.7 V at 1 kHz. The circuit consumes 80 mW from ±5 V supply and measures 8.12 mm² without pads     

基于信号流图的开关电流滤波器设计

开关电流（SI）是有望取代开关电容（SC）的一种新型的取样数据技术，鉴于SC技术发展的成熟性及其与SI技术的紧密联系，即SC和SI滤波电路具有互易性，可采用信号流图转置的方法，将SC综合法直接用于SI滤波器设计，而无须提出新的设计方法。本文以二阶巴特沃思开关电容带通滤皮器为例给出了该方法的具体应用。     

New realization of inductances for switched-capacitor filters using voltage inverter switches

This paper describes a new design method of inductance simulation for switched-capacitor (SC) filters based on the VIS-SC concept. The resulting circuits have not only the excellent sensitivity behavior of VIS-SC filters, but also the low sensitivity to the main parasitics occuring in the MOS integrated circuit, i.e., the parasitic capacitances between the bottom plates of the implemented capacitors and substrate. As examples, a sixth-order band-pass and a sixth-order band-stop elliptic filter transformed from a third-order low-pass are given. Experimental results agree very well with theory. A brief analysis is given of certain parasitic effects in band-stop filters at the Nyquist frequency.