曼彻斯特编码的微控制器单线仿真器设计

本文为一款带OCDS的8051 MCU设计了一种单线仿真器，采用曼彻斯特编码。该仿真器使用STM32处理器，加上外围电路形成仿真器电路板，然后对STM32进行编程，实现仿真器的软件功能。仿真器负责将主机USB发出的调试命令转换为单线协议，然后发给MCU的OCDS,进而控制MCU的运行。测试结果表明，该仿真器可以对MCU实现软件代码下载、启动与停止、断点设置、单步执行及存储访问等功能，该单线仿真器对其他形式仿真器也具有一定参考价值。     

基于ATmega128的泥浆压力脉冲信号仿真器

本文提出了一种基于Atmkega128单片机的某种专用泥浆压力脉冲信号仿真器,该仿真器用于石油钻井无线随钻测量仪器的研制开发和维修过程中.本信号仿真器的核心是ATmega128单片机,通过单片机的软件来模拟各种不同类型的信号和噪声,并且能将这些信号和噪声混合后,通过特殊的硬件电路以4-20毫安电流环的标准工业传感器形式输出.这种仿真器使用简单方便,能够逼真的模拟实际工程现场的压力信号,稳定性好,性能先进.     

用于光刻伺服盘电路调试的信号仿真器的设计

为满足光刻伺服磁盘驱动器电路调试的需要，本文设计了一种信号仿真器，由任意波形发生器和磁盘信号源库在相关软件的辅助下来仿真较为复杂的各类磁盘驱动器信号。同传统的函数发生器或用硬件来实现的信号仿真手段相比，其更具有适应性和灵活性。文中详细分析了仿真器的硬件结构和软件构造，并介绍了它在光刻伺服磁盘驱动器电路调试中的实际应用。     

一种高性能、低成本FPGA仿真器电路再构设计

为了提高FPGA仿真器的运行速度,降低硬件设计成本,通过对现有仿真器的硬件电路结构和原理进行深入研究,提出并构造了一种高性能、低成本的新型FPGA仿真器设计实现电路。与传统仿真器硬件设计相比,该电路功能仅由一片单片机(PIC18F14K50)得以实现,电路芯片数量变少,成本降低,电路结构更简单,固件烧写操作更易。利用该设计电路完成的FPGA仿真器经测试证明,其电路设计完全正确,运行效果有明显改进,稳定性更好,速度更快,是传统设计方案的3-5倍,设计成本仅为十分之一。     

一种快速断点仿真器的软硬件协同设计

仿真器是利用硬件在仿真环境中对程序进行仿真、调试的重要工具。在断点执行方式下，需要检查控制断点和数据断点，仿真器难以保持较快的仿真速度，提出了一种软硬件协同的快速断点仿真器设计方案，在仿真过程中有效地简化了目标程序和监控程序的交互过程，从而可以获得较快的仿真速度，并简化了电路的设计。     

逻辑电路仿真器

这里给出一个逻辑电路仿真器，它很像一台逻辑分析仪，可以检验工作的正确性、排除电路故障等。文章首先介绍仿真原理，然后给出源代码，最后说明使用方法。     

嵌入式在线仿真器SL-K51L的使用范围

SL-K51L仿真器非常适合于51系列产品的学习与开发,也适合用它来将你的成熟产品性能升级。入门者的廉价工具 作为一个初学MCU的人来说,仿真器和编程器一般是必不可少的。因为你是新手,你有时极需要借助仿真器来观察MCU内部是怎样运行的;同时,仿真器本身就是一个可以直接运行的系统,不需要用户考     

某型飞机地面导航仿真器软件总体设计

以PC/104嵌入式计算机为平台的某型飞机地面导航仿真器,模拟导航计算机的空中有关导航功能,实现与飞机实际操作控制台之间的通信,并通过转换电路驱动了相应显示设备,同时实现以太网数据同步监控、显示和处理等。该仿真器为飞行参数分析、处理提供了一个简单可靠、实时的数据源。对仿真器总体设计过程尤其是软件开发过程进行了翔实的介绍,拓宽了广大从事Windows环境下仿真器设计的工程技术人员视野。     

8XC196MC变频器专用仿真器的开发

介绍变频器专用仿真器的设计开发。硬件设计方面,介绍了芯片的选择,重点论述三对PWM波形发生器、保护电路和信号输入输出电路,并选择并口与上位机通信;软件设计方面,仿真器与上位机的通讯使用同步串行通讯（SPI）,软件依据此通讯协议而设计,使用32位命令－地址－数据方式。此仿真器也可直接用于变频控制,实际使用证明,此仿真器优于其它通用型仿真器。     

一个用于汽车HIL仿真器的三维虚拟现实的实现

自上个世纪八十年代以来，汽车行业在将机电一体化工程应用于汽车产品方面取得了突破性的进展。在这一过程中，各类仿真器被广泛运用于汽车产品的开发。这反过来又推动了相关仿真器本身的研究与发展。文中介绍了为一个汽车HIL实时仿真器开发的三维虚拟现实的实现方案。     

RELAX: a new circuit simulator for large scale MOS integrated circuits

Algorithms and techniques used in RELAX are described. RELAX is a time domain MOS digital circuit simulator based on a new analysis method called Waveform Relaxation Method¹ which exploits decomposition techniques. Preliminary comparisons between RELAX and the standard circuit simulator SPICE2 have shown that RELAX is a fast and reliable circuit simulator.     

基于伺服机构的动态测试系统

为了验证伺服机构设计以及测试系统的正确性,提出并研制了伺服机构模拟器以及相应的动态测试系统;模拟器采用数字和模拟电路,能够模拟各种型号伺服机构工作特性;动态测试系统采用基于VXI总线测试模块以及虚拟测试软件完成对模拟器静态和动态参数的测试;通过对动态测试中的数字信号处理方法进行研究,提出了平滑滤波改进方法;测试结果表明,系统能够满足对伺服机构测试的需要;该系统可编程,操作简单,适合部队训练使用.     

Three-dimensional electromagnetic simulation of electronic circuits of general shape

A general purpose CAD tool, the IE3D electromagnetic simulator is presented in this article. The simulator is based on an integral equation, a method-of-moment formulation for a full-wave solution of three-dimensional (3D) arbitrarily shaped structures in microwave and millimeter-wave integrated circuits (MMIC), high temperature superconductor (HTS) circuits, microstrip antennas, RF printed circuit boards (PCB), and high speed digital circuit packaging. The primary solution of the simulator is the current distribution on a metallic structure in an environment of multilayered substrates on infinitely extended ground plane. The circuit parameters of the structure in either S-parameter form or RLC-SPICE equivalent circuit form is extracted from the solved current distribution. The simulator consists of an MS-Windows-based layout editor, a schematic editor, an electromagnetic simulator, and a post processor. The simulator can perform stand-alone electromagnetic simulation and optimization and mixed electromagnetic and nodal analysis. Simulation results for structures in various high frequency and high speed domains are presented and compared to measured results. © 1994 John Wiley & Sons, Inc.     

Development of a user friendly gate-level logic simulator

A design of a digital logic simulator is developed and presented. BASIC on an IBM Personal Computer using interactive graphics tools is employed to make the simulator easy to use. The simulator can handle gate level logic circuits, and can be used for both logic verification and fault testing.

Efficient and correct simulation in a user-friendly environment was the main design objective. Concepts of interactive computer graphics are extensively applied to enable the drawing of the circuit. Menu structures have been used to simplify the interaction of user and computer. The foundation has been laid for a simulator that uses pattern recognition for circuit data acquisition.

The simulator permits the verification of the logic of a circuit without fault. The design also includes provision for inserting delays and simulating to detect hazards. Test sequences to detect the presence of faults in the circuit can be generated using deductive simulation. The design provides a reliable basis for further research into logic simulation.     

基于Simulink的数模混合电路仿真平台设计与实现

针对数模混合电路仿真精度与性能之间的矛盾问题和仿真工业级复杂数模混合电路时仿真工具存在主流芯片和电路模块不足问题,提出了一种粘合模式的数模混合仿真平台模型架构,基于该架构设计并实现了一种基于Simulink软件,通过嵌入数字电路和模拟电路主流仿真引擎获得充足主流芯片和电路模块支持的数模混合电路仿真平台,设计了一种结合了拓扑排序算法的仿真控制方式,实现了对工业级复杂电路进行流程化、模块化的数模混合仿真;最后通过一个能够时序上可以逻辑拆分的典型数模混合电路仿真验证了仿真平台的有效性。     

基于C8051F005单片机的飞机供电系统模拟器

介绍了某型号飞机电源系统模拟器的结构和设计原理,详细介绍了C8051F005单片机及其外围的模拟量输入输出电路、数字量输入输出电路和供电电路,并对系统的软件设计进行了阐述,实验证明此模拟器实时性好,稳定性高,能满足系统要求。     

太阳敏感器电模拟器设计

针对小卫星半实物仿真系统的技术需求,提出了一种太阳敏感器电模拟器设计实现方法;模拟器以FPGA作为控制核心,采用压控电流源实现了0-1式太阳敏感器、模拟式太阳敏感器的输出电流模拟;通过专用电流源芯片REF200实现了数字式太阳敏感器输出电流模拟;模拟器由计算机通过RS-485接口控制,既能模拟太阳敏感器正常工作时的电信号输出,也能模拟太阳敏感器出现故障时的电信号输出;该太阳敏感器电模拟器已应用于小卫星的半实物仿真,其电流精度可达±1μA。     

星载光学遥感相机图像模拟源的设计与实现

在星载光学遥感相机研制过程中,进行相机的原理实现和功能验证是必要环节,图像模拟源就是关键的实验设备;图像模拟源主要是模拟相机输出的高速图像,以及相机的工作模式和工作流程;采用现场可编程门阵列FPGA实现模拟源的时序与逻辑控制,通过RS-422总线接收控制命令,高速的图像数据的传输采用Channel Link技术,通过高速LVDS接口发送给地面图像数据采集与处理系统,模拟源输出的总数据率达到4.56Gbps;该图像模拟源具有设计灵活、性能稳定可靠、可维护性强等优点,为星载光学遥感相机的研究提供了行之有效的测试手段。     

A novel architecture of dynamically reconfigurable fused multiply–adder for digital signal processing

Introduction

Multiply-accumulate operation is the most fundamental operation in digital signal processing for image processing, robotics and automatic control. In this paper, a novel architecture of dynamically reconfigurable fused multiply-adder (FMA) is proposed.

Methods

Dynamic reconfiguration is a method that can change the circuit configuration without stop of operation. The proposed circuit provides the following four calculation modes by dynamic reconfiguration: (1) complex number FMA mode, (2) real number FMA mode, (3) complex number parallel calculation mode, and (4) real number parallel calculation mode.  The data format is single precision floating point format based on IEEE754. The proposed circuit was designed using Verilog-HDL. It was simulated by logic circuit simulator, and implemented on FPGA.

Result

As a result of circuit synthesis, we confirmed the reduction of resource in the proposed circuit. Furthermore, we confirmed proper result for each calculation mode by logic simulation and experiment on FPGA.

Conclusion

The proposed circuit provides the four calculation modes by dynamic reconfiguration. We confirmed the reduction of resource and proper result for each calculation mode.     

Statistical Fault Analysis

Statistical Fault Analysis, or Stafan, is proposed as an alternative to fault simulation of digital circuits. This method defines Controllabilities and observabilities of circuit nodes as probabilities estimated from signal statistics of fault-free simulation. Special Procedures deal with these quantities at fanout and feedback nodes. The computed probabilities are used to derive unbiased estimates of fault detection probabilities and overall fault coverage for the given set of input vectors. Among Stafan's advantages, fault coverage and the undetected fault data obtained for actual circuits are shown to agree within five percent of fault simulator results, yet CPU time and memory demands fall far short of those required in fault simulation. The Computational complexity added to a fault-free simulator by Stafan grows only linearly with the number of circuit nodes.