电力电子集成技术的现状及研究进展

综述了电力电子集成技术目前的基本概念、研究的意义和现状等；列举了当前主要的研究机构和研究内容；分析了未来的研究方向。     

电力电子器件封装模块的散热特性

以传统电力电子器件封装模型为基础,介绍了大功率电力电子器件热量传递机理、失效原因。阐述了电力电子器件的主要外部散热方式及发展现状。最后基于有限元软件ANSYS为平台,通过改变电力电子器件内部结构,包括芯片间距、衬板厚度、铜底板厚度,分析了内部结构芯片散热的影响。通过测试发现,当芯片分布均匀时,散热效果最好,导热系数较高的材质,芯片散热效果较为理想。在小范围内,芯片结温随底铜板厚度增加而下降,之后芯片结温随厚度增加而升高。     

用于接地保护的电力电子集成模块的研制

为了提高电气设备运行的可靠性和保证人身安全,基于分立元件研制了一种集接地保护和开关功能于一体的电力电子集成模块。模块有四个外接端子,模块中集成了检测电路、驱动电路和开关电路。该模块作为开关串接在电气设备的供电主回路中,可以保证只有当电气设备的外壳或电气设备内须接地的参考点接地时,才接通电气设备的供电电源。实验和应用证实,该模块是有效的。     

基于互感模型的混合封装电力电子集成模块内 电磁干扰的研究

研究了大电流混合封装电力电子集成模块(IPEM)内功率电路对控制驱动电路的电磁干扰问题研究表明,功率电路的内部环流通过互感耦合的方式会对IPEM内部的控制和驱动电路产生重要影响,特别是环流的高频分量为了对环流的EMI进行评估,建立了IPEM的内部环流实验模型另外,一种简化的基于局部元等效电路(PEEC)原理的建模和计算方法被用于计算环流回路与控制和驱动回路之间的互感,实验证明结果是比较准确的.     

倒装芯片集成电力电子模块寄生参数的建模

采用球栅阵列芯片尺寸封装技术和倒装芯片(Flip Chip,FC)技术构建了半桥集成电力电子模块(Integrated Power Electronics Module,IPEM),半桥FC-IPEM实现三维封装结构。采用阻抗测量法提取模块寄生电感和寄生电容,建立模块的寄生参数模型,对模块进行电气性能测试。结果表明:半桥FC-IPEM构成的同步整流Buck变换器输出滤波电感中的电流波动幅度小于0.6A。     

功率电子模块及其封装技术

功率电子模块正朝着高频、高可靠性、低损耗的方向发展,其种类日新月异。同时,模块的封装结构、模块内部芯片及其与基板的互连方式、封装材料的选择、制备工艺等诸多问题对其封装技术提出了严峻的挑战。文章结合了近年来国内外的主要研究成果,详细阐述了各类功率电子模块（GTR、MOSFET、IGBT、IPM、PEBB、IPEM）的内部结构、性能特点及其研究动态,并对其封装结构及主要封装技术,如基板材料、键合互连工艺、封装材料和散热技术进行了综述。     

混合封装电力电子集成模块内功率电路对驱动保护电路的热影响

混合封装电力电子集成模块(IPEM)是目前中功率范围内电力电子集成的主要方式。IGBT器件与控制和驱动电路高密度地封装在一起,IGBT的发热对驱动保护电路会产生非常不利的影响,我们针对这个问题进行了研究。利用三维有限元法建立了模块内的传热模型,对不同发热功率下IGBT的结温以及驱动保护电路PCB的最高温度进行了计算和分析。另外,对功率电路与驱动保护电路PCB之间存在空气隙以及模块完全被密封后模块内的传热问题也进行了实验研究。     

功率模块封装结构及其技术

本文从封装角度评估功率电子系统集成的重要性。文中概述了多种功率模块的封装结构形式及其主要研发內容。另外还讨论了模块封装技术的一些新进展以及在功率电子电路系统集成中的地位和作用。     

系统级封装(SiP)集成技术的发展与挑战

系统级封装集成技术是实现电子产品小型化和多功能化的重要手段。国际半导体技术发展路线已经将SiP列为未来的重要发展方向。本文从新型互连技术的发展、堆叠封装技术的研究、埋置技术的发展以及高性能基板的开发等方面概述了系统级封装集成技术的一些重要发展和面临的挑战。     

电力电子集成模块用平板热管的传热研究

 为了解决高封装密度的电力电子集成模块所面临的热集中问题,本文提出了一种在蒸发端和冷凝端设置有工质回流柱的垂直传热平板热管用以替代传统电力电子集成模块的纯铜基板,并对该模块的传热性能进行了研究.研究结果表明,在186W/cm²的热载荷下,热管基板蒸发端的高对流换热系数削弱了模块的热集中现象,其结壳热阻是商用铜基板模块热阻的一半,并且热管基板在正反放置的情况下具有相同的散热性能.集成模块在225W的脉宽热载荷冲击下,管芯的瞬态最高温度比商用模块低46℃.     

An overview to integrated power module design for high power electronics packaging

In recent years, there has been an explosion in demand for smaller and lighter, more efficient, and less expensive power electronic supplies and converters. There are a number of reasons for this recent necessity, ranging from the need for smaller and cheaper power converters for consumer electronics (such as laptop computers and cellular phones) to the need for highly reliable power electronics for such items as satellite and military craft power systems, which are required to be highly efficient, light in weight, smaller in volume, and low cost. This paper discusses the concept of Integrated Power Modules (IPMs), in which the electronic control circuitry and the high power electronics of the converter are integrated into a single compact standardized module. The advantages and disadvantages of such an approach will be discussed in reference to the current industry standard for power electronics design and packaging. The researchers will then take the readers through the IPM design, including basic circuit topology layout, module fabrication processes, and finally thermal considerations.     

Impact of power electronics packaging on the reliability of grid connected photovoltaic converters for outdoor applications

This paper deals with thermal and reliability aspects of converters for grid connected photovoltaic applications (rate power approximately 100 W) which can be integrated into solar modules. The use of these Module Integrated Converters (MIC) promises a reduction of costs due to mass production. It improves behaviour of the whole photovoltaic system, as there is no voltage mismatch caused by shading effects. The electronic components of the MIC are exposed to extreme environmental conditions. Lifetime limiting factors are described. Methods to increase the lifetime of the most crucial components in the MIC, electrolytic capacitors, are described. The presented 1st generation Low Profile MIC with “optimised design” is capable of running in very high ambient temperatures. This design maximises availability of the photovoltaic system, which consequently leads to a cost reduction of the electrical energy delivered to the grid. Different realisations of how to integrate the designed Low Profile MIC into the solar module are discussed. A detailed thermal simulation is used to optimise the MIC design according to temperature and reliability issues. The models used for thermal simulation are described.     

相控阵测控系统瓦式一体化T/R组件设计

T/R组件作为相控阵测控系统的核心部件,其性能好坏直接决定了相控阵测控系统的效能表现。针对传统相控阵测控系统中采用的砖式T/R组件设计存在的集成度低、尺寸大、功耗高、安装复杂、后期维护性差等问题,设计了一种新型瓦式一体化T/R组件。该型T/R组件通过多层不同功能模块的瓦片式层叠和盲插互联结构实现了T/R组件高度的集成化、良好的散热性以及优异的安装维护性能。随着相控阵测控系统的通道数越来越多,集成度越来越高,新型瓦式一体化T/R组件的工程优异性也将会更加明显。     

微波多芯片组件中垂直通孔互连的研究进展

随着微波多芯片组件密度的不断提高,微波互连的不连续性成为制约其整体性能的瓶颈。从垂直互连通孔入手,介绍了垂直通孔互连的矩阵束矩量法、时域有限差分法、边基有限元法以及微波网络模型法和CAD模型法,分析了这些方法已经取得的结果,并指出了这些方法的优缺点。通过比较分析,认为时域有限差分法和边基有限元法是分析互连通孔最有优势的方法。     

高功率激光装置集中控制系统关键技术

高功率激光装置集中控制系统在研制过程中遇到了从系统构架设计到软件模拟等不同层面上的技术问题,经过多年的研究和测试,解决了控制系统研制中的关键技术,达到了装置对控制系统的性能指标要求,保证了控制系统的稳定可靠运行,并为未来同类装置的控制系统研制提供了重要的技术保障。     

数字显示电路的设计与多芯片组件封装实现

由于MCM自身的特点，物理设计已成其瓶颈问题。本文在已有方案的基础上，设计实现了一个数字显示电路，并计算了各单元电路的相关参数，最后对电路进行多芯片组件(MCM)封装。仿真结果表明，该电路的最大电容量和响应时间等参数均能满足电路设计的要求。     

Thermal management of power electronics modules packaged by a stacked-plate technique

The research presented in this paper is part of a multidisciplinary research program of the Center for Power Electronics Systems at Virginia Tech. The program supported by the Office of Naval Research focuses on the development of innovative technologies for packaging power electronics building blocks. The primary objective of this research is to improve package performance and reliability through thermal management, i.e., reducing device temperatures for a given power level. The task of thermal management involves considering trade-offs in the electrical design, package layout and geometry, materials selection and processing, manufacturing feasibility, and production cost. Based on the electrical design of a simple building block, samples of packaged modules, rated at 600 V and 3.3 kW, were fabricated using a stacked-plate technique, termed metal posts interconnected parallel plate structure (MPIPPS). The MPIPPS technique allows the power devices to be interconnected between two direct-bond copper substrates via the use of metal posts. Thermal modeling results on the MPIPPS packaged modules indicate that the new packaging technique offers a superior thermal management means for packaging power electronics modules.     

An optimum approach for fabrication of tapered hemispherical-end fiber for laser module packaging

Comprehensive measurements of the dependence of coupling efficiency and radius of curvature on taper angle in a tapered hemispherical-end fiber (THEF) for coupling between laser diodes and single-mode fibers are presented. The THEF was fabricated by etching the fiber end in a hydrofloride (HF) solution with a thin layer of oil floating on top of the HF, and then heating in a fusion splicer to form a hemispherical end. The results show that THEFs with larger taper angles fabricated by greater oil density exhibit a smaller radius of curvature, and hence a better coupling efficiency. The results of this investigation have led to an optimum approach for high-yield and high-volume fabrication of THEFs that is suitable for use in commercial laser diode modules for efficient coupling between laser diodes and single-mode fibers. The calculation of the effect of oil density in HF etching solution on taper angle based on a semiempirical model is in good agreement with the measured results.     

模拟集成电路模块版图的生成系统

介绍了模拟集成电路模块版图的开发系统.系统用高效的过程化版图描述语言构造模拟模块,编译产生与工艺及应用无关的模块版图生成器.系统的网络识别和模块内布线功能自动完成模块网络的完全连通,基于优选的电气特性驱动版图生成,提高设计可靠性.该系统已辅助设计出多个高性能集成运算放大器、模拟开关等芯片版图.