Impact of recess-etching-assisting resist-openings on the shapes ofgate grooves for short gate length InAlAs/InGaAs heterojunction FET's

When resist openings are employed to monitor the drain current of InAlAs/InGaAs-heterojunction-based FET's during wet-chemical gate recess, etching rates for InGaAs and InAlAs can be significantly modified by the exposure of the surface metal on the nonalloyed ohmic electrodes to citric-acid-based etchants. Surface metal of Ni enhances the recess etching rate to a degree that is much higher than that in its absence. With nonselective citric acid-based etchant, the presence of Pt surface metal, however, leads to a preferential etching of InGaAs over InAlAs. This behavior of selective etching is attributed to the excess oxidation of InAlAs induced by the high electrode potential of Pt via electrochemical effects. This investigation discloses that the selection of the surface metal that lies beneath the resist openings can be very important if gate recess grooves with desired shapes are to be fabricated     

The importance of electrochemistry-related etching in thegate-groove fabrication for InAlAs/InGaAs HFETs

For the first time, the surface metal on nonalloyed ohmic electrodes is found to significantly change the profiles of gate grooves, when resist openings are employed to monitor drain current during wet-chemical gate recess for sub-micron InAlAs/lnGaAs heterojunction field-effect transistors (HFETs). The surface metal of Ni enhances the etching rate in comparison with that in the absence of electrodes by a factor of 4 and 10, laterally and vertically, which is favorable to fabricate deep gate grooves with small side etching. The Pt surface metal, however, leads to preferential etching of InGaAs over InAlAs, which can be useful to realize large side etching. The existence of an electrochemistry-related etching component, which arises when the ohmic electrodes are present during recess etching, is considered to be responsible for these behaviors     

MOVPE grown InAlAs/InGaAs/InP MODFETs with very high f/sub T/

High-performance 0.15 mu m gate length modulation-doped field-effect transistors (MODFETs) have been fabricated on a lattice-matched InAlAs/InGaAs heterostructure grown by organic vapour phase epitaxy (MOVPE). Excellent 'kink-free' DC characteristics with extrinsic transconductance g/sub m/ of 1080 mS/mm at a drain current of 508 mA/mm have been achieved. A unity current-gain cutoff frequency f/sub T/ of 187 GHz at room temperature has been measured, which is the highest value reported for MOVPE-grown lattice-matched InAlAs/InGaAs MODFETs.<>     

Subthreshold current in MODFETs of tenth-micrometer gate

The subthreshold current of conventional GaAs/AlGaAs MODFETs and pseudomorphic InGaAs/AlGaAs MODFETs with the gate length down to 0.12 μm is investigated. The gate swing increases with the drain voltage and decreases with the gate length. It is attributed to charge injection from source to drain, limited by the channel potential barrier, which is a function of both the drain and the gate voltages. The pseudomorphic InGaAs/AlGaAs MODFETs show much better control than the conventional GaAs/AlGaAs MODFETs for the subthreshold current, especially with high drain biases. This shows that the pseudomorphic quantum-well structures can suppress the subthreshold current passing through the GaAs buffer region and reduce the undesirable short-channel effects     

Characteristics of InAlAs/InGaAs high electron mobility transistorsunder 1.3-μm laser illumination

The current-voltage (I-V) characteristics of InAlAs/InGaAs high electron mobility transistors (HEMTs) under illumination are investigated. The change of the drain current caused by the illumination can be explained by using the photovoltaic effect so that the excess holes photo-generated in the InGaAs channel layer accumulate at the source-electrode region and cause an effective decrease in the potential barrier for electrons between the source and the channel. The basic equations describing this phenomenon are derived on the basis of the experimental results. In addition, our experimental results are shown to support the barrier-induced hole pile-up model in which holes generated by the impact ionization accumulate in the InAlAs barrier on the source side and cause the kink effect In InAlAs/InGaAs HEMTs     

InGaAs/InAlAs HEMT with a strained InGaP Schottky contact layer

The authors have fabricated an InGaAs/InAlAs HEMT structure with a strained InGaP Schottky contact layer to achieve selective wet gate recess etching and to improve reliability for thermal stress. Strained In_0.75Ga_0.25P grown on InAlAs has been revealed to have sufficient Schottky barrier height for use as a gate contact. Threshold voltage standard deviation has been reduced to one fifth that of a conventional InGaAs/InAlAs HEMT, as a result of successful selective recess etching. After thermal treatment at 300°C for 5 min, the drain current and transconductance did not change, while those of the conventional HEMT decreased by more than 10%     

Planar-doped n-type InAlAs/InGaAs MODFETs on InP(311)A substratesby molecular beam epitaxy

N-type doping of silicon in InAlAs/InGaAs/InP modulation-doped field effect transistor (MODFET) structures grown by molecular beam epitaxy (MBE) for the (311)A orientation has been achieved by using the planar-doping technique. An electron mobility as high as 50000 cm² V-s with a sheet carrier concentration of 1.9×10¹²/cm² at 77 K is reported. MODFETs with 1.2-μm gate length exhibit an extrinsic transconductance of 400 mS/mm and a maximum drain current of 485 mA/mm. The results are comparable to those of MODFETs grown on (100) InP substrates. The results point to the possibility of making p-n multi layer structures with all-silicon doping     

200nm栅长In0.52Al0.48As/In0.6Ga0.4As MHEMTs器件

利用电子束光刻技术制备出200nm栅长GaAs基InAlAs/InGaAs MHEMT器件.Ti/Pt/Au蒸发作为栅极金属.同时为了减少栅寄生电容和寄生电阻,采用3层胶工艺,实现了T型栅.GaAs基MHEMT 器件获得了优越的直流和高频性能,跨导、饱和漏电流密度、域值电压、电流增益截止频率和最大振荡频率分别达到510mS/mm,605mA/mm,-1.8V,110GHz及72GHz,为进一步研究高性能GaAs基MHEMT器件奠定了基础.     

200nm栅长In0.52Al0.48As／In0.6Ga0.4As MHEMTs器件

利用电子束光刻技术制备出200nm栅长GaAs基InAIAs/InGaAs MHEMT器件.Ti/Pt/Au蒸发作为栅极金属.同时为了减少栅寄生电容和寄生电阻,采用3层胶工艺,实现了T 型栅. GaAs基MHEMT 器件获得了优越的直流和高频性能,跨导、饱和漏电流密度、域值电压、电流增益截止频率和最大振荡频率分别达到510mS/mm, 605mA/mm, -1.8V, 110GHz及 72GHz,为进一步研究高性能GaAs基MHEMT器件奠定了基础.     

Modulation-doped field-effect transistors with an 8-nmInGaAs/InAs/InGaAs quantum well

We show that the channel thickness of modulation-doped field-effect transistors (MODFETs) based on an InAlAs/InGaAs heterojunction can be reduced from 15 to 8 nm without any degradation of the main DC and RF figures of merits. Furthermore, short-channel effects, which are pronounced in sub-0.1-μm devices, can be effectively suppressed by this thin-channel design. The retainment of high performance and alleviation of short-channel effects are attributed to the excellent two-dimensional electron gas (2-DEG) confinement by the inserted InAs layer. The successful channel thinning opens up the possibility of employing high-quality thin-channel structures for MODFETs with gate lengths below 0.05 μm     

Experimental and theoretical investigation of the DC andhigh-frequency characteristics of the negative differential resistancein pseudomorphic AlGaAs/InGaAs/GaAs MODFET's

The authors investigated the negative differential resistance (NDR) in the I-V characteristics of pseudomorphic AlGaAs/InGaAs/GaAs modulation doped field-effect transistors (MODFETs) with gate lengths of 0.3 μm. They experimentally verified the existence of abrupt multiple NDR in both the input circuit and the output circuit. The NDR occurs over a short range of drain voltage (less than 200 mV) and gate voltage (less than 5 mV) for NDR induced by thermionic emission. The authors provide a general interpretation of the measured DC results based on tunneling real-space transfer (TRST) which occurs because of the formation of hybrid excited states across the InGaAs channel and AlGaAs donor layer. The existence of stable reflection is verified in both the input and output circuits with stable broadband frequency response in the output circuit to at least 49 GHz. These results show that NDR via TRST in pseudomorphic MODFETs can provide wideband frequency response not limited by the electron transit time from source to drain     

Drastic reduction of gate leakage in InAlAs/InGaAs HEMT's using apseudomorphic InAlAs hole barrier layer

Impact ionization in the channel of InAlAs/InGaAs HEMT's was shown to be a reason for excess gate leakage current. Hot electrons in the high field region of the channel under the gate generate electron-hole pairs. The generated holes can reach the gate (gate leakage) as well as the source, the electrons flow to the drain (kink effect). The number of holes reaching the gate strongly depends on the valence band discontinuity. In order to increase this valence band discontinuity a thin pseudomorphic InAlAs layer with high Al-content was inserted in the spacer of an InAlAs/InGaAs HEMT. The efficiency of this hole barrier was measured by photocurrent and DC measurements, while its influence on transport characteristics was measured by Hall and RF measurements. A reduction of gate leakage by a factor of 200 is demonstrated     

Selective photochemical dry etching of GaAs/AlGaAs and InGaAs/InAlAs heterostructures

Selective photochemical dry etching of GaAs layers on AlGaAs using HCl gas and InGaAs layers on InAlAs using CH/sub 3/Br gas is studied. A low pressure mercury lamp was used as the deep UV light source. A selectivity of more than 150 for GaAs over AlGaAs and more than 60 for InGaAs over InAlAs was obtained.<>     

Self-compensation of short-channel effects in sub-0.1-μmInAlAs/InGaAs MODFETs by electrochemical etching

We show that by making full use of the features of electrochemical etching in InAlAs/InGaAs heterostructures, deep gate grooves with small side etching can be fabricated. The most important advantage of this technology is that the vertical etching in the small gate openings will be remarkably enhanced by a self-organized process. Therefore the electrochemical etching provides a what we call “self-compensation” of the short channel effects. The effectiveness of this technology is evidenced by the excellent performance combined with the alleviation of the threshold-voltage shift and suppression of transconductance degradation in MODFET's with gate lengths below 0.1 μm     

Low frequency noise sources in InAlAs/InGaAs MODFETs

Detailed analysis of the 1/f low-frequency noise (LFN) in In/sub 0.52/Al/sub 0.48/As/InGaAs MODFET structures is performed, for low drain bias (below pinch-off voltage), in order to identify the physical origin and the location of the noise sources responsible for drain current fluctuations in the frequency range 0.1 Hz-10/sup 5/ Hz. Experimental data were analyzed with the support of a general modeling of the 1/f LFN induced by traps distributed within the different layers and interfaces which constitute the heterostructures. Comparative noise measurements are performed on a variety of structures with different barrier (InAIAs, InP) and different channel (InGaAs lattice matched to InP, strained InGaAs, InP) materials. It is concluded that the dominant low frequency noise sources of InAlAs/InGaAs MODFET transistors in the ON state are generated by deep traps distributed within the "bulk" InAlAs barrier and buffer layers. For reverse gate bias, the gate current appears to be the dominant contribution to the channel LFN, whereas both the gate current and the drain and source ohmic contacts are the dominant sources of noise when the device is biased strongly in the ON state. Heterojunction FET's on InP substrate with InP barrier and buffer layers show significantly lower LFN and appear to be more suitable for applications such as nonlinear circuits that have noise upconversion.     

Optimum design and fabrication of InAlAs/InGaAs HEMT's on GaAs withboth high breakdown voltage and high maximum frequency of oscillation

A simple model to describe the dependence of the breakdown voltage between gate and drain on width of the gate recess in an InAlAs/InGaAs high electron mobility transistor (HEMT) is presented. In this model, the depletion region laterally spreads to the drain region. It enables us to express the dependence of device parameters on the width of the gate recess. The model suggests that the breakdown voltage increases with the width of the gate recess and then saturates, which is experimentally confirmed. Calculations based on the model show that the maximum frequency of oscillation (f_max) also increases with the width of the gate-recess due to the reduction in both the drain conductance and the gate-to-drain capacitance, and then slightly decreases with the width due to the increase in the source resistance. We fabricated InAlAs/InGaAs HEMT's lattice-mismatched on GaAs substrates with optimum recess-width, and these exhibited both a high breakdown voltage of 14 V and a high f_max of 127 GHz at a gate length of 0.66 μm     

Highly uniform N-InAlAs/InGaAs HEMT's on a 3-in InP substrate usingphotochemical selective dry recess etching

Large-area photochemical selective dry etching has been developed for use in InGaAs/InAlAs heterojunction fabrication involving CH₃ Br gas and a low-pressure mercury lamp. The etch rate of the InGaAs layer was 17 nm/min and the etch ratio of InGaAs to InAlAs was around 25 to 1. The dry recess was performed for N-InAlAs/InGaAs HEMT's on a 3-in wafer using photochemical etching. The standard deviation of the threshold voltage across the wafer was 18 mV at a threshold voltage of -0.95 V, and the transconductance of 456 mS/mm was obtained for a 1.1-μm-long gate within a standard deviation of 14.9 mS/mm     

InGaAs（InAIAs）／InP和InP／InAIAs湿法选择腐蚀研究

介绍了两种选择腐蚀液对InGaAs（InAlAs）／InP和InP／InAlAs异质结构材料选择腐蚀的实验结果，重点介绍在InAlAs上面生长InP的湿法选择腐蚀，用HCl：H3PO4：CH3COOH系列腐蚀液，InP／InAlAs选择比大于300。InP／InAlAs湿法选择腐蚀的结果可以很好应用到OEIC芯片制作中，并取得了较好的器件及电路结果。     

InAlAs/InGaAs/InP MODFET's with uniform threshold voltage obtainedby selective wet gate recess

Excellent uniformity in the threshold voltage, transconductance, and current-gain cutoff frequency of InAlAs/InGaAs/InP MODFETs has been achieved using a selective wet gate recess process. An etch rate ratio of 25 was achieved for InGaAs over InAlAs using a 1:1 citric acid:H₂O₂ solution. By using this solution for gate recessing, the authors have achieved a threshold voltage standard deviation of 15 mV and a transconductance standard deviation of 15 mS/mm for devices across a quarter of a 2-in-diameter wafer. The average threshold voltage, transconductance, and current-gain cutoff frequency of 1.0-μm gate-length devices were -234 mV, 355 mS/mm, and 32 GHz, respectively     

Low-frequency noise properties of selectively dry etched InP HEMT's

The low-frequency noise of lattice-matched InAlAs/InGaAs/InP high electron mobility transistors (HEMT's) gate recess etched with a highly selective dry etching process and with conventional wet etching were studied at different gate and drain biases for the temperature range of 77-340 K. The measurements showed a significantly lower normalized drain current 1/f noise for the dry etched HEMT's under all bias conditions. No difference in the normalized gate current 1/f noise could be observed for the two device types. By varying the temperature, four electron traps could be identified in the drain current noise spectra for both dry and wet etched devices. No additional traps were introduced by the dry etching step. The concentration of the main trap in the Schottky layer is one order of magnitude lower for the dry etched HEMT's. No hydrogen passivation of the shallow donors was observed in these devices. We presume hydrogen passivation of the deep levels as the cause for the trap density reduction. The kink effect in the dry etched HEMT's was observed to be reduced significantly compared with wet etched devices which gives further evidence of trap passivation during dry etching. These results show that dry etched InP HEMT's have suitable characteristics for the fabrication of devices for noise sensitive applications