快速DCT修剪在DSP上的内存访问优化方法

在本论文中,我们提出一个新的内存访问优化方法以减少由权重因子(在DCT的快速修剪计算图中的余弦系数)和输入点而产生的内存访问量,实现在DSP上的快速DCT修剪.该方法通过两个步骤来减少内存访问量:1.减少权重因子的个数;2.将快速DCT修剪的计算流程图中两个阶段中的蝴蝶运算单元合并到一个阶段中,从而形成一个高效的蝴蝶运算单元.我们在TI TMSC320C64x DSP上应用该方法来实现修剪FCT.实验结果表明,与传统的实现方法相比,修剪FCT方法在DSP上可以平均减少40％的内存访问量,平均减少48.6％的时钟周期和平均节约32.6％的由存储加权因子导致的内存访问.     

二维DCT图像处理器的低功耗实现

本文提出了一种基于矩阵向量乘法器的低功耗二维DCT结构,该结构通过最大限度地共享矩阵向量乘法中的乘积因子降低二维DCT中的乘法计算量,实现低功耗计算.此外,该二维DCT设计支持对矩阵向量乘法器的计算精度控制,从而实现对二维DCT处理器的低功耗调整.FPGA硬件平台的实际验证结果表明,与传统的基于移位累加乘法器的二维DCT设计相比,本设计可以节省35%以上的功耗.     

离散余弦变换的改进的算术傅立叶变换算法

离散余弦变换(DCT)是数字图像处理等许多领域的重要数学工具.本文通过一种新的傅立叶分析技术——算术傅立叶变换(AFT)来计算DCT.本文对偶函数的AFT进行了改进.改进的AFT算法不但把AFT所需样本点数减少了一半,从而使所需加法计算量减少了一半,更重要的是它建立起AFT和DCT的直接联系,因而提供了适合用于计算DCT的AFT算法.本文推导了用改进的AFT计算DCT的算法并对算法进行了简要的分析.这种算法的乘法量仅为O(N),并且具有公式一致,结构简单,易于并行,适合VLSI设计等特点,为DCT的快速计算开辟了新的途径.     

二维DCT快速算法及FPGA实现

本文提出了一种二维OCT快速算法的FPGA实现结构,采用行列快速算法将二维DCT分解成两个一维DCT实现,其中一维DCT借鉴Loeffler DCT算法,采用并行的流水线结构,提高电路的数据吞吐率和运算速度,通过系数矩阵的简化和蝶形运算结构的等价减少乘法器的消耗,一维DCT核消耗16个乘法器.转置RAM采用8片双口RAM,一个时钟可以完成 8个数据读写.实验结果验证了二维DCT核设计的正确性,该电路结构消耗资源少,布线简单,功耗小,适合图像的实时处理.     

一种基于高度并行结构的二维DCT/IDCT处理器设计

本文介绍一种适用于MPEG-4视频简单层(Simple Profile Layer1-3)压缩编码的二维88 DCT/IDCT处理器设计,该处理器设计充分利用DCT与IDCT的相似性及算法对称性,用高度的并行结构来加快处理速度,采用一维DCT/IDCT单元复用的方式来实现二维DCT/IDCT运算和简化的乘法器设计,在满足处理速度和精度要求的基础上,利用较少的晶体管数目实现了一种高性能二维DCT/IDCT处理器。     

快速多极子-边棱元混合算法分析三维非均匀各向异性复杂目标的电磁散射

本文发展了一种能有效分析非均匀各向异性复杂目标的电磁散射特性的三维快速算法;该算法在切向矢量有限元、即边棱元的基础上,采用近年来发展起来的快速多极子算法加速问题的求解,大大降低了计算复杂度,并减小了计算内存.计算实例表明了该方法的有效性和可靠性.     

基于小波变换和DCT的字符图像特征抽取新方法

从特征矢量的不变性和抗噪性角度,提出了一种基于小波变换(WT)和离散余弦变换(DCT)的字符特征抽取新方法。利用圆周投影算法,把二维的字符图像转换为一维投影。基于WT和DCT的非线性变换,克服了因变形和噪声引起的一维投影的非线性变形失真。通过对识别不同大小、方向及噪声的字符仿真实验和不同特征抽取方法的对比实验,以及对工业标牌字符的识别,表明该特征抽取方法具有尺度和旋转不变性,有较好的抗噪声能力和很好的分类性能。     

基于NEDA算法的二维DCT硬件加速器的设计实现

应用二维DCT的图像压缩系统,DCT的运算量较大,为了突破该瓶颈,设计了基于NEDA算法的DCT硬件加速器,该设计方案采用移位相加代替乘法运算,并用RAM代替ROM,有效地节省了硬件资源.给出了Verilog仿真结果,结果表明该加速器可以在使用资源非常少的情况下,正确地实现二维DCT运算,适合于各种视频图像压缩方面的应用.     

MPEG4编码器二维DCT变换的FPGA实现及优化

本文提出了一种适用于MPEG4视频编码系统的二维DCT的FPGA设计方案，该方案具有实时、高精度、易于FPGA实现的特点。在设计中，分别对DCT的算法及实现方法进行了分析和选择；在此基础上，对系统的结构进行了优化，提出了一种不同于传统二维DCT系统的新结构。最后对IDCT单元的运算精度进行了验证。     

DCT,DHT与DFT脉动阵列实现

本文提出一种新型计算离散正交变换如DCT、DHT(DWT)和DFT的脉动阵列实现.脉动算法是基于Vetterli-Nussbaumer提出的FFCT和三角函数递归公式.文中绐出了两种基于特殊蝶形运算的处理单元和两种计算DCT,DHT(DWT)和DFT的脉动阵列实现.利用两种不同的DCT脉动阵列的特点,文中也给出了二维DCT脉动阵列实现,所有运算都在实数域中进行.由于这些计算具有高度的简便性、规则性、灵活性和一致性,它们的超大规模集成实现将是有效的.     

Unsupervised Segmentation of Stereoscopic Video Objects: Constrained Segmentation Fusion Versus Greedy Active Contours

In this paper, we present a novel memory access reduction scheme (MARS) for two-dimension fast cosine transform (2-D FCT). It targets programmable DSPs with high memory-access latency. It reduces the number of memory accesses by: 1) reducing the number of weighting factors and 2) combining butterflies in vector-radix 2-D FCT pruning diagram from two stages to one stage with an efficient structure. Hardware platform based on general purpose processor is used to verify the effectiveness of the proposed method for vector-radix 2-D FCT pruning implementation. Experimental results validate the benefits of the proposed method with reduced memory access, less clock cycle and fewer memory space compared with the conventional implementation.     

FPGA implementation of high-performance,resource-efficient Radix-16 CORDIC rotator based FFT algorithm

The fast Fourier transform (FFT) is an algorithm widely used to compute the discrete Fourier transform (DFT) in real-time digital signal processing. High-performance with fewer resources is highly desirable for any real-time application. Our proposed work presents the implementation of the radix-2 decimation-in-frequency (R2DIF) FFT algorithm based on the modified feed-forward double-path delay commutator (DDC) architecture on FPGA device. Need for a complex multiplier to carry out the multiplication of complex twiddle factors and large memory to store the twiddle factors are the main concerns for FFT implementation. Propose work aims to address these issues. In this work, a high-performance radix-16 COordinate Rotational DIgital Computer (CORDIC) algorithm based rotator is proposed to carry out the complex twiddle factor multiplication. Further, CORDIC needs only rotational angles to carry out complex multiplication, which reduces the need for large memory to store the twiddle factors. To compute the total rotation for n-bit precision, our proposed radix-16 CORDIC algorithm takes n/4 iteration as compared to n iteration of the radix-2 CORDIC algorithm. Our proposed architecture of the radix-2 decimation-in-frequency (R2DIF) algorithm is implemented on a Virtex−7 series FPGA. Further, the detailed comparison is presented between our proposed FFT implementation and other recently proposed FFT implementations. Experimental results suggest that proposed implementation has less latency and hardware utilization as compared to recently proposed implementations.     

OFDM调制中高速FFT处理器设计的新方法

在宽带OFDM系统的实现中,FFT处理器是一个关键部分。通过对传统分裂基结构的改进,提出了适用于OFDM系统的FFT处理器的新方案。在方案中采用流水方式保证系统的速度,在计算、通信和存储间取得平衡,使取数据、计算旋转因子、复乘、DFT等操作协调一致,避免了瓶颈的出现。并且与以往提出的FFT处理器的方案进行比较,证明这种新方案采用了较少的乘法器数目以及较少的存储单元,提高了器件利用率。     

相位量化DRFM性能分析

本文提出了一种数字射频存储器(DRFM)偏移相位量化方法,它是在传统相位量化方法的基础上通过增加一个相位偏移而得到.通过傅立叶分析,得到了其谐波寄生信号性能计算公式,结果表明,其性能与传统相位量化方法相同.其优点是,由于其良好的对称性,更适合于硬件电路实现.在此基础上,提出了一种用D/A变换器代替加权求和网络实现相位量化DRFM信号重构的新方法,解决了多位相位量化DRFM工程实现的困难.采用计算机仿真方法对由于D/A变换幅度量化引起的性能变化进行了分析,表明当D/A变换器位数接近于相位量化位数时就可以获得满意的效果.     

A new two-dimensional fast cosine transform algorithm

The discrete cosine transform (2-D DCT) is based on a one-dimensional fast cosine transform (1-D FCT) algorithm. Instead of computing the 2-D transform using the row-column method, the 1-D algorithm is extended by means of the vector-radix approach. Derivation based on both the sequence splitting and Kronecker matrix product method are discussed. The sequence splitting approach has the advantage that all the underlying operations are shown clearly, while the matrix product representations are more compact and readily generalized to higher dimensions. The bit reversal operations are placed before the recursive additions so that the recursive operations can be performed in a very regular manner. This greatly simplifies the indexing problem in the software implementation of the algorithms. The vector-radix algorithm saves 25% multiplications as compared with the row-column method     

语音识别的自适应束剪枝方法

在语音识别的应用中,如何提高识别的效率性是一个重要的方向。尤其在大词汇表的识别中,庞大的搜索空间带来相应的计算代价,而传统剪枝方法在减少计算量的同时牺牲了识别率。为此引入自适应控制理论,自动调整束宽限定搜索空间在预定的规模。在此基础上,又提出了利用基线系统的平均激活模型音子模型实例作为自适应系统动态参考值的方法,实现启发式的束宽调节。应用此方法的解码器在不损失识别率情况下,计算时间和搜索空间比采用传统剪枝算法下降了55％和71％,显著地提高了解码器的效率。     

利用主客观集成赋权法的多目标威胁评估

在利用逼近于理想解的排序法(Technique for Order Preference by Similarity to an Ideal Solution,TOPSIS)进行多目标威胁评估时,针对如何获取合理的目标威胁评估因子的权重比,提出了一种主客观集成赋权方法。该方法首先利用主观赋权法和客观赋权法获取两组权重值;然后,通过构造多目标规划模型,将两组权重值进行综合处理,得到更合理的权重值。仿真结果表明,相较于主观赋权法和客观赋权法,所提方法计算出的威胁评估因子的权重值,在用TOPSIS法计算目标威胁评估时,能够得到更加合理、有效的评估结果。     

FrFT-OFDM系统的低复杂度峰均功率比抑制技术研究

针对基于分数阶Fourier变换的OFDM系统(简称FrFT-OFDM系统)的高峰均功率比(PAPR)问题,该文提出一种低复杂度的峰均比抑制算法。通过对随机相位序列采用周期延拓至FrFT-OFDM符号长度,相位因子加权后与子载波调制前的数据相乘的方式,实现对高峰均比的有效抑制。该算法只需要一次逆离散分数阶Fourier变换(IDFrFT),所有备选信号直接通过时域chirp圆周移位的加权和得到。仿真结果表明,当备选信号个数相同时,该算法与选择映射(SeLecting Mapping, SLM)算法的PAPR抑制性能相当,比部分传输序列(Partial Transmit Sequence, PTS)算法具有更好的PAPR抑制性能,同时,该算法较SLM和PTS算法的运算量降低。     

Radiance map construction based on spatial and intensity correlations between LE and SE images for HDR imaging

HDR image was developed for the reproduction of real scenes with an acquisition of large dynamic range. In general, HDR image consists of several different exposure images according to the exposure value of a digital camera. Before the construction of a single HDR image, each input image is calibrated using CRF to convert its image data to scene radiance. In order find CRF, conventional methods require special apparatus and reference targets, or several exposure images. This paper proposes a new HDR blending algorithm that uses only dual-exposure images. The proposed algorithm is based on the least squares method, and includes spatial and intensity weighting functions. Each weighting function is used to reduce error points and improve CRF computation accuracy. In addition, a constraint is added to correct white balance in the brightness level. The rendering results show that the proposed algorithm is superior to the conventional algorithm.     

Mixed-Radix Algorithm for the Computation of Forward and Inverse MDCTs

The modified discrete cosine transform (MDCT) and inverse MDCT (IMDCT) are two of the most computationally intensive operations in MPEG audio coding standards. A new mixed-radix algorithm for efficiently computing the MDCT/IMDCT is presented. The proposed mixed-radix MDCT algorithm is composed of two recursive algorithms. The first algorithm, called the radix-2 decimation-in-frequency algorithm, is obtained by decomposing an N-point MDCT into two MDCTs with the length N/2. The second algorithm, called the radix-3 decimation-in-time algorithm, is obtained by decomposing an N -point MDCT into three MDCTs with the length N/3. Since the proposed MDCT algorithm is also expressed in the form of a simple sparse matrix factorization, the corresponding IMDCT algorithm can be easily derived by simply transposing the matrix factorization. Comparison of the proposed algorithm with some existing ones shows that our proposed algorithm is more suitable for parallel implementation and particularly suitable for the layer III of MPEG-1 and MPEG-2 audio encoding and decoding. Moreover, the proposed algorithm can be easily extended to the multidimensional case by using the vector-radix method.