Accumulation-layer electron mobility in n-channel 4H-SiC MOSFETs

Accumulation-layer electron mobility in n-channel depletion-mode metal oxide semiconductor field effect transistors (MOSFETs) fabricated in 4H-SiC was investigated using Hall-measurements. The accumulation-layer mobility showed a smooth transition from the bulk value (~350 cm²/V-s) in the depletion regime into accumulation (~200 cm²/V-s). In contrast, the field-effect mobility, extracted from the transconductance, was found to be much lower (~27 cm²/V-s), due to the trapping of the field-induced carriers by interface states. Though the current in depletion/accumulation-mode MOSFETs can be high due to the contribution of bulk conduction resulting in low on-resistance, carrier trapping will cause the transconductance to be low in the accumulation regime     

Annealing effects of carbon in n-channel LDD MOSFETs

The degradation pattern of lightly doped drain (LDD) structure MOSFETs with carbon doping under various steps has been studied. For a carbon-doped LDD device with first- and second-level metal and passivation layer but without any final anneal, the results show that a significant reduction in the shifts of the threshold voltage of MOSFETs with time can be achieved. The authors demonstrate that threshold voltage degradation has been reduced for carbon-doped devices and that a final anneal does not improve the hot-electron degradation of these devices. These results imply the existence of neutral electron traps in the gate oxides of MOSFETs     

Consistent model for the hot-carrier degradation in n-channel andp-channel MOSFETs

A model is derived using the charge-pumping technique for the evaluation of the interface characteristics, in combination with the behavior of the drain and the substrate currents after degradation. For n-channel transistors the degradation is mainly caused by the generation of interface traps. Only in the region of hole injection (V_g≈V_t) is the degradation dominated by the trapped holes, which mask the effect of the generated interface traps. The degradation of p-channel transistors, although completely different at first sight, occurs by the same mechanisms. For this case, the degradation is caused by trapped negative charge, which masks the influence of the interface traps. The latter are nevertheless generated in comparable amounts as in n-channel transistors. Based on these insights, improved procedures for accelerated-lifetime experiments are proposed for both channel types. Finally, the peculiar degradation behavior of n-channel transistors under alternating injection conditions is discussed and fully explained based on the static stress degradation model     

Analysis of drain breakdown voltage in SOI n-channel MOSFETs

The reduction of drain breakdown voltage in SOI nMOSFETs with floating substrate is related to the presence of a parasitic n-p-n bipolar structure, the base of which is the floating body of the device. reduction of breakdown voltage (compared to the case where a body contact is used) is shown to be dependent on both channel length and minority carrier lifetime in the SOI material. Conversely, it is shown that mere measurement of MOSFET breakdown voltages can be used to extract the minority carrier lifetime in the SOI material.<>     

Annealing characteristics of hot carrier induced damage in n-channel MOSFETs

The recovery process of hot carrier induced degraded device parameters in n-channel MOSFETs has been analysed by both isothermal and isochronal annealing. A wide distribution of activation energies of hot carrier induced damage, with a peak at around 0·9eV is observed. It can be seen that isochronal annealing has advantages over isothermal annealing in recovering the degraded device characteristics in comparatively less time. Bias annealing of the device reveals that initially the annealing of trapped oxide charges increases the interface state density, after reaching the peak value interface states anneal as a logarithmic function of time. The energy distribution of hot carrier induced interface states is similar to radiation induced interface states after a few hours of annealing at room temperature.     

Dependence of MOSFET noise parameters in n-channel MOSFETs on oxide thickness

The expression for the $\text{1}\text{f}$ noise resistance R_n of a MOSFET at low drain bias contains the factor I_d²/[g_m(V_g-V_T)]², which is unity in the elementary MOSFET theory but can be considerably larger than unity in practical units. The number fluctuation model characterizes R_n further by the parameter [N_T(E_f)]_eff/? and the mobility flucuation model introduces Hooge's parameter α. Measurements show that [N_T(E_f)]_eff/? varies as t^?2, α as t^?1 and the mobility μ varies as t, where t is the oxide thickness. The dependence of R_n upon T is chiefly determined by the t-dependence of the factor I_d²/[g_m(V_g-V_T)]². Since the drain noise spectrum S_Id(f) is practically independent of t, it is a very useful parameter for characterizing the noise. All data are now mutually consistent.     

Comparison between the effects of positive noncatastrophic HBM ESDstress in n-channel and p-channel power MOSFETs

The effect of noncatastrophic positive human body model (HBM) electrostatic discharge (ESD) stress on n-channel power MOSFETs is radically different from that on p-channel MOSFETs. In n-channel transistors, the stress causes negative shifts of the current-voltage characteristics indicative of positive charge trapping in the gate oxide. In p-channel transistors, the stress increases the drain-to-source leakage current, probably due to localized avalanche electron injection from the p-doped drain     

用电子能量分布研究He-Ne激光器中的能量转换

本文用电子能量分布对Druyvesteyn分布的偏离曲线(f-f_D)直接研究了电子-原子间的非弹性碰撞过程,并对He-Ne激光五条谱线跃迁的能量转换过程进行了讨论。     

Monte Carlo simulation of p- and n-channel GOI MOSFETs by solving the quantum Boltzmann equation

The scaling characteristics of both n- and p-channel Ge-on-insulator (GOI) as well as silicon-on-insulator (SOI) MOSFETs with channel length ranging from 20-130 nm are studied by a two-dimensional self-consistent fullband Monte Carlo device simulator. The transistors' intrinsic performance and subthreshold characteristics are investigated for various channel lengths and Ge layer thicknesses. Our results indicate that both n- and p-channel GOI MOSFETs can be scaled down to the nanoregion, due to the nonstationary transport, especially for the p-channel device. More than 10% performance improvement for nMOS and about 20% for pMOS can be achieved in GOI even when channel length is scaled down to 20 nm, as compared to SOI devices. However, the GOI devices suffer from more severe short channel effect and have larger p-n junction leakage current as compared to SOI counterpart. For high-performance CMOS applications, GOI devices are feasible if the junction leakage can be reduced by optimizing the device structure.     

Experimental verification of analytical model for high impedance surfaces

A simple yet accurate analytical model for a high impedance surface comprising an array of capacitive patches over a grounded dielectric slab is experimentally verified. The results are compared for the oblique incidence reflection phase obtained with the analytical model and commercial simulation software with the results of free-space measurements. It is shown that the analytical and simulation results are in very good agreement with the experimental results. To the authors? knowledge, this is the first time the results of the analytical model in question have been experimentally verified.     

Experimental aspects of hot electron distribution functions

A review is presented on the experimental efforts to obtain hot electron distribution functions in bulk materials in high d.c. electric fields. Three optical methods will be discussed in detail: (i) inter- and intraband absorption measurements, (ii) emission due to radiative transitions between band states, and band- and impurity states, (iii) inelastic light scattering experiments. A distinction is made between methods which yield the energy distribution functions and those which give information on the anisotropic distribution of hot carriers in the momentum space. The latter experiments involve a determination of the electric field induced dichroism in absorption or emission and the dependence of the scattering cross section on scattering geometry in inelastic light scattering experiments. The influence of the nonequilibrium phonon distribution on the interpretation of the experimental results is discussed, too. In addition, current work on energy distribution functions of hot carriers in quantizing magnetic fields as obtained from absorption or emission of infrared radiation due to transitions of carriers between Landau states or magnetic field split impurity states will be presented.     

A field-effect electron mobility model for SiC MOSFETs including high density of traps at the interface

Besides its favorable physical properties, high performant MOSFETs (metal-oxide-semiconductor field-effect transistors) fabrication in silicon carbide (SiC) remains an open issue due to their low channel mobility values. The effect of charge trapping and the scattering at interface states have been invoked as the main reasons for mobility reduction in SiC thermal oxidized MOS gated devices. In this paper, we propose a compact electron mobility model based on the well-established Lombardi mobility model to reproduce the mobility degradation commonly observed in these SiC devices. Using 2D electrical simulations along with the proposed model and taking into account interface traps Coulomb scattering, the experimental field-effect mobility of 4H-SiC MOSFET devices has been fitted with a good agreement.     

Experimental characterization and modeling of electron saturationvelocity in MOSFETs inversion layer from 90 to 350 K

From saturation transconductance of devices of 0.25-μm CMOS technology, the saturation velocity of electrons (ν_sat) in the inversion layer from 90 to 350 K has been determined. The extracted ν_sat at 300 K was 7.86×10⁶ cm/s, which is significantly lower than that of bulk silicon (ν_sat-blk) and has a much weaker temperature dependence. The ratio ν_sat-blk /ν_sat is 1.27 at 300 K, and is increased to 1.68 at 90 K. Consistent values of ν_sat have been determined for devices of three vastly different MOS technologies, demonstrating the technology independence of ν_sat. The results are useful for developing and testing theoretical carrier transport models, and are of practical importance in estimating the ultimate speed performance of surface MOSFETs. An empirical model for ν_sat as a function of temperature has also been derived for application in predictive device simulation     

Spatial uniformity of interface trap distribution in MOSFETs

The uniformity of the spatial distribution of (fast) interface traps N_it in small MOS devices was determined using charge pumping on MOSFETs with varying lengths and widths. The number of traps was found to be linearly proportional to both length and width as expected for a macroscopically uniform distribution. No evidence was found for an anomalous N_it distribution at the edges of the source/drain regions; however, the data suggest that there is a higher density of traps along the edges of LOCOS (local oxidation of silicon) field oxides     

高能电子束纳米曝光系统的研制

微电子产业的飞速发展要求半导体器件的最小特征尺寸越来越小。传统的光学光刻技术由于受到光的衍射等限制，开始面临挑战。电子束曝光技术具有高分辨、长焦深、无需掩模等优点，成为下一代光刻技术中极具发展潜力的一种。     

An empirical model for the Leff dependence ofhot-carrier lifetimes of n-channel MOSFETs

An empirical model that describes the dependence of hot-carrier lifetime on the effective channel length of an n-channel MOSFET, allowing the estimation of the lifetimes of transistors of a given length based on data from a limited number of channel lengths, is presented. The model takes into account the localization of hot-carrier induced damage and shows that the size of the damaged region relative to the total length of the transistor is important in determining the effect of hot-carrier-damage-induced transistor characteristics. The results are integrated into two commonly used equations for hot-carrier lifetimes of MOSFETs of a given channel length under DC operation. The model is experimentally verified for MOSFETs of effective channel lengths between 0.45 and 2.7 μm     

强场物理中超热电子能量沉积特性的实验研究

报道了在100 Tw超短脉冲掺钛蓝宝石激光装置上,完成的飞秒激光-固体靶相互作用中超热电子的能量沉积实验,获得了靶后激光传播方向超热电子的能谱、产额、注量和总能量.结果表明,超热电子的注量和总能量随靶厚的增加而减少,超热电子约80%的能量主要沉积在靶内的前10μm,分析其原因是由于静电场的影响所致.     

Universality of electron mobility curves in MOSFETs: a Monte Carlostudy

The universal behavior of electron mobility when plotted versus the effective field is physically studied. Due to charged centers in the silicon bulk, the oxide, and the interface, Coulomb scattering is shown to be responsible for the deviation of mobility curves. Silicon bulk-impurities have a double effect: (a) Coulomb scattering due to the charge of these impurities themselves, and (b) reduction of screening caused by the loss of inversion charge when the depletion charge is increased. The electric-field region in which mobility curves behave universally regardless of bulk-impurity concentration, substrate bias, or interface charge has been determined for state-of-the-art MOSFETs. Finally, this study shows that electron mobility must be a function of the inversion and the depletion charges rather than a simple function of the effective field     

Enhancement of electron mobility in ultrathin-body silicon-on-insulator MOSFETs with uniaxial strain

The electrostatics of fully depleted MOS devices such as double- and triple-gate MOSFETs are highly dependent on the thickness of the silicon-on-insulator film in the channel. Scaling these devices to their ultimate limits makes it necessary to scale the channel thickness into a regime where quantum confinement effects negatively impact the electrical transport properties of the film. We use the application of uniaxial mechanical strain to investigate electron mobility in films where mobility has been degraded by quantum size effects. We find that these films exhibit more mobility enhancement from strain than do thick films, indicating that the strain increases mobility conventionally and mitigates the mechanism that causes mobility degradation in thin films.