Electrostatics of coaxial Schottky-barrier nanotube field-effect transistors

Analytical and numerical methods are used to solve Poisson's equation for carbon nanotube field-effect transistors (FETs) with a cylindrical surrounding gate and Schottky-barrier contacts to the source and drain. The effect on the nanotube potential profile of varying the work functions of all the electrodes, and the thickness and permittivity of the gate dielectric, is investigated. From these results, the general trends to be expected in the above-threshold drain current-voltage characteristics of Schottky-barrier nanotube FETs are predicted. The unusual possibility of simultaneous electron and hole contributions to the drain current is revealed. The subthreshold characteristics are computed from a solution to Laplace's equation, and the subthreshold slope is found to depend on gate dielectric thickness in a different manner from that in other FETs.     

A current-voltage model for Schottky-barrier graphene-based transistors

A low complexity computational model of the current-voltage characteristics for graphene nanoribbon (GNR) field effect transistors (FET), being able to simulate a hundred points in a few seconds using a personal computer, is presented. For quantum capacitance controlled devices, self-consistent calculations of the electrostatic potential can be skipped. Instead, an analytical closed-form electrostatic potential from Laplace's equation yields accurate results compared with that obtained by the self-consistent non-equilibrium Green's functions (NEGF) method. The model includes both tunneling current through the Schottky barrier (SB) at the contact interfaces and thermionic current above the barrier, properly capturing the effect of arbitrary physical and electrical parameters.     

Organic semiconductors for organic field-effect transistors

Abstract

The advantages of organic field-effect transistors (OFETs), such as low cost, flexibility and large-area fabrication, have recently attracted much attention due to their electronic applications. Practical transistors require high mobility, large on/off ratio, low threshold voltage and high stability. Development of new organic semiconductors is key to achieving these parameters. Recently, organic semiconductors have been synthesized showing comparable mobilities to amorphous-silicon-based FETs. These materials make OFETs more attractive and their applications have been attempted. New organic semiconductors resulting in high-performance FET devices are described here and the relationship between transistor characteristics and chemical structure is discussed.     

Low-resistance ohmic contacts to SiC nanowires and their applications to field-effect transistors

We report on the electrical characterization of two ohmic contacts (Ti/Au and Ni/Au) to unintentionally doped silicon carbide nanowires (SiCNWs) using the modified transmission line model (TLM) method. Our results indicate that subsequently deposited Ni/Au ohmic contacts on SiCNWs had ～40 times lower specific contact resistances (SCRs) of 5.9 × 10(-6) ± 8.8 × 10(-6)?Ω?cm(2) compared to the values of Ti/Au ohmic contacts (2.6 × 10(-4) ± 3.4 × 10(-4)?Ω?cm(2)). We also conducted a comparison study of the electrical characteristics of top-gated SiCNW field-effect transistors (FETs) with two different ohmic contacts as used for ohmic contact studies. The electrical transport measurements on the SiCNW FET with Ni/Au ohmic contacts show much lower resistance contacts to SiC NWs and better FET performances than those for Ti/Au ohmic contact-based FETs.     

A bright future for organic field-effect transistors

Field-effect transistors are emerging as useful device structures for efficient light generation from a variety of materials, including inorganic semiconductors, carbon nanotubes and organic thin films. In particular, organic light-emitting field-effect transistors are a new class of electro-optical devices that could provide a novel architecture to address open questions concerning charge-carrier recombination and light emission in organic materials. These devices have potential applications in optical communication systems, advanced display technology, solid-state lighting and electrically pumped organic lasers. Here, recent advances and future prospects of light-emitting field-effect transistors are explored, with particular emphasis on organic semiconductors and the role played by the material properties, device features and the active layer structure in determining the device performances.     

Observation of diameter dependent carrier distribution in nanowire-based transistors

The successful implementation of nanowire (NW) based field-effect transistors (FET) critically depends on quantitative information about the carrier distribution inside such devices. Therefore, we have developed a method based on high-vacuum scanning spreading resistance microscopy (HV-SSRM) which allows two-dimensional (2D) quantitative carrier profiling of fully integrated silicon NW-based tunnel-FETs (TFETs) with 2 nm spatial resolution. The key elements of our characterization procedure are optimized NW cleaving and polishing steps, the use of in-house fabricated ultra-sharp diamond tips, measurements in high vacuum and a dedicated quantification procedure accounting for the Schottky-like tip-sample contact affected by surface states. In the case of the implanted TFET source regions we find a strong NW diameter dependence of conformality, junction abruptness and gate overlap, quantitatively in agreement with process simulations. In contrast, the arsenic doped drain regions reveal an unexpected NW diameter dependent dopant deactivation. The observed lower drain doping for smaller diameters is reflected in the device characteristics by lower TFET off-currents, as measured experimentally and confirmed by device simulations.     

Optimization of single-gate carbon-nanotube field-effect transistors

The performance of Schottky-barrier carbon-nanotube field-effect transistors (CNTFETs) critically depends on the device geometry. Asymmetric gate contacts, the drain and source contact thickness, and inhomogenous dielectrics above and below the nanotube influence the device operation. An optimizer has been used to extract geometries with steep subthreshold slope and high I/sub on//I/sub off/ ratio. It is found that the best performance improvements can be achieved using asymmetric gates centered above the source contact, where the optimum position and length of the gate contact varies with the oxide thickness. The main advantages of geometries with asymmetric gate contacts are the increased I/sub on//I/sub off/ ratio and the fact that the gate voltage required to attain minimum drain current is shifted toward zero, whereas symmetric geometries require V/sub g/=V/sub d//2. Our results suggest that the subthreshold slope of single-gate CNTFETs scales linearly with the gate-oxide thickness and can be reduced by a factor of two reaching a value below 100 mV/dec for devices with oxide thicknesses smaller than 5 nm by geometry optimization.     

Patterning technology for solution-processed organic crystal field-effect transistors

Organic field-effect transistors (OFETs) are fundamental building blocks for various state-of-the-art electronic devices. Solution-processed organic crystals are appreciable materials for these applications because they facilitate large-scale, low-cost fabrication of devices with high performance. Patterning organic crystal transistors into well-defined geometric features is necessary to develop these crystals into practical semiconductors. This review provides an update on recentdevelopment in patterning technology for solution-processed organic crystals and their applications in field-effect transistors. Typical demonstrations are discussed and examined. In particular, our latest research progress on the spin-coating technique from mixture solutions is presented as a promising method to efficiently produce large organic semiconducting crystals on various substrates for high-performance OFETs. This solution-based process also has other excellent advantages, such as phase separation for self-assembled interfaces via one-step spin-coating, self-flattening of rough interfaces, and in situ purification that eliminates the impurity influences. Furthermore, recommendations for future perspectives are presented, and key issues for further development are discussed.     

Facile fabrication of all-SWNT field-effect transistors

Field-effect transistors (FETs) have been fabricated using as-grown single-walled carbon nanotubes (SWNTs) for the channel as well as both source and drain electrodes. The underlying Si substrate was employed as the back-gate electrode. Fabrication consisted of patterned catalyst deposition by surface modification followed by dip-coating and synthesis of SWNTs by alcohol chemical vapor deposition (CVD). The electrodes and channel were grown simultaneously in one CVD process. The resulting FETs exhibited excellent performance, with an I _ON/I _OFF ratio of 10⁶ and a maximum ON-state current (I _ON) exceeding 13 μA. The large I _ON is attributed to SWNT bundles connecting the SWNT channel with the SWNT electrodes. Bundling creates a large contact area, which results in a small contact resistance despite the presence of Schottky barriers at metallic-semiconducting interfaces. The approach described here demonstrates a significant step toward the realization of metal-free electronics.      

Development of a nanowire-based test bed device for molecular electronics applications

In this paper, we present a novel test bed system which we believe addresses several key challenges in molecular electronics, i.e., the need to fabricate metal-molecule-metal junctions that have the potential to facilitate single-molecule measurements, are easily characterized, and are reproducible. The system is based upon template-electrodeposited metal nanowires incorporating a self-assembled monolayer spacer that are fabricated into electrical devices using direct-write photolithography. Removal of the spacer leaves a nanometer-sized, characterizable gap to which nanoparticles or a test molecule of interest can be attached postfabrication. Here we report the fabrication procedure together with results showing the application of these devices to the study of the i/V characteristics of Au nanoparticles at cryogenic temperatures. These data demonstrate that the performance of these easily produced, inexpensive, novel devices compares favorably to that of devices made using preexisting methods.     

Polarity control of carrier injection for nanowire feedback field-effect transistors

Nano Research - We present polarity control of the carrier injection for a feedback field-effect transistor (FBFET) with a selectively thinned p+-i-n+ Si nanowire (SiNW) channel and two separate...     

Application of field-effect transistors for measuring very small direct currents

Conclusions A study of the properties of field-effect transistors and their application in circuits shows that the quality of electrometric amplifiers with such transistors approaches that of amplifiers with electrometric tubes and capacitive choppers, and in certain instances exceeds it. At the same time this new type of electrometric amplifiers has the following advantages as compared with existing types: it is relatively simple and stable over a wide temperature range, it has a low noise level, low power consumption, a small size and it is suitable for microminiaturization, and a reduction of time required to prepare for operation after switching in. The above properties indicate the advisability of using various types of field-effect transducers in electrometric devices.     

Frequency response of top-gated carbon nanotube field-effect transistors

The ac performance of carbon nanotube field-effect transistors (CNFETs) has been characterized using two approaches involving: 1) time- and 2) frequency-domain measurements. A high input impedance measurement system was used to demonstrate time-domain switching of CNFETs at frequencies up to 100 kHz. The low level of signal crosstalk in CNFETs fabricated on quartz substrates enabled frequency-domain measurements of the ac response of CNFETs in the megahertz range, over five orders of magnitude higher in frequency than previously reported ac measurements of CNFET devices.     

Electrical characteristics of Si-nanoparticle/Si-nanowire-based field-effect transistors

In this study, Si-nanoparticle(NP)/Si-nanowire(NW)-based field-effect transistors (FETs) with a top-gate geometry were fabricated and characterized. In these FETs, Si NPs were embedded as localized trap sites in Al₂O₃ top-gate layers coated on Si NW channels. Drain current versus drain voltage (I _DS−V _DS) and drain current versus gate voltage (I _DS−V _GS) were measured for the Si NP/Si NW-based FETs to investigate their electrical and memory characteristics. The Si NW channels were depleted at V _GS = 9 V, indicating that the devices functioned as p-type depletion-mode FETs. The top-gate Si NW-based FETs decorated with Si NPs show counterclockwise hysteresis loops in the I _DS−V _GS curves, revealing their significant charge storage effect.     

Charge transport physics of conjugated polymer field-effect transistors

Field‐effect transistors based on conjugated polymers are being developed for large‐area electronic applications on flexible substrates, but they also provide a very useful tool to probe the charge transport physics of these complex materials. In this review we discuss recent progress in polymer semiconductor materials, which have brought the performance and mobility of polymer devices to levels comparable to that of small‐molecule organic semiconductors. These new materials have also enabled deeper insight into the charge transport physics of high‐mobility polymer semiconductors gained from experiments with high charge carrier concentration and better molecular‐scale understanding of the electronic structure at the semiconductor/dielectric interface.     

Polyelectrolyte multilayer electrostatic gating of graphene field-effect transistors

We apply polyelectrolyte multilayer films by consecutive alternate adsorption of positively charged polyallylamine hydrochloride and negatively charged sodium polystyrene sulfonate to the surface of graphene field effect transistors. Oscillations in the Dirac voltage shift with alternating positive and negative layers clearly demonstrate the electrostatic gating effect in this simple model system. A simple electrostatic model accounts well for the sign and magnitude of the Dirac voltage shift. Using this system, we are able to create p-type or n-type graphene at will. This model serves as the basis for understanding the mechanism of charged polymer sensing using graphene devices, a potentially technologically important application of graphene in areas such as DNA sequencing, biomarker assays for cancer detection, and other protein sensing applications.     

Efficient solvent-assisted post-treatment for molecular rearrangement of sprayed polymer field-effect transistors

Polymer-based field-effect transistors are fabricated using the gas-assisted spray technique, and their performance is considerably improved when a solvent-assisted post-treatment method, solvent sprayed overlayer (SSO), is used. The SSO method is a unique treatment that can facilitate chain packing to increase crystallinity within the sprayed polymer layers, which inherently have a kinetically trapped amorphous chain morphology with lack of crystallinity due to rapid solvent evaporation. The device performance was drastically improved after SSO relative to conventional post-treatment, thermal annealing (TA). This occurred because SSO can rearrange the polymer chains into a dominantly edge-on crystal orientation, which is preferential for charge transport, whereas TA increases the crystallinity without rearrangement of the crystal orientation resulting in a complex of edge-on and face-on. The development of edge-on crystal domains after SSO within the active layers was responsible for the significant improvement in performance. The SSO is a simple and effective post-treatment method that validates the use of spray process and holds promise for use in other high-throughput processes for OFETs fabrication.