Noninverted buck–boost converters with dual delta sigma modulators

This paper presents a new control circuit to create a high‐performance noninverted buck–boost converter with dual ΔΣ modulations. Experimental load regulation, corresponding to load current steps of ±0.5 A, is within 45 mVpp, and the efficiency without a synchronized rectifier is 83% at an input voltage of 2.5 V and a load current of 0.8 A. © 2011 Wiley Periodicals, Inc. Electr Eng Jpn, 178(2): 21–28, 2012; Published online in Wiley Online Library ( wileyonlinelibrary.com ). DOI 10.1002/eej.21115     

Stability of adaptive delta modulators with forgetting factor and constant inputs

Motivated by applications to feedback control over communication networks where the actuation and feedback signals are transmitted over communication channels, we study the stability of Adaptive Delta Modulators (ADM) when the coded signal is a constant. The importance of such a setting arises because a common control task is to track a dc input. It is known that a standard accumulator‐based ADM has the following highly undesirable characteristic: virtually all combinations of the algorithm parameters result in 4‐cycles, and the avoidance of 4‐cycles requires a nongeneric initialization. Further, the steady state oscillations that generically arise in the course of these cycles can have amplitudes that can be arbitrarily close to the initial error. Consequently, we study the use of a forgetting factor in the ADM loop, and provide a detailed stability analysis and design guidelines. Intuitively, adding a forgetting factor to the classical ADM algorithm prevents 4‐periodic cycles from occurring by damping them. In particular, we show that for suitably chosen design parameters, the ADM with forgetting factor can track a constant signal arbitrarily closely under mild assumptions. We provide simulations to demonstrate how much better the modified algorithm performs relative to the original ADM algorithm in a remote control setting. Copyright © 2011 John Wiley & Sons, Ltd.     

An oscillatory noise‐shaped quantizer for time‐based continuous‐time sigma‐delta modulators

In this paper, a new type of an oscillatory noise‐shaped quantizer (NSQ) for time‐based continuous‐time sigma‐delta modulators is presented. The proposed NSQ is composed of an oscillatory voltage‐to‐time converter and a polyphase sampler. Using Tustin's transformation method and through the approximation of the comparator gain, a linearized model of the NSQ is introduced. This way, a novel realization of the first‐ and second‐order NSQ is presented. Its implementation is based on fully passive continuous‐time filters without needing any amplifier or power consuming element. The ploy‐phase sampler inside the NSQ is based on the combination of a time‐to‐digital and a digital‐to‐time converter. The layout of the proposed NSQ is provided in Taiwan Semiconductor Manufacturing Company 0.18 μm complementary metal‐oxide‐semiconductor 1P6M technology. The verification of the proposed NSQ is done via investigating both the system level and postlayout simulation results. Leveraging the proposed NSQ in an Lth‐order time‐based continuous‐time sigma‐delta modulator enhances the noise‐shaping order up to L + 2, confirming its superior effectiveness. This makes it possible to design high performance and wideband continuous‐time SDMs with low power consumption and relaxed design complexity.