Improved consonant–vowel recognition for low bit‐rate coded speech

In this paper, we proposed a method for improving the recognition performance of 145 prominent consonant–vowel (CV) units in Indian languages for low bit‐rate coded speech. Proposed CV recognition method is carried out in two levels to reduce the similarity among a large number of CV classes. In the first level, vowel category of CV unit will be recognized, and in the second level, consonant category will be recognized. At each level of the proposed method, complementary evidences from support vector machine and hidden Markov models are combined to enhance the recognition performance. Effectiveness of the proposed two‐level CV recognition method is demonstrated by performing the recognition of isolated CV units and CV units collected from the Telugu broadcast news database. In this work, vowel onset point (VOP) is used as an anchor point for extracting accurate features from the CV unit. Therefore, a method is proposed for accurate detection of VOP in clean and coded speech. The proposed VOP detection method is based on the spectral energy in 500–2500 Hz frequency band of the speech segments present in the glottal closure region. Speech coders considered in this work are GSM full rate (ETSI 06.10), CELP (FS‐1016), and MELP (TI 2.4 kbps). Significant improvement in CV recognition performance is achieved using the proposed two‐level method compared with the existing methods under both clean and coded conditions. Copyright © 2011 John Wiley & Sons, Ltd.     

Telephones you can talk to

A speaker-dependent speech recognizer for connected sequences of digits that uses a time-delayed neural network (TDNN) is described. The advantage of using a TDNN is that, at any given instant, acoustic features of the speech signal for a past interval of time up to the present can be observed simultaneously. Thus, once the system is trained, no detection of boundaries between words is necessary for the recognition. Instead of parsing the speech signal into words, or even further into phonemes, and then recognizing each word or phoneme by some process, the TDNN analyzes the signal in a continuous manner, word recognition units being activated as their corresponding words are completed in the input speech signal. A system of this type will most likely be incorporated in the very near future into a voice-activated telephone     

Inverse halftoning using super‐resolution image processing

This paper focuses on the inverse halftoning problem, that is, the problem of reconstructing continuous‐tone images from halftone images of white and black pixels. In general, the problem does not have a unique solution, since halftoning is a many‐to‐one map from continuous‐tone images to binary ones. To this problem, we provide a simple and useful inverse halftoning method, composed of two steps. The first step is to generate several grayscale images from the original halftone image and low‐pass filters. The next step is to reconstruct a continuous‐tone image from the multiple grayscale images by using super‐resolution image processing. This method allows us to obtain good continuous‐tone images which are comparable to the results of the existing methods. The validity of the proposed method is demonstrated by several experiments. © 2011 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Lecture speech recognition using discrete‐mixture HMMs

Most of the state‐of‐the‐art speech recognition systems use continuous‐mixture hidden Markov models (CMHMMs) as acoustic models. On the other hand, it is well known that discrete hidden Markov model (DHMM) systems show poor performance because they are affected by quantization distortion. In this paper, we present an efficient acoustic modeling based on discrete distribution for large‐vocabulary continuous speech recognition (LVCSR). In our previous work, we proposed the maximum a posteriori (MAP) estimation of discrete‐mixture hidden Markov model (DMHMM) parameters and showed that the DMHMM system performed better in noisy conditions than the conventional CMHMM system. However, we conducted the recognition experiments on a read/speech task in which the vocabulary size was only 5k. In addition, the DMHMM was not effective in clean condition in that work. In this paper, we have developed a DMHMM‐based LVCSR system and evaluated the system on a more difficult task under clean condition. In Japan, a large‐scale spontaneous speech database ‘Corpus of Spontaneous Japanese’ has been used as the common evaluation database for spontaneous speech and we used it for our experiments. From the results, it was seen that the DMHMM system showed almost the same performance as the CMHMM system. Moreover, performance improvement could be achieved by a histogram equalization method. Copyright © 2010 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

An explicit form of all‐pole filter function with decreasing envelope of the summed sensitivity function

In this paper, the all‐pole lowpass filter function with the decreasing envelope of the summed sensitivity in the pass‐band is considered. The filter transfer function with maximal number of the ripples of the summed sensitivity in the pass‐band is obtained in the explicit form, by the application of the Chebyshev polynomials of the first kind. The slope of the decrease of the summed sensitivity envelope can be controlled by a free‐parameter α. We derived a new approximation function in order to achieve small summed sensitivity in the filter pass‐band. Consequently, the sensitivity analysis was carried out and a comparison of the summed sensitivity and the group delay with respect to the classic all‐pole filters was given. The approach presented in this paper is based on that the minimization of the summed sensitivity is important for the reduction of the deviation of the magnitude response caused by temperature changes of the continuous‐time active filters implemented into the analog front end or as programmable chips. Copyright © 2010 John Wiley & Sons, Ltd.     

Resource optimization for emulation of behavioral models of mixed signal circuits on FPGA: a case study of DC–DC buck converter

This paper presents a semi‐automated word‐length optimization framework to reduce field‐programmable gate array (FPGA) resource utilization for FPGA‐based pre‐silicon test emulation of analog and mixed signal circuits while achieving the desired accuracy and overcoming long optimization time. Although high‐level behavioral models exist for modeling analog and mixed signal circuits, these comprise many complex differential equations which cannot be realized implicitly using Boolean logic (which is the basic functional block of an FPGA) on an FPGA. So, a more convenient way is explored to map analog circuits into digital domain by converting them into fixed‐point architectures because of its advantage of manipulating data with lower word‐length. To address the loss of accuracy due to finite word‐length effects and limited reconfigurable resources, word‐lengths are optimized under the constraint of given performance metrics. The proposed technique built in MATLAB/Simulink environment with Xilinx System Generator support is illustrated with the help of a case study of a peak‐current‐mode‐controlled buck‐type switching converter implemented on Xilinx Virtex™‐5 FPGA. To illustrate the applicability of this environment for pre‐silicon test development, well‐accepted fault models are emulated with the help of non‐ideal model of a buck converter. The emulation results are seen to be close to that of a post‐fabricated power converter in the presence of faults. Experimental results show that FPGA resource utilization can be reduced significantly while achieving the desired performance accuracy under the constraint of multiple error metrics. Copyright © 2017 John Wiley & Sons, Ltd.     

基于LPC距离和变窗长的端点检测

基于LPC距离的端点检测首先会对信号进行分帧处理,然后根据LPC距离设置阈值依次判断每一帧是否为语音的端点。而在对信号进行分帧时会有以下问题:如果采用较大的窗长,则总帧数会变少,但是这样端点检测的误差也会增加,尤其是对于语音起点的检测。而如果帧长选取过小,则计算量增加,识别速度也会增加。针对这个问题,将变窗长思想和基于LPC距离端点检测算法结合起来,提出了一种改进的端点检测算法。该方法在分帧时不采用统一的窗长,而是在静音段采用大窗长快速向过渡段逼近,进入过渡段后采用小窗长慢慢寻找语音信号的起点,其他阶段则采用常规窗长。研究表明,所提出的改进的端点检测方法检测性能要优于其他两种端点检测方法。     

Carrier‐envelope phase‐stabilized chirped‐pulse amplification system

We demonstrated a carrier‐envelope phase (CEP) stabilized chirped‐pulse amplifier system. This amplifier system is composed of grating based pulse‐stretcher and compressor, a regenerative amplifier and a multi‐pass amplifier. We employed a new pulse‐pick‐up method to select CEP stabilized seed pulses. This pulse selection method is different from established practice which is based on pulse train timing, but is based on CEP of seed pulse. We measured amplitude‐to‐phase noise conversion coefficient of microstructure fiber and evaluated the additional out‐of‐loop error of carrier‐envelope offset (CEO) control. We also investigated the effect of beam pointing of the measured fringe shift in self‐referencing spectral interference method. © 2006 Wiley Periodicals, Inc. Electr Eng Jpn, 157(3): 35–42, 2006; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20334 Copyright © 2006 Wiley Periodicals, Inc.     

Design of a contention‐free parallel double‐flow MAP decoder

Parallel processing and double‐flow methods, which are used to increase the speed of turbo‐code decoding, cause memory contentions. Although memory contentions due to parallel processing can be resolved by adopting the quadratic polynomial permutation (QPP) interleaver, the double‐flow method still causes memory contentions because of its read/write sequences from both ends of the input packets. Thus, we propose a modified architecture to resolve memory contentions for the double‐flow method to fit the QPP interleaver. In our experiment, the proposed method has a shorter decoding time and smaller hardware size compared the conventional method. A bit‐accurate simulation was performed, and hardware implementation with field‐programmable gate arrays (FPGAs) led to a high throughput of 80 Mbps. © 2014 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Cellular wave computer algorithms with spatial semantic embedding for handwritten text recognition

The recognition of cursive handwritten texts is a complex, in some cases unsolvable, task. One problem is that in most cases it is difficult or impossible to identify each letter, even if the words are separated. In our new method, the identification of letters is not needed due to the extensive and iterative use of semantic and morphological information of a given language. We are using a spatial feature code, generated by a cellular nonlinear network (CNN) based cellular wave computer algorithm, and combine it with the linguistic properties of the given language. Most general‐purpose handwriting recognition systems lack the ability to integrate linguistic background knowledge because they use it only for post‐processing recognition results. The high‐level a priori background knowledge is, however, crucial in human reading and similarly it can boost recognition rates dramatically in case of recognition systems. In our new system we do not treat the visual source as the only input: geometric and linguistic information are given equal importance. On the geometric side we use word‐level holistic feature detection without letter segmentation by analogic CNN algorithms designed for cellular wave computers (IEEE Trans. Circuits Syst. 1993; 40 :163–173; Cellular Neural Networks and Visual Computing, Foundations and Applications. Cambridge University Press: Cambridge, U.K., New York, 2002). The linguistic side is based on a morpho‐syntactic linguistic system (Proceedings of COLING‐2002, vol. II, Taipei, Taiwan, 2002; 1263–1267). A novel shape coding method is used to interface them, and their interaction is enhanced via an inverse filtering technique based on features that are global or of a low confidence value. A statistical context selection method is also applied to further reduce the output word lists. Copyright © 2008 John Wiley & Sons, Ltd.     

Robust ℋ︁∞ filtering for uncertain differential linear repetitive processes

The unique characteristic of a repetitive process is a series of sweeps or passes through a set of dynamics defined over a finite duration known as the pass length. At the end of each pass, the process is reset and the next time through the output, or pass profile, produced on the previous pass acts as a forcing function on, and hence contributes to, the dynamics of the new pass profile. They are hence a class of systems where a variable must be expressed in terms of two directions of information propagation (from pass‐to‐pass and along a pass, respectively) where the dynamics over the finite pass length are described by a matrix linear differential equation and from pass to pass by a discrete updating structure. This means that filtering/estimation theory/algorithms for, in particular, 2D discrete linear systems is not applicable. In this paper, we solve a general robust filtering problem with a view towards use in many applications where such an action will be required. Copyright © 2007 John Wiley & Sons, Ltd.     

Realization of a multiport gyrator using current mirror circuits

A current‐mode signal processing circuit is quite attractive for low supply voltage operation and high‐frequency application. A current‐mode continuous‐time filter consists of simple bipolar current mirrors and capacitors, and are quite suitable for monolithic integration. In this paper, we propose a design for a multiport gyrator using current mirror circuits. Using the multiport gyrator and capacitors, we can simulate passive LC filters. The tuning of the filter frequency can be achieved by adjusting the current of a single dc current course. As examples, third‐ and fifth‐order low‐pass filters are designed for frequencies of 20 to 80 MHz, and SPICE simulation results are shown to demonstrate the effectiveness of the proposed method. © 2002 Wiley Periodicals, Inc. Electr Eng Jpn, 139(4): 41–47, 2002; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.1167     

基于元音MFCC的说话人识别系统研究

说话人识别从本质上看是从语音信息中提取说话人特征,并通过一定的方式进行模式识别的过程.辨别说话人的方法很多,本文认为先从语音中提出元音,再通过计算元音的MFCC(美尔频标倒谱系数)特征参数,并与DTW(动态时间规整)结合进行多人多单词试验,实验证明这种识别方式能提高识别率5%左右--从原字平均识别率为83%提高到取元音后平均识别率为88%.     

A forward‐only recursion algorithm for MAP decoding of linear block codes

The evolution of digital mobile communications along with the increase of integrated circuit complexity has resulted in frequent use of error control coding to protect information against transmission errors. Soft decision decoding offers better error performance compared to hard decision decoding but on the expense of decoding complexity. The maximum a posteriori (MAP) decoder is a decoding algorithm which processes soft information and aims at minimizing bit error probability. In this paper, a matrix approach is presented which analytically describes MAP decoding of linear block codes in an original domain and a corresponding spectral domain. The trellis‐based decoding approach belongs to the class of forward‐only recursion algorithms. It is applicable to high rate block codes with a moderate number of parity bits and allows a simple implementation in the spectral domain in terms of storage requirements and computational complexity. Especially, the required storage space can be significantly reduced compared to conventional BCJR‐based decoding algorithms. Copyright © 2002 John Wiley & Sons, Ltd.     

Data‐driven bounded‐error fault detection

In this paper, a new data‐driven fault‐detection method is proposed. This method is based on a new nonparametric system identification approach, which constitutes the principal contribution to this work. The fault‐detection method is a parametric model‐free approach that can be applied to nonlinear systems that work at various operating points. Not only can the fault‐detection process be applied to the steady state of each operating point, but it can also be applied to the transient state resulting from a change in the operating point. In order to detect faults, the proposed method uses an interval predictor based on bounded‐error techniques. The utilization of techniques based on bounded error enables system uncertainties to be included in an explicit way. This in turn leads to the possibility of obtaining interval predictions of the behaviour of the system, which include information on the reliability of the prediction itself. In order to show the effectiveness of the fault‐detection method, two examples are presented: in the form of a simulated process (counter‐flow shell‐and‐tube heat‐exchanger system) and an example of a real application (two‐tanks system). A comparison with two fault‐detection methods has also been included. Copyright © 2013 John Wiley & Sons, Ltd.     

Target sound extraction utilizing similarity between signals as index for learning of linear filter

In this paper, we propose a novel learning method of two‐channel linear filter for a target sound extraction in a non‐stationary noisy environment using a two‐channel microphone array. The method is based on a correlation coefficient between received sounds of two microphones. The cue signal, which has a correlation with a variation of S/N of the received sounds, is generated using the correlation coefficient and is applied to the learning. By several computer simulation results, a superior performance of the proposed method even at the consonant section of the speech signal is presented in comparison with the previously proposed method. © 2006 Wiley Periodicals, Inc. Electr Eng Jpn, 155(3): 45–52, 2006; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20141     

A novel decoding scheme based on recalculation for double binary convolutional turbo code

To decrease the storage complexity of a double binary convolutional turbo code (DB‐CTC) decoder, a novel decoding scheme is proposed in this paper. Different from the conventional decoding scheme, only a part of the state metrics is stored in the last‐in first‐out (LIFO) state metrics cache (SMC). Based on an improved maximum a posteriori probability (MAP) algorithm, we present a method to recalculate the unstored state metrics at the corresponding decoding time slot, and discuss in detail the procedures of the recalculation are discussed. Because of the compare–select–recalculate processing operations, compared to the classical decoding scheme, the proposed decoding scheme reduces the storage complexity of SMC and the amount of memory accesses by approximately 40% while limiting involved computational cost. Moreover, simulation results show that the proposed scheme achieves good decoding performance, which is close to that of the well‐known Log‐MAP algorithm. © 2013 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

A novel compact piecewise‐linear representation

A new compact MAX representation for 2‐D continuous piecewise‐linear (PWL) functions is developed in this paper. The representation is promising since it can be easily generalized into higher dimensions. We also establish the explicit functional form of basis function and demonstrate that the proposed basis function is the elementary ‘building block’ from which a fully general 2‐D PWL function can be constructed. In addition, we reveal the relationship of basis function with minimal degenerate intersection and Hinging Hyperplane, which shows that the MAX model can unify Chua's canonical expression, Li's representation, lattice PWL function and Bremann's Hinging Finding Algorithm into one common theoretical framework. Copyright © 2005 John Wiley & Sons, Ltd.     

Secure data processing with massive‐parallel SIMD matrix for embedded SoC in digital‐convergence mobile devices

This paper presents secure data processing with a massive‐parallel single‐instruction multiple‐data (SIMD) matrix for embedded system‐on‐chip (SoC) in digital‐convergence mobile devices. Recent mobile devices are required to use private‐information‐secure technology, such as cipher processing, to prevent the leakage of personal information. However, this adds to the device's required specifications, especially cipher implementation for fast processing, power consumption, low hardware cost, adaptability, and end‐user's operation for maintaining the safety condition. To satisfy these security‐related requirements, we propose the interleaved‐bitslice processing method, which combines two processing concepts (bitslice processing and interleaved processing), for novel parallel block cipher processing with five confidentiality modes on mobile processors. Furthermore, we adopt a massive‐parallel SIMD matrix processor (MX‐1) for interleaved‐bitslice processing to verify the effectiveness of parallel block cipher implementation. As the implementation target from the Federal Information Processing Standardization‐approved block ciphers, a data encryption standard (DES), triple‐DES, and Advanced Encryption Standard (AES) algorithms are selected. For the AES algorithm, which is mainly studied in this paper, the MX‐1 implementation has up to 93% fewer clock cycles per byte than other conventional mobile processors. Additionally, the MX‐1 results are almost constant for all confidentiality modes. The practical‐use energy efficiency of parallel block cipher processing with the evaluation board for MX‐1 was found to be about 4.8 times higher than that of a BeagleBoard‐xM, which is a single‐board computer and uses the ARM Cortex‐A8 mobile processor. Furthermore, to improve the operation of a single‐bit logical function, we propose the development of a multi‐bit logical library for interleaved‐bitslice cipher processing with MX‐1. Thus, the number of clock cycles is the smallest among those reported in other related‐studies. Consequently, interleaved‐bitslice block cipher processing with five confidentiality modes on MX‐1 is effective for the implementation of parallel block cipher processing for several digital‐convergence mobile devices. © 2016 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

长度折半的测试资源编码方法

编码方法通过压缩原始测试数据达到减少测试数据量的目的,是解决集成电路测试过程中测试数据量快速增长的有效方法之一。提出一种新的长度折半的测试数据编码方法,该方法首先对测试数据同时按0游程和1游程进行划分,然后对划分进行长度折半,编码。该方法既减少了编码的游程数量,又减少了编码的游程长度,可以在不增加代码长度的情况下增加能编码的游程长度。理论分析证明该方法具有极高的压缩效率,同时该方法解压结构简单,且独立于测试数据。实验结果表明:该方法平均压缩率达到65.13%。因此该方法具有很高的性价比,具有一定的应用价值。