$Ka$-Band Low-Loss and High-Isolation Switch Design in 0.13-$mu{hbox {m}}$ CMOS

This paper presents designs and measurements of Ka-band single-pole single-throw (SPST) and single-pole double-throw (SPDT) 0.13-CMOS switches. Designs based on series and shunt switches on low and high substrate resistance networks are presented. It is found that the shunt switch and the series switch with a high substrate resistance network have a lower insertion loss than a standard designs. The shunt SPST switch shows an insertion loss of 1.0 dB and an isolation of 26 dB at >35 GHz. The series SPDT switch with a high substrate resistance network shows excellent performance with 2.2-dB insertion loss and isolation at 35 GHz, and this is achieved using two parallel resonant networks. The series-shunt SPDT switch using deep n-well nMOS transistors for a high substrate resistance network results in an insertion loss and isolation of 2.6 and 27 dB, respectively, at 35 GHz. For series switches, the input 1-dB compression point (1P₁) can be significantly increased to with the use of a high substrate resistance design. In contrast, of shunt switches is limited by the self-biasing effect to 12 dBm independent of the substrate resistance network. The paper shows that, with good design, several 0.13- CMOS designs can be used for state-of-the-art switches at 26-40 GHz.     

A 0.8-dB insertion-loss, 17.4-dBm power-handling, 5-GHz transmit/receive switch with DETs in a 0.18-/spl mu/m CMOS process

An optimized single-pole double-throw (SPDT) transmit/receive (T/R) switch has been fabricated using depletion-layer-extended transistors (DETs) in a 0.18 /spl mu/m CMOS process. The switch features the highest performance to date of any switch using a CMOS process, of a 0.8 dB insertion-loss, 23 dB isolation and 17.4 dBm power-handling capability at 5 GHz. The low insertion-loss has been achieved with the effects of junction capacitance decrease and substrate resistance increase in the DET, the adoption of low-loss shielded-pads, and several layout optimizations. The high power-handling capability is owing to the combined effect of the adoption of the source/drain dc biasing scheme and the high substrate resistance in the DET.     

1.5μm InP/InGaAs MQW-LD驱动电路的设计

讨论了由4个InP/InGaAs HBT构成的OEIC光发射机驱动电路的设计。研究结果表明.由最佳性能的HBT构成的驱动电路,其性能不一定就是最佳的,驱动电路的性能与激光器的串联电阻有很大关系。本文对激光器的串联电阻为9Ω的情况,从几何参数优化设计一驱动电路,其调制带宽可达3.4GHz,脉码凋制时。开关时间约为100ps。用它驱动一多量子阱激光器,脉码调制时,光信号响应开头时间约为288ps。     

Guaranteed frame rate: a better service for TCP/IP in ATM networks

Guaranteed frame rate, approved by the ATM Forum, is expected to become an important service category to efficiently support TCP/IP traffic in ATM networks. We first describe the GFR traffic contract in detail. We then present different types of switch implementations that have been proposed to support GFR. We analyze the performance of three of these switch implementations by simulations in two different network environments. These simulations show that the scheduler-based implementations provide a much better performance than the simple switch implementation. However, we also show that coupling an active packet discard mechanism to a scheduler-based switch implementation does not produce a performance gain when many TCP connections are multiplexed inside one ATM VC     

168-Gb/s all-optical wavelength conversion with asymmetric-Mach-Zehnder-type switch

Error-free all-optical wavelength conversion at 168 Gb/s, which is the highest repetition rate ever reported, has been achieved by using a symmetric-Mach-Zehnder (SMZ)-type switch. Low-power-penalty 84-Gb/s operation is also demonstrated. The push-pull switching mechanism of the SMZ switch enables such ultrafast operation based on cross-phase modulation associated with the carrier depletion in a semiconductor optical amplifier. The configuration of the delayed-interference signal-wavelength converter, which is a simplified variant of the SMZ switch, is used in this experiment     

A very low operation current InGaAsP/InP total internal reflectionoptical switch using p/n/p/n current blocking layers

A very low operation current (20 mA) has been achieved for the first time with an InGaAsP/InP total-internal-reflection optical switch. The optical switch is fabricated on an n⁺-InP substrate using p/n/p/n current blocking layers. This switch has a large effective contact area and is a self-aligned structure. This is a promising result for making optical integrated circuits     

一种采用厚膜混合工艺的10位高速D/A转换器

介绍了一种采用厚膜混合集成工艺制作的倒R-2R电阻网络结构的高速10位D/A转换器电路.重点分析了二极管电流开关对输出电流建立时间的影响,提出了一种改进型二极管电流开关结构,减少了二极管电流开关中电荷泄放引起的过冲,使电流建立时间大大减小,样品电路测试典型值为25 ns.     

A low-power inverted ladder D/a converter

Interpolating, dual resistor ladder digital-to-analog converters (DACs) typically use the fine, least significant bit (LSB) ladder floating upon the static most significant bit (MSB) ladder. The usage of the LSB ladder incurs a penalty in dynamic performance due to the added output resistance and switch matrix parasitic capacitance. Current biasing of the LSB ladder addresses this issue by employing active circuitry. We propose an inverted ladder DAC, where an MSB ladder slides upon two static LSB ladders. While using no active components this scheme achieves lower output resistance and parasitic capacitance for a given power budget. We present a 0.35-/spl mu/m, 3.3-V implementation consuming 22-/spl mu/A current with output resistance of 40 k/spl Omega/ and effective parasitic capacitance of 650 fF.     

Feedback-based flow control of B-ISDN/ATM networks

We consider a system comprising of a single bottleneck switch/node that is fed by N independent Markov-modulated fluid sources. There is a fixed propagation delay incurred by the traffic between these sources and the switch. We assume that the switch sends periodic feedback in the form of a single congestion indicator bit. This feedback also incurs a fixed propagation delay in reaching the sources. Upon reaching the sources (or the access controllers associated with the sources), this congestion indicator bit is used to choose between two rates for the excess traffic, high or low, possibly depending on the state of that source. The switch employs a threshold mechanism based on its buffer level to discard excess traffic. We show that the stationary distribution of this system satisfies a set of first-order linear differential equations along with a set of split boundary conditions. We obtain an explicit solution to these using spectral decomposition. To this end we investigate the related eigenvalue problem. Based on these results we investigate the role of delayed feedback vis-a-vis various time-constants and traffic parameters associated with the system. In particular, we identify conditions under which the feedback scheme offers significant improvement over the open-loop scheme     

An intelligent BiCMOS/DMOS quad 1-A high-side switch

A fully protected quad high-side DMOS switch has been realized using a BiCMOS/DMOS process. A bipolar multiplier cell calculates and limits instantaneous power dissipated by each 0.8-Ω DMOS power switch to 13 W. The integrated circuit shuts down to protect itself if a safe temperature or operating voltage is exceeded. A thermal warning is provided when the junction temperature rises to within 20°C of the shutdown temperature such that an orderly system turn-off occurs. A serial output data pin reports status information including channel on/off, open and shorted load faults, warning and shutdown temperatures, and an overvoltage condition. The circuit withstands a supply voltage of 60 V and operates from 6 to 32 V. The IC can be permanently connected to the power while drawing no DC current in the standby mode. The device fits into a 20-pin dual-in-line package having the die-attach paddle and the center four pins of the lead frame being a continuous strip of metal providing a low thermal resistance path from which to extract heat from the output switches     

Characteristics of a new BBOS with an AlGaAs-/spl delta/(n/sup +/)-GaAs-InAlGaP collector structure

Two-terminal switching performances are observed in a new AlGaAs-GaAs-InAlGaP npn bulk-barrier optoelectronic switch (BBOS) with an AlGaAs-/spl delta/(n/sup +/)-GaAs-InAlGaP collector structure. The device shows that the switching action takes place from a low-current state to a high-current state through a region of negative differential resistance (NDR). The transition from either state to the other may be induced by an appropriate optical or electrical input. It is seen that the effect of illumination increases the switching voltage V/sub s/, holding voltage V/sub H/, and holding current I/sub H/, and decreases the switching current I/sub S/, which is quite different from other results reported. In addition, it possesses obvious NDR even up to 160/spl deg/C. This high-temperature performance provides the studied device with potential high-temperature applications.     

3/spl times/3 all-fiber routing switch

An all-fiber acoustooptic switch has been constructed from a 3/spl times/3 null fused coupler. The maximum drive power required is 4 mW, the switching time is 100 /spl mu/s and the insertion loss is less than 0.5 dB and has a cross talk of 20 dB. The switch shares the advantages of an earlier 2/spl times/2 switch but with more fiber ports, and should permit the design of compound routing arrays with fewer switching elements per channel.     

A 10-Gb/s (1.25 Gb/s×8)4×2 0.25-μm CMOS/SIMOX ATMswitch based on scalable distributed arbitration

This paper presents the design and implementation of a scalable asynchronous transfer mode switch. We fabricated a 10-Gb/s 4×2 switch large-scale integration (LSI) that uses a new distributed contention control technique that allows the switch LSI to be expanded. The developed contention control is executed in a distributed manner at each switch LSI, and the contention control time does not depend on the number of connected switch LSI's. To increase the LSI throughput and reduce the power consumption, we used 0.25-μm CMOS/SIMOX (separation by implanted oxygen) technology, which enables us to make 221 pseudo-emitter-coupled-logic I/O pins with 1.25-Gb/s throughput. In addition, power consumption of 7 W is achieved by operating the CMOS/SIMOX gates at -2.0 V. This consumption is 36% less than that of bulk CMOS gates (11 W) at the same speed at -2.5 V. Using these switch LSI's, an 8×8 switching multichip module with 80-Gb/s throughput was fabricated with a compact size     

Investigation of Characteristics of Electrostatically Actuated MEMS Switch with an Active Contact Breaking Mechanism

The electrostatically actuated MEMS switch with resistive contact is presented. The movable electrode is a beam suspended on its torsion hinges. The contact material is platinum. The switch has an active breaking mechanism making it possible to protect it against stiction and provide a low actuation voltage. The measuring technique for the operating characteristic in the “hot” mode under a low direct current is described. The pull-in voltage and the breaking voltage, the switching time, and the dependence of the contact resistance on the number of actuation cycles are measured. The wear of contact surfaces is investigated. The operation of the switch in a bistable mode is demonstrated, in which the closed condition is maintained without applying the actuation voltage and the state transition occurs due to the active contact breaking mechanism.     

Ultrafast (200-fs switching, 1.5-Tb/s demultiplexing) andhigh-repetition (10 GHz) operations of a polarization-discriminatingsymmetric Mach-Zehnder all-optical switch

We demonstrate 200-fs switching and 1.5-Tb/s demultiplexing with a polarization-discriminating, symmetric Mach-Zehnder (PD-SMZ) all-optical switch. This switch is based on a highly efficient but slowly relaxing band-filling effect resonantly excited in a passive InGaAsP bulk waveguide. By using a mechanism that cancels out the effect of the slow relaxation, ultrafast switching is realized. The applicability of this mechanism to optical demultiplexing of well over 1 Tb/s is experimentally demonstrated for the first time. High-repetition operation at 10 GHz with the same nonlinearity used for the present ultrafast switching is also verified     

BCB-bridged distributed wideband SPST switch using 0.25-/spl mu/m In/sub 0.5/Al/sub 0.5/As--In/sub 0.5/Ga/sub 0.5/As metamorphic HEMTs

In/sub 0.5/Al/sub 0.5/As--In/sub 0.5/Ga/sub 0.5/As metamorphic high-electron mobility transistor (mHEMT) dc-30 GHz distributed single-pole-single through (SPST) switches were designed and fabricated using the low-/spl kappa/ benzocyclobutene (BCB) bridged technology. The current gain cutoff frequency, and the electron transit time of In/sub 0.5/Al/sub 0.5/As--In/sub 0.5/Ga/sub 0.5/As mHEMTs have been investigated. By analyzing the extrinsic total delay time, the effective velocity of electrons can be estimated, and the average velocity is 2.3/spl times/10/sup 7/cm/s. The dc-30 GHz distributed wideband SPST switch exhibits an insertion loss of less than 5.5 dB, and an isolation larger than 30 dB, which is the first demonstration of the high-isolation of InAlAs-InGaAs mHEMTs monolithic switch. As to the power performance, this switch can handle the power up to 12 dBm at 2.4 GHz. After over 250 h of 85-85 (temperature =85/spl deg/C, humidity =85%) environmental evaluation, this BCB passivated and bridged microwave and monolithic integrated circuit switch demonstrates reliable RF characteristics without any significant performance change, which proves that this process using the low-/spl kappa/ BCB layer is attractive for millimeter-wave circuit applications.     

New tri-state switch (TSS) using AlGaAs/GaAs/InGaAs double heterostructure

A new AlGaAs/GaAs/InGaAs heteroconfinement tri-state switch (TSS) prepared by metal organic chemical vapor deposition has been fabricated and demonstrated. This TSS exhibits the interesting multiple negative differential resistance (MNDR) characteristics. The NDR behavior is caused by a p ⁺ n junction and sequential two-stage barrier-lowering and potential-redistribution effect that resulted from the electron confinement at AlGaAs/GaAs/InGaAs heterointerface and lnGaAs quantum well, respectively.     

Si/SiGe digital optoelectronic switch

The physical parameters and functional characteristics of a Si/SiGe digital optoelectronic switch are reported. The device is found to have bistable electrical states: a high-impedance (40 kΩ) OFF state connected to a low-impedance (100 Ω) ON state by a regime of negative differential resistance. The switching voltage and holding voltage are measured to be 2.6 and 1.3 V, respectively, and the switching current and holding current are measured to be 500 μA and 1 mA, respectively. These DC characteristics are found to be similar to those measured in double heterostructure optoelectronic switching devices manifested in the AlGaAs/GaAs materials system. The DC characteristics of this Si/SiGe digital optoelectronic switch are also found to be sensitive to optical input and temperature     

A Fully Integrated Ultra-Low Insertion Loss T/R Switch for 802.11b/g/n Application in 90 nm CMOS Process

A 30 dBm ultra-low insertion loss CMOS transmit-receive switch fully integrated with an 802.11b/g/n transceiver front-end is demonstrated. The switch achieves an insertion loss of 0.4 dB in transmit mode and 0.1 dB in receive mode. The entire receiver chain from antenna to baseband output achieves a measured noise figure of 3.6 dB at 2.4 GHz. The switch has a P_1dB greater than 30 dBm by employing a substrate isolation technique without using deep n-well technology. The switch employs a 1.2 V supply and occupies 0.02 mm² of die area.     

Three-level LLC series resonant DC/DC converter

Paper presents a three-level soft switching LLC series resonant dc/dc converter. Zero-voltage switching (ZVS) is achieved for each main switch without any auxiliary circuit. Voltage stress of each main switch is half of input voltage. Zero-current-switching (ZCS) is achieved for rectifier diodes. Wide input/output range can be achieved under low frequency range because of two-stage resonance. Only one magnetic component is required in this converter. Efficiency is higher in high line input, so this converter is a preferable candidate for power products with the requirement of hold up time. For design convenience, relationship between dc gain and switching frequency, load resistance is deduced. Its open load characteristic and short load characteristic are exposed to provide theory basis for no load operation and over current protection. Design consideration of four dead times is presented to assure that voltage stress for main switches is within half of input voltage and ZVS for each main switch is achieved. Finally the principle of operation and the characteristics of the presented converter are verified on a 500V-700V input 54V/10A output experimental prototype, whose efficiency reaches 94.7% under rating condition.