A Study of Sidewall Effects in HgCdTe Photoconductors Passivated with MBE-Grown CdTe

In order to evaluate the effectiveness of CdTe surface passivating layers, HgCdTe photoconductors with and without CdTe sidewall passivation were fabricated. As expected, photoconductors with CdTe sidewall passivation demonstrated significantly higher responsivity in comparison with those without sidewall passivation, indicating the effectiveness of molecular-beam epitaxially (MBE)-grown CdTe as a passivation layer in reducing surface recombination velocity. Characterization of the responsivity differences between photoconductors with and without sidewall CdTe passivation offers a potential method for measuring the interface/surface recombination velocity. This has been demonstrated in this paper by extracting the value of the surface recombination velocity using the Synopsys Sentaurus commercial modeling package to fit experimental responsivity data for fully and partially passivated devices.     

Au／CdTe＋ZnS／HgCdTe双层介质膜MIS器件的制备及研究

通过介质膜ZnS、CdTe薄膜材料的Ar^ 束溅射沉积研究,结合HgCdTe器件工艺,成功制备了以ZnS、CdTe双层介质膜为绝缘层的HgCdTe MIS器件;通过对器件的C－V特性实验分析,获得了CdTe/HgCdTe界面电学特性参数。实验表明：溅射沉积介质膜CdTe ZnS对HgCdTe的表面钝化已经可以满足HgCdTe红外焦麦面器件表面钝化的各项要求。     

CdTe/ZnS复合钝化层对长波碲镉汞器件性能的影响研究

采用CdTe/ZnS复合钝化技术对长波HgCdTe薄膜进行表面钝化,并对钝化膜生长工艺进行了改进。采用不同钝化工艺分别制备了MIS器件和二极管器件,并进行了SEM、C-V和I-V表征分析,研究了HgCdTe/钝化层之间的界面特性及其对器件性能的影响。结果表明,钝化工艺改进后所生长的CdTe薄膜更为致密且无大的孔洞,CdTe/HgCdTe界面晶格结构有序度获得改善;采用改进的钝化工艺制备的MIS器件C-V测试曲线呈现高频特性,界面固定电荷面密度从改进前的1.671011 cm-2下降至5.691010 cm-2;采用常规钝化工艺制备的二极管器件在较高反向偏压下出现较大的表面沟道漏电流,新工艺制备的器件表面漏电现象获得了有效抑制。     

Hg1-xCdxTe长波光伏探测器的低频噪声研究

在同一Hg1-xCdxTe晶片上（x=0．217）制备了单层ZnS钝化和双层（CdTe＋ZnS）钝化的两种器件,对器件的低频噪声和暗电流进行了测试．发现单层钝化的器件在反偏较高时具有较高的低频噪声,在对器件的暗电流拟合计算中发现,单层钝化的器件具有较大的表面隧道电流,而这正是单层钝化器件具有较高低频噪声的原因．并通过高分辨X射线衍射中的倒易点阵技术RSM（reciprocal space mapping）研究了两种钝化对HgCdTe外延层晶格完整性的影响,发现单层ZnS钝化的HgCdTe外延层产生了大量缺陷,而这些缺陷正是单层钝化器件具有较高的低频噪声和表面隧道电流的原因．     

MBE原位碲化镉钝化的碲镉汞长波光电二极管列阵

采用分子束外延(MBE)技术在表面生长碲化镉(CdTe)介质膜的p型碲镉汞(HgCdTe)材料,并通过离子注入区的光刻、暴露HgCdTe表面的窗口腐蚀、注入阻挡层硫化锌(ZnS)的生长、形成p-n结的B+注入、注入阻挡层的去除、绝缘介质膜ZnS的生长、金属化和铟柱列阵的制备等工艺,得到了原位CdTe钝化的n+-on-p...     

碲镉汞光伏探测器的变面积表面钝化研究

利用同一片碲镉汞材料制备了由单层ZnS和双层CdTe/ZnS作钝化膜的变面积光伏探测器,对两种钝化膜结构的变面积器件进行了对比研究.通过分析两种器件的电流-电压(I-V)特性曲线以及零偏电阻-面积乘积(RoA)与周长-面积比(p/A)的关系曲线,发现ZnS钝化的器件具有较大的表面漏电流;通过分析两种器件的电流噪声与暗电流的关系,发现ZnS钝化的器件的噪声特性较接近散粒噪声,CdTe/ZnS双层钝化的器件则表现出较好的基本1/f噪声特性,使得器件噪声要小于单层ZnS钝化的器件.     

Passivation effect on optical and electrical properties of molecular beam epitaxy-grown HgCdTe/CdTe/Si layers

The effects of passivation with two different passivants, ZnS and CdTe, and two different passivation techniques, physical vapor deposition (PVD) and molecular beam epitaxy (MBE), were quantified in terms of the minority carrier lifetime and extracted surface recombination velocity on both MBE-grown medium-wavelength ir (MWIR) and long-wavelength ir HgCdTe samples. A gradual increment of the minority carrier lifetime was reported as the passivation technique was changed from PVD ZnS to PVD CdTe, and finally to MBE CdTe, especially at low temperatures. A corresponding reduction in the extracted surface recombination velocity in the same order was also reported for the first time. Initial data on the 1/f noise values of as-grown MWIR samples showed a reduction of two orders of noise power after 1200-Å ZnS deposition.     

Hg1-xCdxTe光伏探测器的钝化研究

用倒易二维点阵对HgCdTe光伏探测器钝化及其热处理行为进行了研究,发现测射沉积的钝化膜会引起HgCdTe的晶面弯曲,严重的会出现晶面扭曲和mosaic结构,而钝化后的热处理能改善MCT晶体的完整性,在不同的钝化介质层钝化MCT的研究中发现,ZnS钝化层在高温下并不稳定,而CdTe钝化层却能保持较高的耐温性能。     

Effect of device processing on 1/f noise in uncooled, auger-suppressed CdHgTe diodes

Auger suppression reduces the leakage current in uncooled CdHgTe diodes to the point where the shot noise limited D* is significantly higher than for other uncooled detectors. However, Auger-suppressed diodes exhibit high levels of 1/f noise and so applications have initially been in devices operating at high frequency such as CO₂ laser heterodyne detectors. In order to use Auger suppression in imaging devices, we need to reduce the 1/f noise and this paper describes a study of the effects of device processing on noise. We find that although some of the noise is associated with perimeter leakage currents, variations in the surface passivation treatment have little effect on the total noise. However, a post-passivation anneal can reduce the noise in some cases. We also find that CdTe passivated devices are more stable when baked than those passivated with ZnS.     

The interface of metalorganic chemical vapor deposition-CdTe/HgCdTe

The metalorganic chemical vapor deposition (MOCVD) growth of CdTe on bulk n-type HgCdTe is reported and the resulting interfaces are investigated. Metalinsulator-semiconductor test structures are processed and their electrical properties are measured by capacitance-voltage and current-voltage characteristics. The MOCVD CdTe which was developed in this study, exhibits excellent dielectric, insulating, and mechano-chemical properties as well as interface properties, as exhibited by MIS devices where the MOCVD CdTe is the single insulator. Interfaces characterized by slight accumulation and a small or negligible hysteresis, are demonstrated. The passivation properties of CdTe/ HgCdTe heterostructures are predicted by modeling the band diagram of abrupt and graded P-CdTe/n-HgCdTe heterostructures. The analysis includes the effect of valence band offset and interface charges on the surface potentials at abrupt hetero-interface, for typical doping levels of the n-type layers and the MOCVD grown CdTe. In the case of graded heterojunctions, the effect of grading on the band diagram for various doping levels is studied, while taking into consideration a generally accepted valence band offset. The MOCVD CdTe with additional pre and post treatments and anneal form the basis of a photodiode with a new design. The new device architecture is based on a combination of a p-on-n homojunction in a single layer of n-type HgCdTe and the CdTe/HgCdTe heterostructure for passivation.     

光导型碲镉汞探测器的氢化研究

为了提高碲镉汞红外探测器的性能,对ZnS钝化的碲镉汞光导型探测器进行了氢化处理研究,发现处理效果与氢等离子体密度和ZnS钝化层的厚度密切相关。对于ZnS层厚度固定的器件,通过改变氢等离子体密度发现低等离子体密度条件氢化处理更有利于提高器件的性能,表现在处理后器件响应信号提高且噪声下降,从光谱响应上表现为器件短波方向的响应抬高;对于同样的氢化处理条件,通过改变ZnS钝化层的厚度,发现具有较大厚度ZnS层的器件的氢化效果更好。SIMS测试发现氢化过程中氢离子可以穿过ZnS层到达ZnS与碲镉汞的界面处,分析认为氢离子对界面态起到了钝化作用,降低了界面态密度,提高了器件的性能。     

不同钝化结构的HgCdTe光伏探测器暗电流机制

在同一HgCdTe晶片上制备了单层ZnS钝化和双层（CdTe+ZnS）钝化的两种光伏探测器,对器件的性能进行了测试,发现双层钝化的器件具有较好的性能．通过理论计算,分析了器件的暗电流机制,发现单层钝化具有较高的表面隧道电流．通过高分辨X射线衍射中的倒易点阵技术研究了单双层钝化对HgCdTe外延层晶格完整性的影响,发现单层ZnS钝化的HgCdTe外延层产生了大量缺陷,而这些缺陷正是单层钝化器件具有较高表面隧道电流的原因．     

A CdTe passivation process for long wavelength infrared HgCdTe photo-detectors

Passivant-Hg_1−xCd_xTe interface has been studied for the CdTe and anodic oxide (AO) passivants. The former passivation process yields five times lower surface recombination velocity than the latter process. Temperature dependence of surface recombination velocity of the CdTe/n-HgCdTe and AO/n-HgCdTe interface is analyzed. Activation energy of the surface traps for CdTe and AO-passivated wafers are estimated to be in the range of 7–10 meV. These levels are understood to be arising from Hg vacancies at the HgCdTe surface. Fixed charge density for CdTe/n-HgCdTe interface measured by CV technique is 5×10¹⁰ cm⁻², which is comparable to the epitaxially grown CdTe films. An order of magnitude improvement in responsivity and a factor of 4 increase in specific detectivity (D*) is achieved by CdTe passivation over AO passivation. This study has been conducted on photoconductive detectors to qualify the CdTe passivation process, with an ultimate aim to use it for the passivation of p-on-n and n-on-p HgCdTe photodiodes.     

基于栅控二极管研究碲镉汞器件表面效应

采用不同工艺生长了CdTe/ZnS复合钝化层,制备了相应的长波HgCdTe栅控二极管器件并进行了不同条件下I-V测试分析.结果表明,标准工艺制备的器件界面存在较高面密度极性为正的固定电荷,在较高的反偏下形成较大的表面沟道漏电流,对器件性能具有重要的影响.通过钝化膜生长工艺的改进有效减小了器件界面固定电荷面密度,使HgCdTe表面从弱反型状态逐渐向平带状态转变,表面效应得到有效抑制,器件反向特性获得显著改善.此外,基于最优的工艺条件制备的器件界面态陷阱数量得到大幅降低,器件稳定性增强;同时器件R_0A随栅压未发生明显地变化.     

不同介质层钝化的碲镉汞光导型探测器的氢化研究

利用氢等离子体对阳极氧化层和ZnS钝化的碲镉汞光导型探测器进行了氢化处理,发现对于阳极氧化层钝化的器件,氢化处理后性能衰退,表现在信号的降低和噪声的增加,从表面形貌的观察,发现原来呈蓝色的阳极氧化层在氢化处理后几乎完全消失,从光谱响应上表现为短波方向的响应下降,认为由于氢化过程中介质层的消失使得氢离子直接轰击碲镉汞表面,造成少子表面复合速度增加.对ZnS钝化的器件氢化处理后性能改善,表现为信号的提高和噪声的下降,从光谱响应上表现为短波方向的响应抬高,从表面形貌观察发现ZnS的颜色略有变化,台阶仪测试表明氢化后ZnS的厚度减薄了约70nm,通过SIMS测试分析发现氢化过程中H离子可以穿过ZnS层到达ZnS与碲镉汞的界面处,认为氢离子对界面态起到了钝化作用,降低了界面态密度从而提高了器件的性能.     

长波碲镉汞材料阳极氧化膜/ZnS界面的电学特性参数

通过碲镉汞阳极氧化膜和磁控溅射ZnS膜,结合HgCdTe器件工艺,成功制备了以阳极氧化膜和磁控溅射ZnS双层钝化膜为绝缘层的“长波弱P”型HgCdTe MIS器件.通过对器件的C-V特性实验分析,获得了长波HgCdTe材料的阳极氧化膜/ZnS界面电学特性参数.并通过获得的界面参数,计算了阳极氧化和ZnS的双层钝化膜的表面复合速度.并对MIS器件的变温C-V特性进行了实验和分析.     

碲镉汞物理与化学钝化界面的AES研究

采用化学和物理方法分别在Hg1-xCdxTe (MCT)表面制备了阳极氟化膜、CdTe、ZnS和类金刚石薄膜(DLC)钝化层.采用俄歇光谱(AES)和红外透射光谱(IR)研究了这些钝化层与MCT之间的界面特性.结果表明与阳极氟化膜和CdTe膜相比,ZnS和DLC膜能较好地抑制MCT组元的外扩散.ZnS层中的Zn和S 易于向MCT内部扩散,而且发现在ZnS层中有O的存在,这可能是由于ZnS易与空气中水份发生作用所致.而DLC中C向MCT内表面扩散较少.MCT表面沉积DLC薄膜后红外透过率较ZnS有明显的提高.     

HgCdTe-MISFET fabrication with multi-step surface passivation and quantum effects

We have used multi-step surface passivation process integrating electrochemical reduction and UV exposure with native sulfidization by H₂S gas to obtain high quality ZnS/p-HgCdTe interface. It shows very low parasitic interface charge density of the order of 10¹⁰cm⁻². The insulating ZnS layer also exhibits very high resistivity of ∼10¹² Θcm. The resulting fabricated HgCdTe-MISFETs show 2D quantum effects. Magnetoresistance measured at 1.5K displays oscillations which begin to appear above the gate voltage of 10V. They are identified as the Shubnikov-de Haas oscillations involving three electronic subbands. The magnetotransport data are quantitatively analyzed with the calculated Landau level-fan diagram and confirm the 2D subband quantization of the inversion layer at the ZnS/p-HgCdTe interface. This result demonstrates successful role of the multi-step surface passivation for realizing 2D ZnS/HgCdTe interface which will provide high quality 2DEG resevoir basis in future Hg-based narrow-gap nanostructure device applications.     

Metalorganic chemical vapor deposition CdTe passivation of HgCdTe

CdTe epilayers are grown by metalorganic chemical vapor deposition (MOCVD) on bulk HgCdTe crystals with x ~ 0.22 grown by the traveling heater method (THM). The THM HgCdTe substrates are (111) oriented and the CdTe is grown on the Te face. The metalorganic sources are DMCd and DETe, and the growth is performed at subatmospheric pressure. Ultraviolet (UV) photon-assisted hydrogen radicals pretreatment plays a dominant role in the electrical properties of the resulting heterostructures. The requirements of a good passivation for HgCdTe photodiodes vis-a-vis the passivation features of CdTe/HgCdTe heterostructures are discussed. The effect of valence band offset and interface charges on the band diagrams of p-isotype CdTe/HgCdTe heterostructures, for typical doping levels of the bulk HgCdTe substrates and the MOCVD grown CdTe, is presented. Electrical properties of the CdTe/HgCdTe passivation are determined by capacitance-voltage and current-voltage characteristics of metal-insulator-semiconductor test devices, where the MOCVD CdTe is the insulator. It is found that the HgCdTe surface is strongly inverted and the interface charge density is of the order of 10¹²cm² when the CdTe epilayer is grown without the UV pretreatment. With the in-situ UV photon-assisted hydrogen radicals pretreatment, the HgCdTe surface is accumulated and the interface charge density is -4. 10¹¹ cm^-2.     

Dislocation profiles in HgCdTe(100) on GaAs(100) grown by metalorganic chemical vapor deposition

We studied dislocation etch pit density (EPD) profiles in HgCdTe(lOO) layers grown on GaAs(lOO) by metalorganic chemical vapor deposition. Dislocation profiles in HgCdTe(lll)B and HgCdTe(lOO) layers differ as follows: Misfit dislocations in HgCdTe(lll)B layers are concentrated near the HgCdTe/CdTe interfaces because of slip planes parallel to the interfaces. Away from the HgCdTe/CdTe interface, the HgCdTe(111)B dislocation density remains almost constant. In HgCdTe(lOO) layers, however, the dislocations propagate monotonically to the surface and the dislocation density decreases gradually as dislocations are incorporated with increasing HgCdTe(lOO) layer thicknesses. The dislocation reduction was small in HgCdTe(lOO) layers more than 10 μm from the HgCdTe/CdTe interface. The CdTe(lOO) buffer thickness and dislocation density were similarly related. Since dislocations glide to accommodate the lattice distortion and this movement increases the probability of dislocation incorporation, incorporation proceeds in limited regions from each interface where the lattice distortion and strain are sufficient. We obtained the minimum EPD in HgCdTe(100) of 1 to 3 x 10⁶ cm^-2 by growing both the epitaxial layers more than 8 μm thick.