Power complexity of multiplexer-based optoelectronic crossbar switches

The integration of thousands of optical input/output (I/O) devices and large electronic crossbar switching elements onto a single optoelectronic integrated circuit (IC) can place stringent power demands on the CMOS substrates. Currently, there is no sufficiently general analytic methodology for power analysis and power reduction of large-scale crossbar switching systems. An analysis of the power complexity of single-chip optoelectronic switches is presented, assuming the classic broadcast-and-select crossbar architecture. The analysis yields the distribution of power dissipation and allows for design optimization. Both unpipelined and pipelined designs are analyzed, and a technique to reduce power dissipation significantly is proposed. The design of a 5.12 Tbit single-chip optoelectronic switch using 0.18-/spl mu/m CMOS technology is illustrated. The pipelined switch design occupies < 70 mm/sup 2/ of CMOS area, and consumes <80 W of power, which compares favorably to the power required in electrical crossbar switches of equivalent capacity.     

光子晶体透射相位特性在全光开关和逻辑门中的应用

利用传输矩阵法详细研究了形如(HL)kA(LH)k的含N个耦合缺陷一维光子晶体的透射相位特性。研究表明,当 时,光子晶体的透射相移呈近线性变化;而当 时,透射相位曲线在整个禁带范围内呈阶梯变化,且在每个缺陷模附近透射相位随频率迅速改变,其相移量约等于π。当在光子晶体中引入非线性折射率材料时,折射率的微小改变将导致透射光产生π相移,而且此相移过程中透射率接近于零,这有利于减少动态啁啾对透射光信号的影响。光子晶体的这种π透射相移特性可用于设计各种新型相位器件。根据这一原理,设计了全光开关及逻辑门并讨论了其工作原理。     

片上网络路由器的交叉开关设计实现

交叉开关是片上网络路由器的关键部分。交叉开关的设计可以采用三态触发器或多路复用器实现。本文针对几种不同形式的交叉开关实现方案,比较了其面积和功耗的开销,同时设计了基于iSLIP算法的交叉开关调度机制。通过基本逻辑门搭建的多路复用器实现的交叉开关相比于采用三态门实现的交叉开关,在功耗、面积上有较大优势。采用iSLIP算法实现的片上网络交叉开关,具有最高的工作频率上限。     

Resource allocation for statistical quality of service provision in buffered crossbar switches

The buffered crossbar switch is a promising switching architecture that plays a crucial role for providing quality of service (QoS) in computer networks. Sufficient amount of resources—bandwidth and buffer space—must be allocated in buffered crossbar switches for QoS provision. Resource allocation based on deterministic QoS objectives might be too conservative in practical network operations. To improve resource utilization in buffered crossbar switches, we study the problem of resource allocation for statistical QoS provision in this paper. First, we develop a model and techniques for analyzing the probabilistic delay performance of buffered crossbar switches, which is described by the delay upper bound with a prescribed violation probability. Then, we determine the required amounts of bandwidth and buffer space to achieve the probabilistic delay objectives for different traffic classes in buffered crossbar switches. In our analysis, we apply the effective arrival envelope to specify traffic load in a statistical manner and characterize switch service capacity by using the service curve technique. Instead of just focusing on one specific type of scheduler, the model and techniques developed in this paper are very flexible and can be used for analyzing buffered crossbar switches with a wide variety of scheduling algorithms. Copyright © 2007 John Wiley & Sons, Ltd.     

切换模拟或数字信号的开／关缓冲器

很多应用都需要使用在数字控制下切换模拟信号或数字信号的方法。这种开关的期望规格包括：当开关处于关断状态时,衰减小于90 dB；当开关处于打开状态时,失真不大于0.002%；以及能在10μs以内响应开、关命令的能力。另外,电路应     

带VOQ和交叉点缓冲的交叉矩阵

带虚拟输出队列(VOQ)的输入队列(IQ)交换结构可按比例地达到很高的速度,甚大规模集成电路(VLSI)集成度的不断提高使得对于Crossbar的交叉点在硬件上为每个信元或包留有足够的缓存成为可能。采用组合输入／输出排FX(CICQ)交换,可利用简单的算法得到比IQ交换更低的延迟。     

A new architecture of photonic ATM switches

A photonic asynchronous transfer mode (ATM) switch architecture for ATM operation at throughputs greater than 1 Tbit/s is proposed. The switch uses vertical-to-surface transmission electrophotonic devices (VSTEPs) for the optical buffer memory, and an optical-header-driven self-routing circuit in contrast with conventional photonic ATM switches using electrically controlled optical matrix switches. The optical buffer memory using massively parallel optical interconnections is an effective solution to achieve ultra-high throughput in the buffer. In the optical-header-driven self-routing circuit, a time difference method for a priority control is proposed. For the optical buffer memory, the write and read operations to and from the VSTEP memory for 1.6 Gbit/s, 8-bit optical signal are confirmed. The optical self-routing operation and priority control operation by the time difference method in the 4×4 self-routing circuit were performed by 1.6-Gbit/s 256-bit data with a 10-ns optical header pulse     

THE NEW SUPER-HIGH-SPEED DIGITAL CIRCUIT BASED ON LINEAR AND-OR GATES

The paper reveals the relation between the linear AND-OR gate and the emitter function logic. With theoretic calculation and PSPICE simulation, the paper proves that the linear AND-OR gates can work at super-high-speed and can be multi-cascaded. On the basis of analyzing the high-speed switch units which coordinate with linear AND-OR gates, two kinds of emitter coupled logic circuits are designed. The paper also discusses the design principles of super-high-speed digital circuits, and some examples of combinational and sequential circuits using linear AND-OR gate are given.     

Five-port silicon optical router based on Mach-Zehnder optical switches for photonic networks-on-chip

With the continuous development of integrated circuits, the performance of the processor has been improved steadily. To integrate more cores in one processor is an effective way to improve the performance of the processor, while it is impossible to further improve the property of the processor by only increasing the clock frequency. For a processor with integrated multiple cores, its performance is determined not only by the number of cores, but also by communication efficiency between them. With more processor cores integrated on a chip, larger bandwidths are required to establish the communication among them. The traditional electrical interconnect has gradually become a bottleneck for improving the performance of multiple-core processors due to its limited bandwidth, high power consumption, and long latency. The optical interconnect is considered as a potential way to solve this issue. The optical router is the key device for realizing the optical interconnect. Its basic function is to achieve the data routing and switching between the local node and the multi-node. In this paper we present a five-port optical router for Mesh photonics network-on-chip. A five-port optical router composed of eight thermally tuned silicon Mach-Zehnder optical switches is demonstrated. The experimental spectral responses indicate that the optical signal-to-noise ratios of the optical router are over 13 dB in the wavelength range of 1525-1565 nm for all of its 20 optical links. Each optical link can manipulate 50 wavelength channels with the channel spacing of 100 GHz and the data rate of 32 Gbps for each wavelength channel in the same wavelength range. The lowest energy efficiency of the optical router is 43.4 fJ/bit.     

High-speed buffer management for 40 gb/s-based photonic packet switches

We develop a method of high-speed buffer management for output-buffered photonic packet switches. The use of optical fiber delay lines is a promising solution to constructing optical buffers. The buffer manager determines packet delays in the fiber delay line buffer before the packets arrive at the buffer. We propose a buffer management method based on a parallel and pipeline processing architecture consisting of (log/sub 2/N+1) pipeline stages, where N is the number of ports of the packet switch. This is an expansion of a simple sequential scheduling used to determine the delays of arriving packets. Since the time complexity of each processor in the pipeline stages is O(1), the throughput of this buffer management is N times larger than that of the sequential scheduling method. This method can be used for buffer management of asynchronously arriving variable-length packets. We show the feasibility of a buffer manager supporting 128 /spl times/ 40 Gb/s photonic packet switches, which provide at least eight times as much throughput as the latest electronic IP routers. The proposed method for asynchronous packets overestimates the buffer occupancy to enable parallel processing. We show through simulation experiments that the degradation in the performance of the method resulting from this overestimation is quite acceptable.     

智能光开关——实现全光网的关键

在光纤传输系统中,应用ＤＷＤＭ技术的目的是为了满足Ｉｎｔｅｒｎｅｔ及其它电信业务对带宽的爆炸性需求。单根光纤可同时传输的波长数已从几年前普通ＷＤＭ的８个波长增长到国前ＤＷＤＭ的约１６０个波长,其增加的容量相当于数十万路电话的容量。 然而,人们对容量和带宽的需求是永无尽头的,最终的目标是建设一个能达到以Ｔｂ／ｓ速率传输的全光通信网。 全光网络的关键要素是“透明”,即网络中的光交叉连接与光分插复用器件应与所传输的数据格式、比特率以及所使用的协议无关。有几种类型的光开关提供了这种透明性。 这种光开关不需…     

40 Gbit=s reconfigurable photonic logic gates based on various nonlinearities in single SOA

40 Gbit/s reconfigurable photonic logic gates with XNOR, AND, NOR, OR and NOT functions are demonstrated, based on various nonlinearities of a single semiconductor optical amplifier (SOA), including four-wave mixing (FWM), cross-gain modulation (XGM) and transient cross-phase modulation (T-XPM). Detuning optical bandpass filters are employed to enhance the SOA modulation bandwidth.     

Analysis of the surface-acoustic-wave crossbar coupler

An analysis of the scattering of surface acoustic waves at a region of periodic surface mass loading is presented. Experimental measurements of the scattered-wave amplitudes show close agreement with theoretical calculations.     

Implementation of all-optical tristate Pauli X, Y and Z gates based on two-dimensional photonic crystal

In this paper, we have designed and simulated all-optical tristate Pauli X, Y and Z gates using 2D photonic crystal. Simple line and point defects have been used to design the structure. The performance of the structure has been analyzed and investigated by plane wave expansion (PWE) and finite difference time domain (FDTD) methods. Different performance parameters, namely contrast ratio (CR), rise time, fall time, delay time, response time and bit rate, have been calculated. The main advantage of the proposed design is that all the Pauli gates have been realized from a single structure. Due to compact size, fast response time, good CR and high bit rate, the proposed structure can be highly useful for optical computing, data processing and optical integrated circuits.     

Simulant designing of an ultra-compact AND,OR logical gates based on two-dimensional photonic crystal waveguides

In this paper, we employed optical waveguides in a silicon rod base structure to realize AND, OR logical operation simultaneously based on two-dimensional photonic crystals. All of the structure is composed of silicon rods. Employing silicon rods of different radii as defect rods in optical waveguide filtered the desired wavelength. We utilized two similar waveguides as our input bits and two waveguides as AND and OR outputs. The overall footprint of the proposed device is 60 μm² and hence is very compact. The time responses of device are about 0.5 ps and hence in conjunction with the mentioned characteristics suggest the use of the device for computational applications. The electric field distribution is obtained by the finite-difference time-domain method. In this paper, the logic state of ‘1’ and ‘0’ at output port is defined as the transmission is around ‘1’ and less than 0.25, respectively. The compact size of the proposed structure and the materials used make the proposed device suitable for optical integrated circuits.     

光通信窗口的光子晶体光开关特性

利用传输矩阵法,从理论上研究了掺杂非线性介质的一维光子晶体的光学性质.在此基础上提出了非线性光子晶体光开关结构,并模拟仿真了光开关的工作原理和过程,研究表明该结构可以在1.55μm的光通信窗口很好地完成光开关的功能.另外,此结构还兼有可调谐窄带滤波器的功能,而且通过改变缺陷层两侧的周期结构的层数可以使透射峰的宽度达到0.3nm以下,完全可以满足密集波分复用系统的要求.     

利用DFB激光器非线性的高线性射频光传输链路

提出了一种利用分布反馈DFB（Distributed Feedback laser）激光器的非线性对射频光传输系统动态范围进行优化的方案。实验研究了半导体分布反馈激光器的非线性,基于实验结果分析了DFB激光器的偏置电流与线性性能的关系。在此基础上建立了对马赫曾德外调制（Mach-Zehndermodulator,MZM）射频光传输系统线性优化方案。实验结果表明,该实验系统有效抑制了系统三阶交调量,系统的动态范围得到改善,当输入射频信号中心频率4 GHz,双音号间隔10 kHz时,三阶交调失真抑制23.1 dB,无杂散动态范围提高8.68 dB。     

Computer simulation of optical crosstalk in linear imaging arrays

Computer simulation is utilized to predict crosstalk in linear imaging arrays. The simulation is based on analysis which includes the effects of focusing the input light, the use of Kettleer's equations to describe propagation in a lossy medium, and a solution of the generalized diffusion equation for excited carriers. Crosstalk for a conventional linear image array and one employing a fan-out channel waveguide array are evaluated and compared. The fan-out channel waveguide array concept allows for high resolution imaging without requiring very small photodetector array elements, and calculations presented show that it should have superior performance with regard to crosstalk.     

Feedback scheme for frame synchronisation in photonic network of time-multiplexed space switches

A method for frame synchronisation in a photonic network of time-multiplexed space switches is presented. The proposed method, which is based on a feedback scheme, provides a mechanism for frame synchronisation to be achieved initially, without the need for accurate transmission time measurements, and allows synchronisation to be maintained within very tight bounds.<>