在系统可编程模拟器件(ispPAC)及其应用

在系统可编程模拟器件(ispPAC)的出现,改变了传统的模拟电路的设计思想,他具有在系统可编程的特点,无需外围元器件可以灵活地实现信号放大、滤波、D/A转换等,利用他设计电路方便、快捷。介绍在系统可编程模拟器件(isp-PAC)的结构、功能与特点,利用可编程模拟器件ispPAC10,ispPAC20,借助于PACDesigner软件,分别设计并实现了滤波器、数控振荡器等电路,并给出仿真结果。实践证明isp技术有广阔的应用前景。     

基于LabVIEW的模拟滤波器电路测试方法的研究

介绍基于图形化编程语言LabVIEW设计的测量模拟滤波器电路的方法。相比传统的模拟滤波器电路的测试系统,本文提出的测试方法功能强、速度快,不仅可以测量滤波器电路的幅频特性,还可以测量相位信息,该系统在测试精度上可以代替传统的频谱分析仪进行模拟滤波器电路的测量。     

基于C8051F120的FIR低频数字滤波器设计

针对低频数字滤波及其滤波参数更新问题,提出了一种基于C8051F120的FIR低频数字滤波器设计。该滤波器主要由C8051F120单片机构成,负责利用其片上硬件资源完成A/D采样、FIR滤波及D/A转换功能,同时,该滤波器还可以通过串口接收上位机发的新滤波数据,实现滤波参数的在线更新。实验结果表明:文章提出的基于C8051F120的滤波器可实现低频段的FIR数字滤波,并可在线更新滤波参数,实现滤波功能的在线调整。     

模拟集成电路参数型故障定位方法

针对模拟集成电路参数型故障的测试难题,提出了定位模拟集成电路参数型故障的功率谱相关分析方法.利用小波滤波器组对被测电路响应进行子带滤波后,计算子带响应序列的相干函数.通过对以相干函数序列表征的功率谱进行相关分析,不仅可以实现模拟集成电路参数型故障的数字化故障特征提取,而且还可以完成对参数型故障的定位.利用国际标准电路ITC97的状态变量滤波器和跳蛙滤波器,通过对比实验,验证了本文方法对定位参数型故障的有效性,为实现模拟集成电路参数型故障诊断的高覆盖率和诊断自动化提供了一种新途径.     

模拟集成电路参数型故障定位方法

针对模拟集成电路参数型故障的测试难题,提出了定位模拟集成电路参数型故障的功率谱相关分析方法.利用小波滤波器组对被测电路响应进行子带滤波后,计算子带响应序列的相干函数.通过对以相干函数序列表征的功率谱进行相关分析,不仅可以实现模拟集成电路参数型故障的数字化故障特征提取,而且还可以完成对参数型故障的定位.利用国际标准电路ITC97的状态变量滤波器和跳蛙滤波器,通过对比实验,验证了本文方法对定位参数型故障的有效性,为实现模拟集成电路参数型故障诊断的高覆盖率和诊断自动化提供了一种新途径.     

用tow-thomas电路设计模拟滤波器的一般方法

滤波器整体来说发展时间较长,由最初的RC电路滤波器到今天的有源滤波器,电路一直朝着更小型、更精确、更低功耗的方向发展。经过长时间的发展,滤波器整体有了一套比较规范的设计方法。而在众多滤波器的实现电路中,tow-thomas电路是一款易于修改滤波器参数且容易实现的电路。整体上来说,模拟滤波器的设计分为两步:(1)确定传输函数H(S);(2)具体电路实现H(S)。本文将通过实例和简单叙述阐述这一问题。     

一种数字有限冲激响应滤波器电路的设计

提出了一种数字有限冲激响应(FIR)滤波器电路的设计思想,克服了传统的从算法直接入手的滤波器设计方法中存在的计算量大、电路描述繁琐以及验证困难的缺点.并按此思想设计了一个通用数字FIR滤波器电路,在利用Matlab工具构造出滤波器数学模型的基础上,提出了一种滤波器电路结构,用VHDL语言对电路进行描述,并进行了电路综合和仿真.给出了该电路的数学模型和滤波结果.     

RC电路的应用

RC电路在模拟电路、脉冲数字电路中得到广泛的应用，由于电路的形式以及信号源和R，C元件参数的不同，因而组成了RC电路的各种应用形式：微分电路、积分电路、耦合电路、滤波电路及脉冲分压器。     

数字滤波器

从PCM录音的实际应用开始至几年后的二十世纪七十年代中期,由于预见到数字音频时代即将到来,所以开始了主要用于录音领域的音调控制器等音质调整电路用数字滤波器来实现的研究工作。当时所说的数字滤波器是指用于大型计算机的滤波电路,在研究论文中发表的滤波器的设计例子具有用模拟电路无法实现的变化陡峭的衰减特性。但当时还没有把这种数字滤波器用作音频滤波器的例子。直到1979年在BBC的技术报告上才第一次见到用数字滤波器得到的图示均衡器特性的文章（虽然其电平是计算机的电平）。     

低功耗电磁水表的信号处理方法

提出了一种低功耗电磁水表的信号处理方法,该方法不需要DSP(数字信号处理器)或高端的MCU平台,其电路主要结构旋转电容滤波器基于相敏检测技术,可以用通用运放、模拟开关及一般RC元件等器件组成,具有中心频率稳定、电路简单、成本低廉等优点。该方法可以从强宽带背景噪声中提取微弱信号,非常适合电磁水表信号的处理。通过比较滤波前后的信号频谱成分,验证了自举电路和旋转电容滤波器组合的方法的有效性。     

Digital filter design techniques in the frequency domain

Digital filtering is the process of spectrum shaping using digital components as the basic elements. Increasing speed and decreasing size and cost of digital components make it likely that digital filtering, already used extensively in the computer simulation of analog filters, will perform, in real-time devices, the functions which are now performed almost exclusively by analog components. In this paper, using the z-transform calculus, several digital filter design techniques are reviewed, and new ones are presented. One technique can be used to design a digital filter whose impulse response is like that of a given analog filter; other techniques are suitable for the design of a digital filter meeting frequency response criteria. Another technique yields digital filters with linear phase, specified frequency response, and controlled impulse response duration. The effect of digital arithmetic on the behavior of digital filters is also considered.     

Digital Bandlimiting Filters for P.C.M. Transmission Systems

Bandlimiting filtering is required at the input to p.c.m. transmission and switching systems to prevent aliasing. The required filtering can be performed by a combination of analog and digital filters or by analog filters alone. This paper discusses a combination of a simple analog filter and digital filter suitable for Large Scale Integration. Both recursive and transversal digital filters are considered each in a variety of realizations. The realizations include two filters which exploit the companded nature of the p.c.m. code by using logarithmic signal processing to simplify multiplication. Comparisons are made between the realizations and the most suitable types for Large Scale Integration are found to be a recursive look-up table filter and a transversal logarithmic filter.     

Digital Filters for Real-Time ECG Signal Processing Using Microprocessors

Traditionally, analog circuits have been used for signal conditioning of electrocardiograms. As an alternative, algorithms implemented as programs on microprocessors can do similar filtering tasks. Also, digital filter algorithms can perform processes that are difficult or impossible using analog techniques. Presented here are a set of real-time digital filters each implemented as a subroutine. By calling these subroutines in an appropriate sequence, a user can cascade filters together to implement a desired filtering task on a single microprocessor. Included are an adaptive 60-Hz interference filter, two low-pass filters, a high-pass filter for eliminating dc offset in an ECG, an ECG data reduction algorithm, band-pass filters for use in QRS detection, and a derivative-based QRS detection algorithm. These filters achieve real-time speeds by requiring only integer arithmetic. They can be implemented on a diversity of available microprocessors.     

一种扬声器频响的自适应数字滤波优化补偿方法

从模拟滤波器到数字滤波器的转换以及寻找滤波器参数的最优解是IIR参数滤波器用于扬声器频响实时补偿的两个关键问题。本文提出一种根据模拟滤波器的中心频率、增益和品质因数来自适应选择S域到Z域转换方法,通过扬声器频响曲线的实时包络来划分峰谷,给出了一种滤波器参数的优化方法,提升了数字滤波器与模拟原型的匹配度,从而减少滤波器个数、加速了滤波器的优化计算。实验结果表明,所提出的方法使补偿滤波器的个数和总时间开销比现有的补偿方法分别减少了大约43%和55%。     

Three-channel variable filter-bank for digital hearing aids

This study proposes a three-channel (3-channel) variable filter-bank (VFB) that consists of variable lowpass, variable bandpass and variable highpass digital filters. The three variable digital filters are obtained from a normalised analog prototype Chebyshev type-I lowpass filter using analog frequency transformations along with a modified bilinear transformation. Since both the magnitudes (gains) and band edge frequencies of the three variable digital filters are independently adjustable, the 3-channel VFB is considerably flexible, and can be successfully applied for compensating various hearing loss patterns in digital hearing aids. Various audiograms have been used to verify that high-accuracy fittings can be achieved with low order variable filters. Moreover, the authors reveal and theoretically prove the numerator coefficient-symmetries of the variable lowpass, variable bandpass and variable highpass filters, and show that each variable filter requires only one multiplication for its numerator filtering operations, so the total number of multiplications can be significantly reduced. More specifically, only 11 multiplications and 14 additions are required in the whole 3-channel VFB. Therefore the 3-channel VFB has extremely simple structure and high tuning flexibility for hearing aids.     

An Analog–Digital Hardware for L-Estimate Space-Varying Image Filtering

An analog–digital hardware solution for implementation of the L-estimate space-varying filtering has been proposed. The considered filter form is based on the robust space/spatial-frequency representation and provides efficient denoising of two-dimensional signals/images corrupted by heavy-tailed noise. Moreover, for images with fast-varying details and textures, the L-estimate filtering outperforms the commonly used filters. However, it requires significant processing time, since the space/spatial-frequency representation is calculated for each pixel, on a window by window basis. Therefore, in order to make it feasible for practical applications, a fast implementation of L-estimate space-varying filtering is proposed using a combined analog–digital approach. It provides efficient real-time processing of images corrupted by strong mixed Gaussian and impulse noise.     

巴特沃斯数字陷波滤波器的设计

随着数字技术的发展,数字滤波器在许多领域得到广泛的应用。研究一种在Matlab语言环境下设计IIR数字陷波滤波器的方法,在数字陷波滤波器设计过程中,先进行模拟低通滤波器的设计,然后进行模拟低通/模拟带阻滤波器转换,最后采用双线性变化法将模拟陷波滤波器转化成数字陷波滤波器。提出一种用所有零点和极点来表达数字陷波器传递函数的方法,同时给出以巴特沃斯模拟低通为原型设计数字陷波滤波器的程序。     

Phase equalization of multidimensional wave digital filters derived by rotation

In multidimensional filtering, the phase response is very important. It should be as linear as possible in a certain sense. This paper presents a numerical approach to equalize the phase of multidimensional wave digital filters whose reference filters are transformed from one-dimensional reference filters. This method is illustrated by an example of a two-dimensional wave digital filter whose transfer function has nearly circular symmetrical behavior. The parameters of the all-pass circuits for phase equalization are calculated.     

A CMOS ADSL codec for central office applications

A CMOS central office codec that supports Full Rate and G.Lite asymmetric digital subscriber line (ADSL) transmission is described. The transmit channel consists of application-dependent digital filters, a 14-bit, 8.832-MSample/s current steering DAC, a 1.104-MHz analog filter, and a programmable attenuator. Due to extensive on-chip digital signal processing, the codec complies with the ADSL transmit power spectral density standards without external filtering. The receive channel contains -17.5 to 33.5 dB of programmable gain staggered strategically across three stages, a 138-kHz analog low-pass filter, a 14-bit, 2.208-MSample/s pipeline ADC, and a digital 138-kHz low-pass filter. The receive channel has a wide input range that can accommodate large line voltages present at the line hybrid circuit. The IC occupies 55.2 mm² and dissipates 450 mW from a 3.3-V supply     

A custom digital intermediate frequency filter for the Americanmobile telephone system

A digital filter for intermediate frequency filtering in mobile communication systems is presented. The purpose of the work is to show an alternative to the analog filters which are used in most of today's heterodyne receivers. Bit-serial arithmetic is applied on a twelfth-order wave digital lattice filter algorithm. The paper also shows a method for retiming such algorithms. The power consumption in two fabricated prototypes is compared. By customizing the library cells, the power consumption has been reduced significantly. In the low power prototype, the power dissipation is 8 mW using 3 V supply voltage. The prototype is a 10 MIPS design fabricated in a 0.8-μm standard two-metal-layer CMOS process