Optical switching: switch fabrics, techniques, and architectures

The switching speeds of electronics cannot keep up with the transmission capacity offered by optics. All-optical switch fabrics play a central role in the effort to migrate the switching functions to the optical layer. Optical packet switching provides an almost arbitrary fine granularity but faces significant challenges in the processing and buffering of bits at high speeds. Generalized multiprotocol label switching seeks to eliminate the asynchronous transfer mode and synchronous optical network layers, thus implementing Internet protocol over wavelength-division multiplexing. Optical burst switching attempts to minimize the need for processing and buffering by aggregating flows of data packets into bursts. In this paper, we present an extensive overview of the current technologies and techniques concerning optical switching.     

A comparison of analog and digital techniques for pattern recognition

Since the computer technology utilized often places limitations on the performance of a particular pattern-recognition task, it is important to compare the state-of-the-art and future trends in both the digital and the analog-computer fields. Electronic, acoustical, and optical analog computers for use in pattern recognition are discussed and their performance compared with that of both general-purpose and special-purpose digital computers. It is shown that the analog computer offers workers using low-precision high-speed one-dimensional or two-dimensional linear discriminant analysis a significant advantage in hardware performance (equivalent bits per second per dollar) over the digital computer in certain limited but important areas. These areas include fingerprint identification, word recognition, chromosome spread detection, earth-resources and land-use analysis, and broad-band radar signal processing. A trend analysis is presented which indicates that the advantages of analog computation will probably be overcome in the next few decades by the rapid performance advances being made in digital-computer hardware.     

Video transcoding architectures and techniques: an overview

Throughout this article, we concentrate on the transcoding of block-based video coding schemes that use hybrid discrete cosine transform (DCT) and motion compensation (MC). In such schemes, the frames of the video sequence are divided into macroblocks (MBs), where each MB typically consists of a luminance block (e.g., of size 16 /spl times/ 16, or alternatively, four 8 /spl times/ 8 blocks) along with corresponding chrominance blocks (e.g., 8 /spl times/ 8 Cb and 8 /spl times/ 8 Cr). This article emphasizes the processing that is done on the luminance components of the video. In general, the chrominance components can be handled similarly and will not be discussed in this article. We first provide an overview of the techniques used for bit-rate reduction and the corresponding architectures that have been proposed. Then, we describe the advances regarding spatial and temporal resolution reduction techniques and architectures. Additionally, an overview of error resilient transcoding is also provided, as well as a discussion of scalable coding techniques and how they relate to video transcoding. Finally, the article ends with concluding remarks, including pointers to other works on video transcoding that have not been covered in this article, as well as some future directions.     

Methodologies for characterizing ultrasonic transducers usingneural network and pattern recognition techniques

System hardware for characterizing ultrasonic transducers and the associated data acquisition software and characterizing algorithms are considered. The hardware consists mainly of a workstation computer, a receiver/pulser with gated peak detector, various monitoring devices, a microcomputer-based 3D positioning controller, and an A/D converter. The characterization algorithms are based on neural network and pattern recognition techniques. It is found that artificial neural network techniques provide far better classification results than the pattern recognition techniques. A multilayer backpropagation neural network which provides a classification accuracy of 94% is developed. Two other multilayer neural networks-sum-of-products and a newly devised neural network called hybrid sum-of-products-have a classification accuracy of 90% and 93%, respectively. The most successful pattern recognition technique for this application is found to be the perceptron, which provides a classification accuracy of 77%     

Improved critical area prediction by application of pattern recognition techniques

A novel technique to predict the susceptibility of VLSIC layouts to particle-induced failure is presented. The investigation applies the concept of to determine the failure probability of rectilinear layouts. A unique methodology has been devised, with which the relationship between the recurrent patterns observed within the topology of a layout and the robustness of the design against particulate contamination can be quantified. The critical area is formulated as a function of the dimensions of the identifiable geometrical shapes and the characteristics of the defect model. In comparison with current approximation methods, the proposed technique is quick, exact, adaptable for different defect models and guarantees computational accuracy irrespective of layout complexity.     

Graphical model architectures for speech recognition

This article discusses the foundations of the use of graphical models for speech recognition as presented in J. R. Deller et al. (1993), X. D. Huang et al. (2001), F. Jelinek (19970, L. R. Rabiner and B. -H. Juang (1993) and S. Young et al. (1990) giving detailed accounts of some of the more successful cases. Our discussion employs dynamic Bayesian networks (DBNs) and a DBN extension using the Graphical Model Toolkit's (GMTK's) basic template, a dynamic graphical model representation that is more suitable for speech and language systems. While this article concentrates on speech recognition, it should be noted that many of the ideas presented here are also applicable to natural language processing and general time-series analysis.     

Optical path technologies: a comparison among differentcross-connect architectures

The introduction of optical technology in the path layer of the transport network is expected to allow scalable and modular networks to be realized. In this paper, different optical cross-connect architectures, based either on space division or wavelength division switching, are analyzed. A comparative investigation is accomplished considering three issues of primary importance: cross-connect modularity, complexity, and transmission performance. In particular, the transmission performance of a generic path through the network is evaluated by upgrading a previously published analytical model, so to more accurately take into account the in-band crosstalk arising in the cross-connect     

Combining pattern recognition techniques with Akaike's informationcriteria for identifying ARMA models

ARMA models are identified by combining pattern recognition techniques with Akaike's (1974, 1979) information criteria. First, pattern vectors of ARMA models are obtained by the extended sample autocorrelation functions method proposed by Tsay and Tiao (1984). Second, decision functions of various training samples are specified by the perceptron algorithm used in learning machines. Third, Akaike's AIC and BIC criteria are introduced. The practical utility of the proposed approach is illustrated by both simulated and practical data     

Evolutionary architectures and techniques for video distribution onfiber

A number of proposed and/or demonstrated approaches to video distribution on fiber are highlighted. Each of the architectures described embodies a different combination of delivery mode, degree of fiber utilization, transmission format, and multiplexing technique. The various approaches typically rely on different classes of technologies and can result in different service capabilities. Since available technologies and service demands generally evolve with time, the architectures are presented in an evolutionary manner, beginning with those that appear technologically and economically feasible in the early 1990s, and ending with more sophisticated techniques targeted for the late 1990s and beyond. For each time frame, key technology and system issues are stressed, as well as limits and driving forces that may trigger evolution to later, more advanced architectures. The key design considerations that are common to all of these approaches and the factors that will ultimately govern the pace of evolution from one class of architectures to another are summarized     

A comparative study of pattern recognition techniques for qualityevaluation of telecommunications software

The extreme risks of software faults in the telecommunications environment justify the costs of data collection and modeling of software quality. Software quality models based on data drawn from past projects can identify key risk or problem areas in current similar development efforts. Once these problem areas are identified, the project management team can take actions to reduce the risks. Studies of several telecommunications systems have found that only 4-6% of the system modules were complex [LeGall et al. 1990]. Since complex modules are likely to contain a large proportion of a system's faults, the approach of focusing resources on high-risk modules seems especially relevant to telecommunications software development efforts. A number of researchers have recognized this, and have applied modeling techniques to isolate fault-prone or high-risk program modules. A classification model based upon discriminant analytic techniques has shown promise in performing this task. The authors introduce a neural network classification model for identifying high-risk program modules, and compare the quality of this model with that of a discriminant classification model fitted with the same data. They find that the neural network techniques provide a better management tool in software engineering environments. These techniques are simpler, produce more accurate models, and are easier to use     

Reconfigurable approximate pattern matching architectures for nanotechnology

Approximate pattern matching is comparing an input pattern with a target pattern with a specified error tolerance. This ability to compensate for real-world sensor errors makes approximate pattern matching an ideal choice for a wide range of applications. This paper shows that two n-bit patterns may be matched with a single stage nanotechnology architecture using 2n+1 unit area resonant tunneling diodes (RTDs) and one RTD of 1.5 times the unit area. This architecture is reconfigurable for any target pattern and any error tolerance. We analyze current and power characteristics of the architecture and develop configurations to minimize the same. The robustness of the architecture to variations in device characteristics is also investigated.     

Linear-programming-based techniques for synthesis of network-on-chip architectures

Application-specific system-on-chip (SoC) design offers the opportunity for incorporating custom network-on-chip (NoC) architectures that are more suitable for a particular application, and do not necessarily conform to regular topologies. This paper presents novel mixed integer linear programming (MILP) formulations for synthesis of custom NoC architectures. The optimization objective of the techniques is to minimize the power consumption subject to the performance constraints. We present a two-stage approach for solving the custom NoC synthesis problem. The power consumption of the NoC architecture is determined by both the physical links and routers. The power consumption of a physical link is dependent upon the length of the link, which in turn, is governed by the layout of the SoC. Therefore, in the first stage, we address the floorplanning problem that determines the locations of the various cores and the routers. In the second stage, we utilize the floorplan from the first stage to generate topology of the NoC and the routes for the various traffic traces. We also present a clustering-based heuristic technique for the second stage to reduce the run times of the MILP formulation. We analyze the quality of the results and solution times of the proposed techniques by extensive experimentation with realistic benchmarks and comparisons with regular mesh-based NoC architectures.     

Image analysis architectures and techniques for intelligent surveillance systems

Video security is becoming more and more important today, as the number of installed cameras can attest. There are many challenging commercial applications to monitor people or vehicle traffic. The work reported here has both research and commercial motivations. Our goals are first to obtain an efficient intelligent system that can meet strong industrial surveillance system requirements and therefore be real-time, distributed, generic and robust. Our second goal is to have a development platform that allows researchers to conceive and easily test new vision algorithms thanks to its modularity and easy set-up. This paper focuses on the image analysis modules. It considers the different kind of inputs, algorithm models in addition to delay and the need of generality.     

Rate-energy-accuracy optimization of convolutional architectures for face recognition

Face recognition systems based on Convolutional Neural Networks (CNNs) or convolutional architectures currently represent the state of the art, achieving an accuracy comparable to that of humans. Nonetheless, there are two issues that might hinder their adoption on distributed battery-operated devices (e.g., visual sensor nodes, smartphones, and wearable devices). First, convolutional architectures are usually computationally demanding, especially when the depth of the network is increased to maximize accuracy. Second, transmitting the output features produced by a CNN might require a bitrate higher than the one needed for coding the input image. Therefore, in this paper we address the problem of optimizing the energy-rate-accuracy characteristics of a convolutional architecture for face recognition. We carefully profile a CNN implementation on a Raspberry Pi device and optimize the structure of the neural network, achieving a 17-fold speedup without significantly affecting recognition accuracy. Moreover, we propose a coding architecture custom-tailored to features extracted by such model.     

Speech recognition techniques

Transformation of a segment of acoustic signal, by processing into a vectorial representation such as the spectrum, can permit the identification of the constituent phonemes within spoken speech. Subsequent comparison against a previously stored representation using techniques such as dynamic time warping or hidden Markov modelling then permits a speech recognition operation to be accomplished. These signal-processor-intensive transform and graph-search-based pattern-matching techniques are reviewed and currently achievable recognition accuracies are reported