宽带数字接收机I/Q幅相不一致性的校正

随着数字技术的发展,正交双通道变换在接收机中得到了广泛的应用。但是,由于各种因素的影响,I／Q通道的正交一致性并不能得到完全的保证,这会降低接收机的动态范围,进而影响接收机的性能。本文提出了一种宽带数字接收机I／Q幅相不一致性的校正方法,首先通过一种时域方法获得误差信息,接着构造滤波器组对I／Q信号进行校正。仿真结果表明,这种方法能有效提高宽带接收机I／Q通道的正交一致性。     

一种超宽带零中频接收机的设计与实现

针对雷达、电子战和通信等多功能一体化探测要求,设计了一种基于零中频架构的0.3～18 GHz超宽带接收机。硬件系统由宽带数字接收机、超宽带模拟解调器和超宽带频率源组成,实现了0.3～2 GHz频段信号的直接数字化接收和2～18 GHz频段信号的模拟正交解调。给出了FPGA软件处理流程,采用了基于镜像功率检测方法对I/Q支路进行时延误差校正,采用了基于矩阵求逆最小方差法对I/Q支路进行幅相误差校正。样机测试结果表明,接收机的最大瞬时带宽为4 GHz,校正后的镜像抑制度超过50 dB。     

一种宽带接收机幅相不平衡的校正方法

由模拟器件构成的宽带正交解调接收机会由于正交通道的幅相不一致性造成整个系统的失真，进而影响整个接收系统的性能。本文仔细分析了幅相误差对接收机性能的影响，提出了基于FIR滤波的一种数字域校正的方法。通过计算机彷真，证实了该方法的可行性。     

一种数字矢量调制幅相误差的校正方法

在使用数字矢量调制对基带信号进行瞬时带宽拓展时,由于I/Q通道的非理想性,不可避免的会引入幅相误差,从而产生镜频信号,使得发射机输出信号频谱纯度降低,难以达到接收机对信号进行识别的要求。为了达到工程上的要求,需要对幅相误差进行校正。文中首先测量出系统的幅相误差,再设计出补偿相位的全通滤波器和补偿幅度的低通滤波器。实验结果表明,此校正方法能有效地提高发射机的镜像抑制比,改善输出信号的质量。     

宽带信号I/Q采样不平衡校正方法研究

针对宽带信号模拟正交下变频时产生的I/Q信号不平衡问题,本文提出了一种在数字域对I/Q信号不平衡的校正方法,建立了 I/Q信号不平衡的数字模型,分析了 I/Q信号不平衡给系统带来的影响,推导了 I/Q信号不平衡的校正方法,并对校正结果进行了仿真验证,该方法已在某设备中成功应用.     

一种新的综合孔径辐射计误差校正方法

综合孔径辐射计误差会严重影响系统的性能。文中提出了一种新的接收机误差校正方法。该方法包括一个校正矩阵和一种自动校正通道频率响应变化的方法。校正矩阵通过测量系统天线范围内的冲击响应得到。除了基线消条纹误差,该校正矩阵可以在图像重建过程中校正其他的接收机误差。自动校正方法则可以校正通道幅度和相位的时变误差。该方法能简化校正的步骤,减小了校正系统引入的额外误差。仿真结果表明,该校正方法能很好地改善综合孔径辐射计的成像质量。     

DDC在雷达正交接收机中的应用

研制了一种基于DDC芯片的直接中频数字化雷达正交接收机 ,分析了I/Q通道的增益误差和正交误差对解调输出信号的影响。结果表明 ,设计的接收机通道间误差对解调输出的影响完全可以忽略。最后对接收机性能进行了测试 ,得到了理想的解调结果。     

一种提高数字宽带接收机动态范围的误差补偿方法

动态范围是数字宽带接收机的重大瓶颈问题。本文提出了一种利用误差补偿提高动态范围的方法，分析了通道参数不一致性对补偿效果的影响，并给出了参考电路。实验结果证明了它的有效性。     

基于脉冲分裂的宽带雷达系统通道误差校正方法

在不改动宽带雷达系统校准通道硬件的前提下,该文提出一种校正宽带雷达系统传递函数误差及正交解调误差的新方法。该方法通过对通道误差特征的分析,结合宽带线性调频信号的时频关系,根据分裂脉冲方法以分离通道误差造成的镜频干扰和传递函数非理想,得到宽带雷达系统传递函数的完全表征,由此构建相应的雷达回波校正函数,实现接收回波的误差校正。针对有效带宽的实际雷达系统的通道误差校正实验,验证了该文方法的有效性,且与传统的方法相比,该文方法显现出适用性强的特点。     

9.6Gsps 10bit 宽带雷达接收机设计与实现

交叉采样是提升雷达接收机采样率的有效方法,但该方法会引入通道失配,通道失配将严重降低系统的性能。本文首先介绍基于OpenVPX平台的四通道交叉采样宽带雷达接收机的硬件设计;其次对采集系统通道失配误差及其估计方法进行分析;最后针对传统的通道失配校正方法耗费大量时间的问题,提出一种在线校正系统通道失配的方法,该方法提高了通道失配校正的效率。测试结果表明,该设计可实现以采样率9.6Gsps、精度10bit对频带为1GHz~4GHz的中频信号直接采集,能够满足宽带雷达接收机脉冲压缩处理的要求,已成功应用于某宽带雷达。      

Analysis of the Effect of the I/Q Base-Band Filter Mismatch in an OFDM Modem

In digital communication modems in which a very high rate system clock is used, it is necessary to use analog base-band shaping filters in the inphase (I) and quadrature (Q) paths of the modulator. However, this type of implementation inherently produces a mismatch of the I and Q paths. In the present paper, results of the analysis of the transmitter (TX) I/Q mismatch in an Orthogonal Frequency Division Multiplexing (OFDM) system with Differential Coherent Quadrature Phase Shift Keying (DQPSK) modulation is presented. Theoretical analysis shows that the Signal-to-Noise (SNR) degradation due to the I/Q mismatch can be represented by a mismatch transfer function on the basis of which one can compute the maximum affordable amplitude and phase mismatch of the TX filters transfer functions.     

One-tap wideband I/Q compensation for zero-IF filters

The I/Q imbalance is one of the performance bottlenecks in transceivers with stringent requirements imposed by applications such as 802.11a. The mismatch between the frequency responses of two analog low-pass filters, used, e.g., for channel selection in zero-IF receivers, makes this I/Q imbalance frequency dependent. Usually, frequency-dependent I/Q mismatch is estimated and corrected by adaptive techniques, which are complex to implement and may converge slowly due to noise. In this work, a simple, delay-based I/Q compensation scheme is proposed based on an extensive statistical analysis. Its digital implementation uses only two coefficients, which are tuned by a one-step two-tone error estimation. Simulations show that this hardware-efficient scheme significantly reduces the I/Q imbalance.     

RF I/Q Downconverter With Gain/Phase Calibration

We propose an RF I/Q downconverter including a calibration procedure to compensate for gain and phase mismatch errors. The indirect compensation technique is based on the use of the local oscillator (LO) signal as reference for error measurements. A number of mismatch parameters are first estimated by an algorithm running in the digital signal processing processor following the analog-to-digital converter and then used to correct the downconverted I/Q signals digitally during normal operation. The downconverter has been designed in 0.13-mum CMOS technology. The analog part of the system for calibration adds a negligible area and power consumption with respect to the front-end building blocks. Test results exhibit an image-rejection ratio IRRges48.8 dB for I/Q phase errors up to 15deg and for LO I/Q amplitude and mixer gain mismatch errors up to 10%     

Data-aided approach to I/Q mismatch and DC offset compensation in communication receivers

A digital signal processing technique for compensating both the I/Q mismatch and the DC offset in communication receivers is derived with an emphasis on direct-conversion architectures. The I/Q mismatch and DC offset are estimated in a least-squares sense using a training sequence. Also, a group of training sequences that minimizes the mean square error of the estimate is determined. The advantages of the proposed technique are demonstrated through computer simulation.     

基于双中频并行采样的数字I/Q信号获取

针对大时宽带宽积信号模拟正交解调时难以工程实现的问题,提出了基于双中频并行采样的正交解调方法和结构。该方法和结构是模拟正交解调的推广,通过对包含相同回波信息的两路中频信号在特定时刻采样,以及对两采样序列作简单的符号转换来获取数字I/Q信号,解决了大时宽带宽积信号模拟正交解调时性能较差以及需要复杂的数字校正过程等问题,且易于工程实现与实时处理。误差分析表明,该方法和结构在大时宽带宽积信号时获取的数字I/Q信号性能优良。      

Cascaded Complex ADCs With Adaptive Digital Calibration for $I/Q$ Mismatch

A complex analog-to-digital converter (ADC) intended for digital intermediate frequency (IF) receiver applications digitizes analog signals at IFs with excellent power/bandwidth efficiency. However, it is vulnerable to mismatches between its in-phase and quadrature (I/Q) paths that can dramatically degrade its performance. The proposed solution mitigates I/Q mismatch effects using a complex sigma-delta (SigmaDelta) modulator cascaded with 9-bit pipeline converters in each of the I and Q paths. The quantization noise of the first stage complex modulator is eliminated using an adaptive scheme to calibrate finite-impulse response digital filters in the digital noise-cancellation logic block. Although low-pass SigmaDelta cascade ADCs are widely used because of their inherent stability and high-order noise shaping, the complex bandpass cascade architecture introduced herein maintains these advantages and doubles the noise shaping bandwidth. Digital calibration also reduces the effects of analog circuit limitations such as finite operational amplifier gain, which enables high performance and low power consumption with high-speed deep-submicrometer CMOS technology. Behavioral simulations of the complex SigmaDelta/pipeline cascade bandpass ADC using the adaptive digital calibration algorithm predict a signal-to-noise ratio (SNR) of 78 dB over a 20-MHz signal bandwidth at a sampling rate of 160 MHz in the presence of a 1% I/Q mismatch.     

A Low-Spurious Low-Power 12-bit 160-MS/s DAC in 90-nm CMOS for Baseband Wireless Transmitter

A low-spurious low-power 12-bit 160-MS/s digital to analog converter (DAC) for baseband wireless transmitter is proposed and demonstrated. Degenerated current switches are introduced and benefits of using them are discussed. Mismatch behavior under packaging-induced die stress is also presented. The mobility shift caused by package stress inherited from a thin-die is a dominant source of I/Q mismatch. A 2-channel I/Q DAC core consumes 4 mA with a 1.3/2.6 V dual supply. The 0.13 mm² I/Q DAC core fabricated in 90-nm digital CMOS process with a highly-integrated digital processor achieves 74 dB SFDR, 55 dB SNDR, and -73 dB THD for a 975 kHz sinusoid at 153.6 MS/s sample rate     

一种基于I/Q失配的辐射源指纹提取方法

针对现有的辐射源识别方法的不足,利用辐射源自身I/Q失配指纹特征的可检测、可重现、不变的特性,提出一种基于I/Q失配的新型射频指纹特征提取方法.该方法是一种基于信号空间的指纹特征提取方法,它需要对信号的信噪比进行估计.综合考虑,采用基于特征值分解的信噪比估计方法.实验仿真结果表明,在相同的信噪比条件下,基于I/Q失配的射频指纹特征提取方法比双谱、Hilbert-Huang变换信号特征提取方法具有更加优越的射频指纹识别性能.     

I/Q mismatch compensation using adaptive decorrelation in a low-IF receiver in 90-nm CMOS process

We present a single multiplier based adaptive I/Q mismatch compensation circuit for narrowband quadrature receivers. Adaptive decorrelation between I and Q channel data is used for correcting gain and phase mismatches. Adaptation step size is computed from L/sub 1/-norm inverse power measurement and a gear-shifting mechanism is used that allows fast initial convergence and slow adaptation on actual burst data. Image rejection ratio in excess of 50 dB is reported for GSM receiver after compensation allowing the receiver to use IF frequencies higher than half of the channel bandwidth. The presented mismatch compensation circuit is implemented as part of a single-chip GSM wireless transceiver fabricated in a 90-nm digital CMOS process. The presented techniques are, however, equally applicable to other narrowband packet-based applications.