Effect of arsenic implantation on electrical characteristics ofLPCVD WSi2/n-Si Schottky contacts

Electrical characteristics of As-implanted low-pressure chemical vapor deposition (LPCVD) WSi₂/n-Si Schottky barriers are reported. It is shown that As implantation results in a significant Schottky-barrier lowering and an increase in the diode ideality factor n. Silicide annealing prior to As implantation is more effective in reducing Schottky-barrier height. Nearly ohmic characteristics were obtained for As-implanted LPCVD WSi₂ Schottky barriers. Arsenic implanted into high-temperature annealed silicide films was more effective in reducing the effective Schottky-barrier height. Detailed SIMS analysis indicated higher As concentration at the silicide/silicon interface when implanted into high-temperature-annealed silicide films     

Electrical characterization of ultra-shallow junctions formed bydiffusion from a CoSi2 layer

Ultra-shallow p⁺/n and n⁺/p junctions were fabricated using a Silicide-As-Diffusion-Source (SADS) process and a low thermal budget (800-900°C). A thin layer (50 nm) of CoSi₂ was implanted with As or with BF₂ and subsequently annealed at different temperatures and times to form two ultra-shallow junctions with a distance between the silicide/silicon interface and the junction of 14 and 20 nm, respectively. These diodes were investigated by I-V and C-V measurements in the range of temperature between 80 and 500 K. The reverse leakage currents for the SADS diodes were as low as 9×10 ^-10 A/cm² for p⁺/n and 2.7×10^-9 A/cm² for n⁺/p, respectively. The temperature dependence of the reverse current in the p ⁺/n diode is characterized by a unique activation energy (1.1 eV) over all the investigated range, while in the n⁺/p diode an activation energy of about 0.42 eV is obtained at 330 K. The analysis of the forward characteristic of the diodes indicate that the p⁺ /n junctions have an ideal behavior, while the n⁺/p junctions have an ideality factor greater than one for all the temperature range of the measurements. TEM delineation results confirm that, in the case of As diffusion from CoSi₂, the junction depth is not uniform and in some regions a Schottky diode is observed in parallel to the n⁺/p junction. Finally, from the C-V measurements, an increase of the diodes area of about a factor two is measured, and it is associated with the silicide/silicon interface roughness     

Surface and interface properties of PdCr/SiC Schottky diode gas sensor annealed at 425°C

The surface and interface properties of Pd_0.9Cr_0.1/SiC Schottky diode gas sensors both before and after annealing are investigated using Auger electron spectroscopy (AES), scanning electron microscopy (SEM), and energy dispersive spectroscopy (EDS). At room temperature the alloy reacted with SiC and formed Pd_xSi only in a very narrow interfacial region. After annealing for 250 h at 425°C, the surface of the Schottky contact area has much less silicon and carbon contamination than that found on the surface of an annealed Pd/SiC structure. Palladium silicides (Pd_xSi) formed at a broadened interface after annealing, but a significant layer of alloy film is still free of silicon and carbon. The chromium concentration with respect to palladium is quite uniform down to the deep interface region. A stable catalytic surface and a clean layer of Pd_0.9Cr_0.1 film are likely responsible for significantly improved device sensitivity.     

Formation of cobalt silicided shallow junction using implantinto/through silicide technology and low temperature furnace annealing

This work investigates the shallow CoSi₂ contacted junctions formed by BF₂⁺ and As⁺ implantation, respectively, into/through cobalt silicide followed by low temperature furnace annealing. For p⁺n junctions fabricated by 20 keV BF₂⁺ implantation to a dose of 5×10¹⁵ cm^-2, diodes with a leakage current density less than 2 nA/cm² at 5 V reverse bias can be achieved by a 700°C/60 min annealing. This diode has a junction depth less than 0.08 μm measured from the original silicon surface. For n⁺p junctions fabricated by 40 keV As⁺ implantation to a dose of 5×10¹⁵ cm^-2, diodes with a leakage current density less than 5 nA/cm² at 5 V reverse bias can be achieved by a 700°C/90 min annealing; the junction depth is about 0.1 μm measured from the original silicon surface. Since the As⁺ implanted silicide film exhibited degraded characteristics, an additional fluorine implantation was conducted to improve the stability of the thin silicide film. The fluorine implantation can improve the silicide/silicon interface morphology, but it also introduces extra defects. Thus, one should determine a tradeoff between junction characteristics, silicide film resistivity, and annealing temperature     

Dual metal SiC Schottky rectifiers with low power dissipation

Nickel and titanium are the most commonly used metals for Schottky barrier diodes on silicon carbide (SiC). Ti has a low Schottky barrier height (i.e. 0.8 eV on 6H-SiC), whilst Ni has a higher barrier (i.e. 1.25 eV). Therefore, the first metal allows to achieve a low forward voltage drop V_F but leads to a high leakage current. On the other hand, the second one presents the advantage of a lower reverse leakage current but has also a high value of V_F. In this work, dual-metal-planar (DMP) Schottky diodes on silicon carbide are reported. The rectifying barrier was formed by using an array of micrometric Ti and Ni₂Si (nickel silicide) stripes. This low/high Schottky barrier allowed to combine the advantages of the two metals, i.e. to fabricate diodes with a forward voltage drop close to that of a Ti diode and with a level of reverse current comparable to that of a Ni₂Si diode. Under the application point of view, using this kind of barrier can lead to a reduction of the device power dissipation and an increase of the maximum operating temperature.     

Silicide/strained Si1-xGex Schottky-barrierinfrared detectors

By employing a thin silicon sacrificial cap layer for silicide formation, the authors successfully demonstrated Pd₂Si/strained Si_1-xGe_x Schottky-barrier infrared detectors with extended cutoff wavelengths. The sacrificial silicon eliminates the segregation effects and Fermi level pinning which occur if the metal reacts directly with Si_1-x Ge_x alloy. The Schottky barrier height of the silicide/strained Si_1-xGe_x detector decreases with increasing Ge fraction, allowing for tuning of the detector's cutoff wavelength. The cutoff wavelength was extended beyond 8 μm in PtSi/Si _0.85Ge_0.15 detectors. It is shown that high quantum efficiency and near-ideal dark current can be obtained from these detectors     

Schottky Barrier Characteristics of Cobalt–Nickel Silicide/n-Si Junctions for Scaled-Si CMOS Applications

Ternary cobalt–nickel silicide/n-Si Schottky diodes have been fabricated by sputtering using an equiatomic cobalt–nickel alloy target. A minimum sheet resistivity of the ternary silicide is found to be 5–7 $Omega / hbox{sq}$. Grazing-incidence X-ray diffraction shows the formation of ternary silicide phases. Cross-sectional TEM micrograph shows a fairly uniform diffusion of metals into Si with the formation of fully silicided film. Selected-area electron diffraction pattern exhibits the crystalline nature of the silicide layer. Temperature-dependent electrical current–voltage measurements have been used to characterize an optimized Schottky diode formed by annealing at 450 $^{circ}hbox{C}$. The room-temperature barrier height and ideality factor are found to be 0.656 eV and 1.6, respectively, from the $I$ –$V$ characteristics. The series resistance of the diode has been calculated and is found to be 1–11.8 $hbox{k}Omega$ . The variation of barrier height has been attributed to the inhomogeneity in Schottky junction.      

Electrical characteristics of TiB2 for ULSI applications

The work function of TiB₂ was measured using Fowler-Nordheim tunneling in MOS capacitors, Schottky diode current measurements, capacitance-voltage techniques, and contact resistance. The resulting data place the Fermi level of TiB₂ about 0.9 eV below the silicon conduction band. Given this barrier height, Schottky diodes of TiB₂/p-Si exhibit ohmic characteristics, but the contact resistance of TiB₂ to n⁺ junctions is an order of magnitude higher than the generally desired value. Boron outdiffusion from TiB₂ into underlying silicon was observed at temperatures of 1000°C and greater. Boron diffusion from TiB₂ into silicon above 1000°C is enhanced compared to the conventionally accepted value of the boron diffusivity     

A MoSi2Schottky diode for bipolar LSI's

Fabrication and characterization of a molybdenum silicide Schottky diode have been investigated for its application to large-scale bipolar logic LSI's using a Schottky TTL. The diode consists of a silicon     

The effect of pulsed laser annealing on the nickel silicide formation

The pulsed laser annealing (PLA) is used to assist nickel silicide transformation for Schottky barrier height reduction and tensile strain enhancement and the effect of different laser power are investigated. In this report, a two-step annealing process which combine the conventional rapid thermal annealing with pulsed laser annealing is proposed to achieve a smooth silicon-rich NiSi_x interfacial layer on (1 0 0) silicon. With optimized laser energy, a 0.2 eV Schottky barrier height (SBH) modulation is observed from Schottky diode electrical characterization. Furthermore, PLA provides sufficient effective temperature during silicidation which also lead to increased tensile stress of silicide film than the two-step RTA silicide is also investigated. The SBH modulation and tensile stress enhancement benefits of PLA silicidation are considered as an alternative to the conventional rapid thermal annealing for ultra-scaled devices performance enhancement.     

Electrical and chemical characterization ofW1-x-ySixNy (0⩽x⩽0.42,0⩽y⩽0.30) Schottky diodes for self-aligned gate GaAsMESFETs

WSiN Schottky diodes on GaAs have been electrically and chemically characterized for atomic silicon and nitrogen; compositions of 0 to 42% and 0 to 28%, respectively. It is found that the main cause for Schottky diode degradation, after high temperature annealing, is the out-diffusion of As from GaAs. For films with atomic nitrogen composition of ⩾5%, As outdiffusion is eliminated as long as the atomic Si composition is ⩽40%. WN films (5% nitrogen) were applied to the fabrication of self-aligned gate lightly doped drain MESFET's with buried P layer. A maximum transconductance, g_m, of 370 mS/mm, f_T of 33 GHz, and DCFL inverter delay of 29 ps are measured for a 0.5 μm gate technology     

Effect of fluorine incorporation on the thermal stability ofPtSi/Si structure

It was observed that the fluorine incorporation from ion implantation improved the high-temperature stability of a PtSi/Si structure. The optimum implantation energy was determined to be the energy at which the maximum percentage of the as-implanted fluorine ion locates at the PtSi/Si interface region. SIMS analysis shows that the fluorine atom piles up at the PtSi/Si interface. XPS analysis indicates that the fluorine atoms at the PtSi/Si interface are bonded to the silicon atoms in a form of SiF₂ or SiF₃. A fluorine-buffer model is proposed to explain the effect of fluorine incorporation. It is postulated that the Si-F layer acts as a buffer layer to change the PtSi/Si interface energy and preserve the integrity of the silicide layer at high temperature. Fluorinated Schottky junctions were fabricated and the electrical characteristics show that the sustainable process temperature can be improved from 650°C for the unfluorinated junctions to higher than 800°C for the fluorinated junctions     

Process investigations for a 30-GHz fT submicrometerdouble poly-Si bipolar technology

Major process issues are investigated to establish a manufacturable process for a 30-GHz f_T deep-trench isolated submicrometer double polysilicon bipolar technology. A thinner deep-trench surface oxide minimizes crystal defects generated by thermal stresses during the subsequent processes, and significantly improves collector-to-emitter leakage currents in npn transistors. The effects of reactive-ion-etch (RIE) process used for the base surface oxide etch are evaluated in terms of current gain, emitter resistance, and cutoff frequency of the npn transistors. Silicon surface roughness created by an RIE process produces a nonuniform interface oxide film between the emitter polysilicon and the silicon surface, which results in a lower current gain due to a retardation of arsenic diffusion from the emitter polysilicon through the unbroken thicker portion of the interface oxide film. Lateral pnp transistors and Schottky diodes using a vanadium silicide are characterized as a function of epitaxial layer thickness. Schottky diodes are integrated with high performance npn transistors without using extra photo-masking process steps. The reverse leakage currents of Schottky diodes fabricated by using an RIE process are acceptable for practical use in circuits. A planarization process is investigated by employing an RTA reflow of BPSG films deposited in an LPCVD furnace. The maximum RTA reflow temperature is limited to 1000°C in order to maintain an acceptable integrity of TiSi₂ layer formed on top of the n+ polysilicon layer. The planarity achieved by an RTA reflow at a temperature between 975°C and 1000°C is acceptable for double polysilicon bipolar integrated circuits using metal interconnects produced by an electroplated gold process     

Electrical characteristics of nickel silicide–silicon heterojunction in suspended silicon nanowires

Electronic characteristics of silicide/silicon interface were studied in the suspended, chemically synthesized silicon nanowires (SiNWs). Step-by-step intrusion of a silicide/Si interface along the axial direction of a suspended silicon nanowire was performed by repeated thermal annealing cycles, and the current-voltage (I-V) characteristics of the annealed silicide/SiNW/silicide structure were measured at each cycle. The intruded length of the silicide was found to be directly proportional to the total annealing time, but the rate of silicidation was much smaller than previous works on similar silicide/SiNWs. A structural kink with Ni atoms diffused along the sidewall created a secondary source of silicidation, resulting in anomalous I-V characteristics. The measured I-V including this unintentional silicidation in the Si channel was explained by various combinations of Schottky barriers and resistors.     

Analysis of I–V measurements on PtSi-Si Schottky structures in a wide temperature range

I–V Measurements on PtSi-Si Schottky structures in a wide temperature range from 90 to 350 K were carried out. The contributions of thermionic-emission current and various other current-transport mechanisms were assumed when evaluating the Schottky barrier height Φ₀. Thus the generation-recombination, tunneling and leak currents caused by inhomogeneities and defects at the metal-semiconductor interface were taken into account.

Taking the above-mentioned mechanisms and their temperature dependence into consideration in the Schottky diode model, an outstanding agreement between theory and experiment was achieved in a wide temperature range.

Excluding the secondary current-transport mechanisms from the total current, a more exact value of the thermionic-emission saturation current I_te and thus a more accurate value ofΦ_b was reached.

The barrier height Φ_b and the modified Richardson constant A^** were calculated from the plot of thermionic-emission saturation current I_te as a function of temperature too. The proposed method of finding Φ_b is independent of the exact values of the metal-semiconductor contact area A and of the modified Richardson constant A^**. This fact can be used for determination of Φ_b in new Schottky structures based on multicomponent semiconductor materials.

Using the experimentally evaluated value A^** = 1.796 × 10⁶ Am⁻²K⁻² for the barrier height determination from I–V characteristics the value of Φ_b = 0.881 ± 0.002 eV was reached independent of temperature.

The more exact value of barrier height Φ_b is a relevant input parameter for Schottky diode computer-aided modeling and simulation, which provided a closer correlation between the experimental and theoretical characteristics.     

Al/TiSi_2/Si系统与肖特基势垒二极管的热稳定性

本文用x射线衍射及I—V测量法研究了Al/TiSi_2/Si系统热稳定性及肖特基势垒特性。热稳定性的研究结果表明;系统在550℃以下退火是热稳定的;在更高的温度下退火,Al开始与TiSi_2起反应,形成了(Ti_7Al_5)Si-(12)三元化合物。在进行电特性研究时,发现系统在450℃退火时,Al已渗透TiSi_2而使肖特基势垒二极管失效。     

One micrometre scale self-aligned cobalt disilicide Schottkybarrier diodes

CoSi₂/n-type silicon(111) Schottky barrier diodes on a 1 μm scale have been fabricated using a self-aligned silicide process incorporating magnetron sputtering and rapid thermal processing, in an industrial environment. Anneal temperatures in the range 700-1100°C have been used, and ideality factors of 1.06-1.07 were obtained in the range 700-900°C with larger values for higher temperatures. The consistency in the values of the ideality factor indicates that a wide annealing temperature window exists for the successful fabrication of CoSi₂/silicon diodes     

Thermal instability of Schottky diode barrier heights modified by inert ion sputter-etching damage

The barrier height of Schottky diodes made to dry-etched silicon surfaces differs from those fabricated on wet chemically etched silicon. Some have suggested utilization of this phenomenon to yield diodes for VLSI applications that display barrier enhancement to p-type silicon and barrier reduction to n-type silicon together with good diode ideality factors; however, it is shown here that the modified barrier heights can be dramatically unstable even when exposed to relatively low-temperature cycling, thus rendering this technique of enhancing the barrier height to p-type silicon and reducing the barrier height to n-type silicon inappropriate for conventional VLSI fabrication. It is hypothesized that the barrier instability is due to a localized silicide reaction or surface reconstruction occurring at the metal/silicon interface.     

Novel Nickel Silicide Contact Technology Using Selenium Segregation for SOI N-FETs With Silicon–Carbon Source/Drain Stressors

We explore a novel silicide contact technology for effective Schottky barrier height Phi_Bn and contact resistance reduction, which is compatible with an advanced silicon-carbon (Si_1-xC_x) source/drain (S/D) stressor technology. The new silicide contact technology incorporates selenium (Se) that is coimplanted with S/D dopants into the silicon-carbon S/D prior to nickel silicidation, leading to the segregation of Se at the NiSi:C/n-Si_0.99 C_0.01 interface and the achievement of excellent ohmic contact characteristics. We demonstrate that the Se-coimplantation process contributes to a 23% drive current enhancement in a strained silicon-on-insulator n-MOSFET. The enhancement is attributed to the decrease of external series resistance which is primarily due to the reduction of silicide contact resistance.     

Characteristics of Ni/SiC Schottky diodes grown by ICP-CVD

A Ni/SiC Schottky diode was fabricated with an α-SiC thin film grown by the inductively coupled plasma chemical vapor deposition, ICP-CVD method on a (1 1 1) Si wafer. The α-SiC film was grown on a carbonized Si layer that the Si surface had been chemically converted to a very thin SiC layer by the ICP-CVD method at 700 °C. To reduce defects between the Si and α-SiC, the surface of the Si wafer is slightly carbonized. The film characteristics of α-SiC were investigated by employing TEM and FT-IR. A sputtered Ni thin film was used for the anode metal. The boundary status of the Ni/SiC contact was investigated by AES as a function of annealing temperature. It is shown that the ohmic contact could be acquired below 1000 °C annealing temperature. The forward voltage drop of the Ni/α-SiC Schottky diode is 1.0 V at 100 A/cm². The breakdown voltage is 545 V which is five times larger than the ideal breakdown voltage of a silicon device. Also, the dependence of barrier height on temperature was observed.