A Multistage Interleaved Synchronous Buck Converter With Integrated Output Filter in 0.18 μm SiGe Process

The design and analysis of a fully integrated multistage interleaved synchronous buck dc-dc converter with on-chip filter inductor and capacitor is presented. The dc-dc converter is designed and fabricated in 0.18 mum SiGe RF BiCMOS process technology and generates 1.5 V-2.0 V programmable output voltage supporting a maximum output current of 200 mA. High switching frequency of 45 MHz, multiphase interleaved operation, and fast hysteretic controller reduce the filter inductor and capacitor sizes by two orders of magnitude compared to state-of-the-art converters and enable a fully integrated converter. The fully integrated interleaved converter does not require off-chip decoupling and filtering and enables direct battery connection for integrated applications. This design is the first reported fully integrated multistage interleaved, zero voltage switching synchronous buck converter with monolithic output filters. The fully integrated buck regulator achieves 64% efficiency while providing an output current of 200 mA.     

An improved topology of inductor-switching DC-DC converter

An improved version of an inductor-switching fast-response dc-dc converter is presented that will provide the requirements and features of the new generation of microprocessor and digital systems. Lower output voltage, higher output current, and smaller output voltage ripple requirements have greatly increased the difficulty of the power supply design. To further increase the problem, power-saving "stop-clock" modes of the microprocessor has demanded faster and more stable transient response from the dc-dc converter. A novel method of inductor switching is applied to a dc-dc converter, and it provides the prominent features of current amplification and absorption during the heavy burden of load transients. The design and simulation of the concept is verified by experiment with a 12-V input and 3.3-V/30-A output converter.     

A 0.9-V Input Discontinuous-Conduction-Mode Boost Converter With CMOS-Control Rectifier

A 0.9-V input discontinuous-conduction-mode (DCM) boost converter delivering 2.5-V and 100-mA output is presented. A novel low-voltage pulse-width modulator is proposed. The modulator can be directly powered from the 0.9-V input instead of using the 2.5-V output as in general modulator designs. Sophisticated low-voltage analog blocks, which normally consume a large amount of power and chip area, are not required in the modulator. The impact of output-voltage ripple and transient-induced output-voltage perturbation on the operation of analog blocks inside the modulator is eliminated. Boost converter start-up sequence is also greatly simplified. A CMOS-control rectifier (CCR) is also proposed to improve converter power efficiency. The CCR is used to replace the conventional rectifying switch to provide adaptive dead-time, which helps to minimize charge-sharing loss and body-diode conduction loss. Corresponding thermal stress on the rectifying switch is hence minimized. The CCR also enables the use of small off-chip inductor and capacitor at sub-MHz switching frequency to improve light-load efficiency. This converter has been implemented in a 0.35- $mu$m CMOS process. It is designed to operate at ${sim}$ 667 kHz with a 1 $mu$ H inductor and 4.7 $mu$ F output capacitor to reduce both switching loss and form factor. Experimental results prove that the converter can be directly powered from 0.9-V input with ${sim}$ 85% efficiency at 100-mA output.      

Analysis and Design for a New ZVS DC–DC Converter With Active Clamping

A new zero voltage switching (ZVS) boost converter is presented in this paper. By using an auxiliary switch and a capacitor, ZVS for all switches is achieved with an auxiliary winding in one magnetic core. A small diode is added to eliminate the voltage ringing across the main rectifier diode. This clamping technique can also be utilized in other dc-dc converters, and a family of new ZVS dc-dc converter is derived. A prototype (500 W/193 kHz) is made to verify the theoretical analysis. The efficiency is higher than 94% at 90-V input at full load     

A Single Phase Voltage Regulator Module (VRM) With Stepping Inductance for Fast Transient Response

A single-phase fast transient converter topology with stepping inductance is proposed. The stepping inductance method is implemented by replacing the conventional inductor in a buck converter by two inductors connecting in series. One has large inductance and the other has small inductance. The inductor with small inductance will take over the output inductor during transient load change and speed up dynamic response. In steady state, the large inductance takes over and keeps a substantially small ripple current and minimizes root mean square loss. It is a low cost method applicable to converters with an output inductor. A hardware prototype of a 1.5-V dc-dc buck converter put under a 100-A transient load change has been experimented upon to demonstrate the merit of this approach. It also serves as a voltage regulator module and powers up a modern PC computer system     

Dual-bridge DC-DC converter: a new topology characterized with no deadtime operation

Two new topologies characterized by no deadtime and small valued filter inductor, the Dual-Bridge dc-dc converter and the Dual-Bridge dc-dc converter with ZVS, are presented and analyzed. Compared to the conventional Full-Bridge converter, the dc-dc converters with the proposed topologies have lower input current ripple, less stress on power switching components and smaller output filter inductor. Simple self-driven synchronous rectification can be used in the new topologies for high efficiency implementation. Prototype dc-dc converters have been tested for the verification of the principles. Both simulations and experiments verify the feasibility and advantages of the new topologies. The advantages and disadvantages of the topologies are discussed.     

Low Profile Integratable Inductor Fabricated Based on LTCC Technology for Microprocessor Power Delivery Applications

A novel low profile power inductor suitable for planar integration is designed and fabricated based on low temperature co-fired ceramics technology for microprocessor power delivery applications. The inductor was designed to operate at a switching frequency of 4 to 5MHz, carrying a nominal dc current of 20A with a ripple current of 8 to 10A in a 5-V to 1-V dc-dc converter. The design and fabrication procedure is discussed in this paper, followed by small signal measurement and magnetic characterization results. The inductor was implemented in a prototype converter and the large signal measurement results are presented and its performance evaluated     

A Bidirectional DC–DC Converter for an Energy Storage System With Galvanic Isolation

This paper addresses a bidirectional dc-dc converter suitable for an energy storage system with an additional function of galvanic isolation. An energy storage device such as an electric double layer capacitor is directly connected to a dc side of the dc-dc converter without any chopper circuit. Nevertheless, the dc-dc converter can continue operating when the voltage across the energy storage device drops along with its discharge. Theoretical calculation and experimental measurement reveal that power loss and peak current impose limitations on a permissible dc-voltage range. This information may be useful in design of the dc-dc converter. Experimental results verify proper charging and discharging operation obtained from a 200-V, 2.6-kJ laboratory model of the energy storage system. Moreover, the dc-dc converter can charge the capacitor bank from zero to the rated voltage without any external precharging circuit.     

A single-stage power-factor-correction converter with simple linkvoltage suppressing circuit (LVSC)

A single-stage power-factor-correction AC/DC converter with a simple link voltage suppressing circuit (LVSC) for the universal line application is proposed. A portion of the energy charged in a boost inductor is directly transferred to a load via LVSC without passing the link capacitor. Using simple circuitry, a low link voltage can be realized without input current deadbands at line zero crossings. The proposed converter is analyzed and design guidelines for the proper operation of a converter are given. A universal input (90-265-V_rms ) prototype converter with 5-V 12-A output is implemented to verify performance. The experimental results show that the maximum link voltage stress and efficiency are about 447 V and 81%, respectively. The power factor is above 0.96 under the universal line condition when the load is higher than 30%     

DC-DC converter: four switches V/sub pk/=V/sub in//2, capacitive turn-off snubbing, ZV turn-on

A new four-switch full-bridge dc-dc converter topology is especially well-suited for power converters operating from high input voltage: it imposes only half of the input voltage across each of the four switches. The two legs of a full-bridge converter are connected in series with each other, across the dc input source, instead of the usual topology in which each leg is connected across the dc source. The topology reduces turn-off switching losses by providing capacitive snubbing of the turn-off voltage transient, and eliminates capacitor-discharge turn-on losses by providing zero-voltage turn-on. (Switching losses are especially important in converters operating at high input voltage because turn-on losses are proportional to the square of the input voltage, and turn-off losses are proportional to the input voltage). The topology is suitable for resonant and nonresonant converters. It adds one bypass capacitor and one commutating inductor to the minimum-topology full-bridge converter (that inductor is already present in many present-day converters, to provide zero-voltage turn-on, or is associated with one or two capacitors to provide resonant operation), and contains a dc-blocking capacitor in series with the output transformer, primary winding, and some nonresonant converters (that capacitor is already present in resonant power converters). The paper gives a theoretical analysis, and experimental data on a 1.5-kW example that was built and tested: 600-Vdc input, 60-Vdc output at up to 25A, and 50-kHz switching frequency. The measured performance agreed well with the theoretical predictions. The measured efficiency was 93.6% at full load, and was a maximum of 95.15% at 44.8% load.     

单片集成直流-直流转换器的效率提高方法

采用SMIC 0.13μm CMOS工艺,设计实现了开关频率达到250 MHz,单片集成的降压型电源转换器。为了提高电源转换效率,该转换器中的片上电感采用非对称性设计方法,提高了电感的品质因数。采用了高密度片上滤波电容来稳定输出电压,同时对单位电容尺寸的优化设计减小了电容的等效串联电阻以及输出电压纹波。测试结果表明,芯片输入电压为3.3 V,当输出2.5 V电压时,峰值效率达到了80%,最大输出电流达到270 mA;当输出1.8 V电压时,峰值效率达到了70%,最大输出电流达到400 mA。     

An integrated one-cycle control buck converter with adaptive output and dual loops for output error correction

An integrated adaptive-output switching converter is presented. This converter adopts one-cycle control for fast line response and dual error correction loops for tight load regulation. A dc level shifting technique is proposed to eliminate the use of negative supply and reference voltages in the controller and make the design compatible with standard digital CMOS process. The design accommodates both continuous and discontinuous conduction operations. To further enhance the efficiency, dynamic loss control on the power transistors is proposed to minimize the sum of switching and conduction losses. The design can be extended to other dc-dc and ac-dc conversions. The prototype of the buck converter was fabricated with a standard 0.5-/spl mu/m digital CMOS process. Experimental results show that the converter is well regulated over an output range of 0.9-2.5 V, with a supply voltage of 3.3 V. The tracking speeds are 12.25 /spl mu/s/V for a 1.6-V step-up output change and 13.75 /spl mu/s/V for a 1.6-V step-down output change, respectively, which are much faster than existing counterparts. Maximum efficiency of 93.7% is achieved and high efficiency above 75% is retained over an output power ranging from 10 to 450 mW.     

A Digital Current-Mode Control Technique for DC–DC Converters

The objective of this paper is to propose a simple digital current mode control technique for dc-dc converters. In the proposed current-mode control method, the inductor current is sampled only once in a switching period. A compensating ramp is used in the modulator to determine the switching instant. The slope of the compensating ramp is determined analytically from the steady-state stability condition. The proposed digital current-mode control is not predictive, therefore the trajectory of the inductor current during the switching period is not estimated in this method, and as a result the computational burden on the digital controller is significantly reduced. It therefore effectively increases the maximum switching frequency of the converter when a particular digital signal processor is used to implement the control algorithm. It is shown that the proposed digital method is versatile enough to implement any one of the average, peak, and valley current mode controls by adjustment of the sampling instant of the inductor current with respect to the turn-on instant of the switch. The proposed digital current-mode control algorithm is tested on a 12-V input and 1.5-V, 7-A output buck converter switched at 100kHz and experimental results are presented     

Area-efficient linear regulator with ultra-fast load regulation

We demonstrate a fully integrated linear regulator for multisupply voltage microprocessors implemented in a 90 nm CMOS technology. Ultra-fast single-stage load regulation achieves a 0.54-ns response time at 94% current efficiency. For a 1.2-V input voltage and 0.9-V output voltage the regulator enables a 90 mV/sub P-P/ output droop for a 100-mA load step with only a small on-chip decoupling capacitor of 0.6 nF. By using a PMOS pull-up transistor in the output stage we achieved a small regulator area of 0.008 mm/sup 2/ and a minimum dropout voltage of 0.2 V for 100 mA of output current. The area for the 0.6-nF MOS capacitor is 0.090 mm/sup 2/.     

Low cost high efficiency DC-DC converter for fuel cell powered auxiliary power unit of a heavy vehicle

In this paper, a new dc-dc converter for solid oxide fuel cell (SOFC) powered auxiliary power unit (APU) is proposed. The proposed converter does not consider the leakage inductance of the transformer as a parasite and uses it for energy transfer, thus avoiding problems of low efficiency and difficulty in control, caused by leakage inductance. The need for a separate filter inductor is also eliminated. Soft switching is done for some of the switches of the proposed converter, thereby further increasing the efficiency of the converter. Thus, the achieved low cost and high efficiency of the proposed converter make it suitable for SOFC powered APU applications. Simulation and experimental results are presented to verify the proposed dc-dc converter. The achieved cost and efficiency of the prototype are 50.8$/kW and 90%, respectively.     

An Improved Topology of SEPIC Converter With Reduced Output Voltage Ripple

An improved version of a single-ended primary inductor converter (SEPIC) is presented. The converter consists of a conventional SEPIC converter plus an additional high-frequency transformer and diode to maintain a freewheeling mode of the dc inductor currents during the switch on state. The voltage conversion ratio characteristics and semiconductor device voltage and current stresses are characterized. The main advantages of this converter are the continuous output current, smaller output voltage ripple, and lower semiconductors current stress compared with the conventional SEPIC converter. The design and simulation of the concept is verified by an experiment with a 48-V input and 12-V/3.75-A output converter.      

A High-Voltage DC–DC Converter With Vin/3—Voltage Stress on the Primary Switches

A high-voltage dc-dc converter with low voltage stress on the power switches and high output current capacity is presented. This converter exhibits three distinct features. First, the voltage stress on the primary switches is only one-third of the input voltage, so that switches of low voltage rating and thus of low on-resistance can be used. This leads to reduced conduction loss. Second, all the switches are soft-switched, so that the switching loss can be reduced. Third, the rectifier is a current tripler, so that the output current capacity, and thus the power handling capacity of the converter are increased. A 5.1-kW, 1000-V/48-V dc-dc converter prototype has been built and tested. Experimental results are favorably compared with theoretical predictions.     

High-Power Density Design of a Soft-Switching High-Power Bidirectional dc–dc Converter

A bidirectional dc-dc converter typically consists of a buck and a boost converters. In order to have high-power density, the converter can be designed to operate in discontinuous conducting mode (DCM) such that the passive inductor can be minimized. The DCM operation associated current ripple can be alleviated by interleaving multiphase currents. However, DCM operation tends to increase turnoff loss because of a high peak current and its associated parasitic ringing due to the oscillation between the inductor and the device output capacitance. Thus, the efficiency is suffered with the conventional DCM operation. Although to reduce the turnoff loss a lossless capacitor snubber can be added across the switch, the energy stored in the capacitor needs to be discharged before device is turned on. This paper adopts a gate signal complimentary control scheme to turn on the nonactive switch and to divert the current into the antiparalleled diode of the active switch so that the main switch can be turned on under zero-voltage condition. This diverted current also eliminates the parasitic ringing in inductor current. For capacitor value selection, there is a tradeoff between turnon and turnoff losses. This paper suggests the optimization of capacitance selection through a series of hardware experiments to ensure the overall power loss minimization under complimentary DCM operating condition. According to the suggested design optimization, a 100-kW hardware prototype is constructed and tested. The experimental results are provided to verify the proposed design approach.     

Current-Fed Dual-Bridge DC–DC Converter

A new isolated current-fed pulsewidth modulation dc-dc converter-current-fed dual-bridge dc-dc converter-with small inductance and no deadtime operation is presented and analyzed. The new topology has more than 3times smaller inductance than that of current-fed full-bridge converter, thus having faster transient response speed. Other characteristics include simple self-driven synchronous rectification, simple housekeeping power supply, and smaller output filter capacitance. Detailed analysis shows the proposed converter can have either lower voltage stress on all primary side power switches or soft switching properties when different driving schemes are applied. A 48-V/125-W prototype dc-dc converter with dual output has been tested for the verification of the principles. Both simulations and experiments verify the feasibility and advantages of the new topology     

Small Signal Analysis of Energy Factor and Mathematical Modeling for Power DC–DC Converters

Mathematical modeling for power dc-dc converters is a historical problem accompanying dc-dc conversion technology since the 1940s. The traditional mathematical modeling is not available for complex structure converters since the differential equation order increases very high. We have to search for other ways to establish mathematical modeling for power dc-dc converters. We have defined energy factor (EF) and new mathematical modeling for power dc-dc converters that have attracted much attention in recent years. This paper describes the small signal analysis of EF and mathematical modeling for power dc-dc converters in continuous conduction mode and discontinuous conduction mode. EF and the subsequential parameters can illustrate the unit-step response and interference recovery. This investigation may be helpful for system design and dc-dc converters characteristics. Two dc-dc converters: Buck converter and super-lift Luo-converter as the samples, are analyzed in this paper to demonstrate the applications of EF, pumping energy, stored energy (SE), capacitor/inductor SE ratio, energy losses, time constant tau, and damping time constant tau_d