An optically-coupled high-voltage p-n-p-n crosspoint array

A solid-state crosspoint array compatible with electromechanical switches has been developed in order to realize high-performance telephone exchange networks. The optically-coupled high breakover voltage crosspoint array discussed in this paper has achieved complete isolation of the speech path from the triggering circuit while it can be triggered directly by a transistor-transistor logic (TTL) level signal from the control circuit. The crosspoint array has a unique photo-coupling structure which allows four p-n-p-n elements to be triggered effectively by only one LED, maintaining up to 200 V/0.1 /spl mu/s dv/dt characteristics. It provides breakover voltage of up to 450 V, gate trigger LED current less than 20 mA, ON-state resistance within 4.5 /spl Omega/ and OFF-state capacitance less than 7 pF. The matrix arrangement is a 1/spl times/4 configuration; it is composed of a two wire bidirectional circuit and packaged in a 16-pin ceramic DIP. These device characteristics make possible the realization of solid-state crosspoint array practically compatible with the conventional electromechanical switch, particularly meeting requirements of miniaturization, low-power dissipation, and inexpensive construction. Accordingly, direct interface with conventional telephone sets is possible.     

TORUS-switch: a scalable internal speed-up ATM switch architectureand its 5 Gbit/s switch LSI

A high speed and scalable ATM switch architecture, the TORUS-switch, is proposed. The switch is an internal speed-up crosspoint switch with cylindrical configuration. The self-bit-synchronisation technique is adopted to achieve high speed cell transmission without requiring high-density implementation technology. Distributed contention control based on the fixed output-precedence scheme is adopted. This control is so simple that the control circuit is achieved with only one gate in each crosspoint. A TORUS-switch is fabricated as an ultrahigh speed crosspoint LSI using the advanced Si-bipolar process. Measured results confirm that the TORUS-switch can be used to realise an expandable terabit-rate ATM switch that is also efficient     

Low power CML IC crosspoint switch matrix for space division digital switching networks

Describes a crosspoint switch matrix which is constructed from CML gates for digitized video signals and p-n-p n-p-n transistor type holding circuits that hold the ON or OFF state of the CML gates. This holding circuit cuts off the power of the unselected crosspoints to reduce the total power dissipation of the switch matrix circuit. The CML IC crosspoint switch, with a 4/spl times/4 matrix size, is fabricated on a single chip. Dynamic test of the subsystem, in which fabricated switch matrices are connected in cascade stages, has indicated that it is applicable to high speed space division digital switching networks.     

Bufferless broadcasting: a low power distributed circuit techniquefor broadcasting 10-Gb/s chip input signals

Bufferless distributed circuit (BDC) broadcasting is proposed as a technique for broadcasting high-speed chip input signals to a series of on-chip destination cells as needed in crosspoint switch, parallel multiplier, distributed amplifier, etc., chip designs. In contrast with conventional techniques that use an on-chip buffer to assist broadcasting, BDC broadcasting offers the advantage of lower signal delay and power dissipation. In an experimental GaAs heterojunction bipolar transistor (HBT) 8×4 crosspoint switch assembly, BDC broadcasting was found to achieve a 40% power savings with little or no penalty in jitter or bit error rate performance at a 10-Gb/s data rate     

高灵敏度智能化光功率计

本文介绍国家“七五”重点攻关项目——高灵敏度智能化光功率计指标、系统框图及各部分的原理电路。     

TORUS: terabit-per-second ATM switching system architecture basedon distributed internal speed-up ATM switch

A high-speed and distributed ATM switch architecture, called the TORUS switch, is proposed with the aim of achieving a terabit-per-second ATM switching system. The switch is a distributed and scalable internal speed-up crossbar-type ATM switch with cylindrical structure. The self-bit-synchronization technique and optical interconnection technology are combined to achieve gigabit-rate cell transmission, where high-density implementation technologies such as multichip module technology are not required at all. Also, distributed contention control based on the fixed output-precedence scheme is newly adopted. This control is very suitable for high-speed devices because its circuit is achieved with only one gate in each crosspoint. A TORUS switch is fabricated as a 4×2 switch module using optical interconnection technology and very high-speed crosspoint LSIs, constructed using an advanced Si-bipolar process. Measured results confirm that the TORUS switch can be used to realize an expandable terabit-rate ATM switch     

18位高精度模数转换器FS511的原理和应用

介绍模数转换器FS511的主要性能参数、工作原理和引脚功能,给出了FS511的应用电路。FS511具有转换精度高,功耗低的特点。     

基于FPGA技术的位置反馈系统设计

介绍了基于FPGA器件的角度位置反馈电路的具体实现方法。阐述了以多极双通道旋转变压器为测量元件的位置处理电路转换和纠错的原理和方法。给出了以FPGA器件为核心的硬件设计,微机接口为PCI04总线。电路被应用于多种跟踪系统中。实践证明,其静、动态技术指标及性能理想,可广泛用于各种控制系统中。     

用于强流离子注入机的磁分析器电源设计

本文简要介绍了该电源的指标及电路．并详细论述了提高电源稳定度和可靠性的方法和措施，最后给出了测试结果和运行情况。     

全固态Bouncer调制器的设计

为改善调制器输出脉冲顶降,提出了一种基于绝缘栅双极晶体管串并联的全固态Bouncer调制器。介绍了全固态Bouncer调制器的基本原理和组成,分析了调制器工作过程,并给出了调制器工作时序关系;介绍了调制器Bouncer电路的设计,根据理论计算分析了影响电路参数的主要因素。文中设计的调制器要求输出脉冲电压50 kV,脉冲电流80 A,脉冲宽度1 ms,脉冲顶降小于1% 。根据调制器指标,分别给出了常规电容直接放电和Bouncer调制器的设计结果,并对Bouncer调制器进行了仿真,证实设计的全固态Bouncer调制器能够满足指标要求。     

A 2 Gb/s expandable space-division switching LSI and networkarchitecture for gigabit-rate broad-band circuit switching

An expandable space-division (SD) switch architecture and a bipolar circuit design for gigabit-per-second crosspoint-switch LSIs are described. An expandable 2-Gb/s 16×16 crosspoint switch LSI which employs a novel switch structure, a novel circuit design, and a super self-aligned process (SST-1A) is developed. A switching module and partial 1:n nonblock, full 1:1 nonblock switching network architecture are also presented. Using the LSI and the switching network architecture, an experimental 620-Mb/s network system is demonstrated     

音频压缩器工作原理及应用分析

依据现代电子技术理论,采用较常用的电路分析和实际电路测试等方法,研究了目前新型军用机载超短波电台的音频压缩器原理和应用,主要内容包括音频压缩器组成和基本工作原理、主要性能、在无线电通信中的作用以及典型应用分析。在此基础上得出了音频压缩器性能的优劣,将影响超短波电台主要战术指标——通信距离。     

A High-Speed Low-Voltage Phase Detector for Clock Recovery From NRZ Data

A novel topology of phase detector (PD) for applications in clock recovery systems from nonreturn-to-zero data is presented in this paper. The PD operates directly on the data stream, without requiring preprocessing, and behaves like a sampling-type PD, providing a sinusoidal phase characteristic. The triple-tail cell principle is exploited to obtain a circuit topology suitable to low-voltage high-speed applications, with a very simple structure and thus limited jitter generation. A model is proposed to understand circuit behavior and optimize its design. The PD has been used in a clock-and-data recovery circuit for 10-Gb/s optical communications, and measurements in agreement with SONET specifications are reported.     

KR-200T型高频开关电源的研制

为了满足通信系统对于200W三输出特殊规格开关电源的需要，研制成功了一款基于正激变换的KR-200T型高性能开关电源。文中对该研究成果作了基本总结，内容包括：该电源的技术规格、工作原理、元件选择、控制电路设计和测试结果等。     

The TAD Integrated Crosspoint Array-Application and Performance in Wescom's 501 EPABX

TAD is a mnemonic for threshold-activated diode or telephone access device. It was designed at Wescom for its new 501 telephone electronic private automatic branch exchange (EPABX). A single TAD is a composite p-n-p-n diode. 45 TAD's with associated exclusive path control have been integrated into a 5 × 9 monolithic crosspoint array and packaged in a 16-pin DIP. The 501 matrix is a 150 × 135 rectangular matrix comprising nine 7 × 11 in printed circuit boards with 50 DIP's per board. The significance of the TAD as a replacement for previously used crosspoint switches occurs due to its cost savings and size reduction. For a small EPABX, crosspoint minimization techniques using blocking and/or a multiple stage array are not needed, since a singlestage rectangular array is very practicable. Furthermore, the system architecture is simplified, which results in a further size and price savings for the basic system. The individual TAD is a two-port device which has common marking and transmission terminals. Insertion loss of a fired TAD is 0.1-0.2 dB when terminated in 600 Ω impedances. Voice frequency crosstalk isolation between adjacent paths exceeds 100 dB. Marking of the anode occurs by turning on a current source whose voltage changes from a quiescent 0 V to + 13 V dc while marking of the cathode occurs by activating a current sink whose terminating voltage linearly ramps from +15 V dc to +4 V dc. In a multiplestage application, definite available paths are selectable with a simple system control.     

Chaotic noise MOS generator based on logistic map

The Birkhoff's ergodic theorem (BET), bifurcation diagram (BD) and Lyapunov's exponent (LE) are used in order to design a chaotic noise generator that is governed by the logistic map (LM). For this, a MOS analog circuit that operates in the current-mode, which is based on translinear principle (TLP), is used. To iterate the transference function of this circuit and also to maintain the parameter control of the LM, a current amplifier has been used. The specifications of the design are obtained from the analysis of the model. The results demonstrate the correct operation of the circuit, even when a mismatching of 2% is considered between the devices that control the operation region. The statistical distribution of the output signal on the circuit is similar to uniform distribution and it is related with the parameter value that rules the transfer function of the circuit.     

Technology Aspects for System 12 Broadband ISDN

Although the enhancement of System 12, SEL's digital switching system, for ISDN services is virtually complete, further development work is being carried out to allow broadband switching for videophone services, videoconferencing, and the distribution of radio and television programs. This paper describes an appropriate approach to the evolution Of System 12 toward the broadband ISDN (B-ISDN), emphasizing the crosspoint and technology aspects of the broadband switch. Test results on a broadband switch VLSI circuit for 140 Mbit/s in a 2μm CMOS technology are presented.     

High-speed signal switching with a monolithic integrated p-i-n/amp/switch on indium phosphide

Operation of an optoelectronic integrated circuit which includes two p-i-n photodetectors, preamplifiers, a 2*2 crosspoint switch, and output buffers has been demonstrated. These circuits are fabricated in semi-insulating InP:Fe substrates by vapor-phase epitaxy and ion implantation using a planar horizontally integrated technology. Signals modulated at 150 MHz are shown to be switched at 15 MHz, with the circuits capable of detecting and passing data modulated at approximately 1 GHz.<>     

光纤电视监控系统中高性能遥控信号的实现

首先简要介绍了光纤电视监控系统中控制信号编解码的基本原理框图，然后比较详细地讨论了所用编解码芯片的特性，最后给出了实现高性能编解码的电路图。     

高端MOS管栅极驱动技术研究

高端MOS管驱动电路在高压输入大功率电源中被广泛应用。分析了高端MOS管的驱动原理,对影响高端MOS管驱动的各种因素进行了探讨,提出了适合高端MOS管驱动的基本方法。较全面地评估了传统的变压器驱动电路和自举驱动电路对高端MOS管驱动的影响,继而提出了适合高端MOS管驱动的线路结构,并采用该方案设计了一个实验电路。仿真和实验电路测试结果表明,设计电路满足要求。