Theory on resistance of m × n cobweb network and its application

A basic theorem of equivalent resistance between two arbitrary nodes in an m × n cobweb network in both finite and infinite conditions is discovered, and two conjectures on the equivalent resistance are proved in terms of the basic theorem. We built a tridiagonal matrix equation by means of network analysis and made a diagonalization method of matrix transformation and work out its explicit expressions. The new formulae obtained here can be effectively applied in complex impedance network, especially the formulation leads to the occurrence of resonances and a series of novel results in RLC (denote resistor, inductance and capacitance) network. These curious results suggest the possibility of practical applications to resonant circuits. Copyright © 2014 John Wiley & Sons, Ltd.     

Resistance and capacitance of 4 × n cobweb network and two conjectures

A classic problem in electric circuit theory studied by numerous authors over 160 years is the computation of the resistance between two nodes in a resistor network, yet some basic problem in m × n cobweb network is still not solved ideally. The equivalent resistance and capacitance of 4 × n cobweb network are investigated in this paper. We built a quaternion matrix equation and proposed the method of matrix transformations in terms of the network analysis. We proposed a brief equivalent resistance formula and find that the equivalent resistance is expressed by cos(kπ/9) in a series of strict calculation. Meanwhile, an equivalent resistance of infinite networks is gained. Using the inverse mapping relation between capacitance parameters and resistance parameters, the equivalent capacitance formula is also given for the 4 × n capacitance cobweb network. By analyzing and comparing the equivalent resistances of the 1 × n, 2 × n, 3 × n and 4 × n cobweb networks, two conjectures on the equivalent resistance and capacitance of the m × n cobweb network are proposed. Copyright © 2013 John Wiley & Sons, Ltd.     

Application of the recursion‐transform method in calculating the equivalent resistance of two‐dimensional finite resistor network

Looking for a handy and exact calculation for the equivalent resistance of an M × N resistor network is important but difficult, even for the rectangular resistor network. In this paper, we calculate the equivalent resistance of an M × N rectangular resistor network by means of the recursion‐transform method, where the idea of multiple external current sources based on the typical mesh current is used, and find a new formula of equivalent resistance which is different from the result of the other paper. In our scheme, recalculations are not required to obtain the equivalent resistance between different terminals. We further investigate how the order of resistor network and the ratio between two unit resistances affect the equivalent resistance. We find that the equivalent resistance between arbitrary terminals tends to a constant as the order and ratio increase when M is given. Copyright © 2016 John Wiley & Sons, Ltd.     

Resistance formulae of a multipurpose n‐step network and its application in LC network

We consider a multipurpose n‐step network with cross resistors that is a profound problem that has not been resolved before. This network contains a number of different types of resistor network model. This problem is resolved by three steps: First of all, we simplify a complex graphics into a simple equivalent model; next, we use Kirchhoff's laws to analyse the network and establish a nonlinear difference equation; and finally, we construct the method of equivalent transformation to obtain the general solution of the nonlinear difference equation. In this paper, we created a new concept of negative resistance for the needs of the equivalent conversion and obtain two general resistance formulae of a multipurpose ladder network of cross resistors. As applications, several interesting specific results are produced. In particular, an n‐step impedance LC network is discussed. Our method and the results are suitable for the research of complex impedance network as well. Copyright © 2017 John Wiley & Sons, Ltd.     

Finite‐time H ∞ filtering for a class of discrete‐time Markovian jump systems with partly unknown transition probabilities

This paper is concerned with the problem of finite‐time H _∞ filtering for a class of Markovian jump systems subject to partial information on the transition probabilities. By introducing some slack matrix variables in terms of probability identity, a less conservative bounded real lemma is derived to ensure that filtering Markovian jump systems is finite‐time stable. Finally, the existence criterion of the desired filter is obtained such that the corresponding filtering error system is finite‐time bounded with a guaranteed H _∞ performance index. An example is given to illustrate the efficiency of the proposed method. Copyright © 2013 John Wiley & Sons, Ltd.     

Robust H ∞ filtering for a class of uncertain stochastic hybrid neutral systems with time‐varying delay

This paper is devoted to the problem of robust H _∞ filtering for a class of uncertain switched neutral systems subject to stochastic disturbance and time‐varying delay. Attention is focused on the design of a full‐order switched filter such that the filtering error system is robust mean‐square exponentially stable with a prescribed weighted H _∞ performance. On the basis of the average dwell time approach and the piecewise Lyapunov function technique, sufficient conditions for the solvability of this problem are obtained in terms of linear matrix inequalities. Then, by solving the corresponding linear matrix inequalities, the desired full‐order switched filter is derived for all admissible uncertainties, time‐varying delay, and stochastic disturbances. A numerical example is given to illustrate the effectiveness of the proposed method. Copyright © 2012 John Wiley & Sons, Ltd.     

Exponential l2 − l∞ filtering for discrete‐time switched systems under a new framework

In this paper, a robust exponential l₂ ? l_∞ filtering problem is addressed for discrete‐time switched systems with polytopic uncertainties. The purpose of robust exponential l₂ ? l_∞ filtering is to design a filter such that the resulting filtering error system is robustly exponentially stable with a decay rate and a prescribed exponential l₂ ? l_∞ performance index. The robust exponential l₂ ? l_∞ filtering problem is solved via an average dwell time approach. Sufficient conditions in terms of strict LMI are derived for checking the robust exponential stability of a filter. An explicit expression for the desired robust exponential filter is also given. Finally, a numerical example is provided to demonstrate the potential and effectiveness of the proposed method. Copyright © 2011 John Wiley & Sons, Ltd.     

Switched‐capacitor‐voltage‐multiplier boost DC–AC inverter with adaptive stages

A multistage switched‐capacitor‐voltage‐multiplier inverter (SCVMI) is proposed with a variable‐conversion‐ratio phase generator and a sinusoidal pulse‐width‐modulation controller for boost DC–AC conversion and high‐efficiency regulation. Its power unit contains: SCVM booster and H‐bridge. The SCVM booster includes two m_c‐stage switched‐capacitor cells and two n_c‐stage switched‐capacitor cells in the interleaving operation to realize DC–DC boost gain of m_c × n_c at most. Here, the variable‐conversion‐ratio phase generator is suggested and adopted to change the running stage number and topological path for a suitable gain level of m × n (m = 1, 2, ?,m_c, n = 1, 2, ?,n_c) to improve efficiency, especially for the lower AC output. The H‐bridge is employed for DC–AC conversion, where four switches are controlled by sinusoidal pulse‐width‐modulation not only for full‐wave output but also for output regulation as well as robustness to source/loading variation. Some theoretical analysis and design include: SCVMI model, steady‐state/dynamic analysis, conversion ratio, power efficiency, stability, capacitance selection, output filter, and control design. Finally, the closed‐loop SCVMI is simulated, and the hardware circuit is implemented and tested. All the results are illustrated to show the efficacy of this scheme. Copyright © 2011 John Wiley & Sons, Ltd.     

A gain/efficiency‐enhanced bidirectional switched‐capacitor DC‐DC converter

A closed‐loop gain/efficiency‐enhanced bidirectional switched‐capacitor converter (BSCC) is proposed by combining an adaptive‐conversion‐ratio (ACR) phase generator and pulse‐width‐modulation (PWM) controller for bidirectional step‐up/down DC‐DC conversion and regulation. For realizing gain‐enhanced, the power part consists of one m_c‐stage cell and one n_c‐stage cell in cascade between low‐voltage (LV) and high‐voltage (HV) sides to boost HV voltage into m_c × n_c times voltage of LV source at most, or convert LV voltage into 1/(m_c × n_c) times voltage of HV source at most. For realizing efficiency‐enhanced, the ACR idea with adapting stage number m, n is built in the phase generator to obtain a suitable step‐up/down gain: m × n or 1/(m × n) (m = 1, 2, …, m_c, n = 1, 2, …, n_c). Further, the output regulation and robustness to source/loading variation can be enhanced by PWM on the LV/HV sides. Some theoretical analysis and control design are included as: modeling, steady‐state analysis, conversion ratio, efficiency, capacitance selection, and control design. Finally, the performance of this scheme is verified experimentally on a BSCC prototype, and all results are illustrated to show the efficacy of this scheme. Copyright © 2012 John Wiley & Sons, Ltd.     

Design methodology for common‐mode stability of OTA‐based gyrators

This paper presents a design methodology for common‐mode (CM) stability of operational transconductance amplifier (OTA)‐based gyrators. The topology of g_m ? C active inductors is briefly reviewed. Subsequently, a comprehensive mathematical analysis on the CM stability of OTA‐based gyrators is presented. Sufficient requirements for the gyrator's CM stability, which easily can be considered during the design process of common‐mode feedback (CMFB) amplifiers, are defined. Based on these stability requirements, a design methodology and a design procedure are proposed. Finally, in order to validate the proposed procedure, a resonator with 20 MHz resonance frequency and a quality factor of 20 is fabricated with UMC 180 nm complementary metal‐oxide‐semiconductor technology, and its CM stability is examined. Copyright © 2015 John Wiley & Sons, Ltd.     

Ultra‐low‐noise large‐bandwidth transimpedance amplifier

Equivalent input current noise and bandwidth are the most relevant parameters qualifying a low‐noise transimpedance amplifier. In the conventional topology consisting of an operational amplifier in a shunt‐shunt configuration, the equivalent input noise decreases as the feedback resistor (R_F), which also sets the gain, increases. Unfortunately, as R_F increases above a few MΩ, as it is required for obtaining high sensitivity, the bandwidth of the system is set by the parasitic capacitance of R_F and reduces as R_F increases. In this paper, we propose a new topology that allows overcoming this limitation by employing a large‐bandwidth voltage amplifier together with a proper modified feedback network for compensating the effect of the parasitic capacitance of the feedback resistance. We experimentally demonstrate, on a prototype circuit, that the proposed approach allows to obtain a bandwidth in excess of 100 kHz and an equivalent input noise of about 4 fA/ , corresponding to the current noise of the 1 GΩ resistor that is part of the feedback network. The new approach allows obtaining larger bandwidth with respect to those obtained in previously proposed configurations with comparable background noise. Copyright © 2014 John Wiley & Sons, Ltd.     

Observer design for nonlinear parameter‐varying systems: Application to diesel engines

This paper deals with the problem of designing a nonlinear observer for diesel engines. The goal is to estimate the masses entering the cylinders and the inlet and exhaust pressures. To achieve this, the considered model subject to disturbances contains linear parameter‐varying part and nonlinear part having a large Lipschitz constant. The H _∞ criterion is used to reject the disturbances. Besides, the modified mean value theorem is applied to express the nonlinear error dynamics as a convex combination of known matrices with time‐varying coefficients. The sufficient conditions are derived and given in terms of linear matrix inequality. The advantage of the proposed method is that it can be applied to a wider class of nonlinear systems, particulary our case: diesel engines. The proposed approach is tested and evaluated using an advanced diesel engine professional simulator AMEsim (LMS International, Leuven, Belgium). Copyright © 2014 John Wiley & Sons, Ltd.     

A switch‐utilization‐improved switched‐inductor switched‐capacitor converter with adapting stage number

A novel closed‐loop switched‐inductor switched‐capacitor converter (SISCC) is proposed by using the pulse‐width‐modulation (PWM) compensation for the step‐up DC–DC conversion/regulation, and together by combining the adaptive‐stage‐number (ASN), control for the higher switch utilization and wider supply voltage range. The power part of SISCC is composed of two cascaded sub‐circuits, including (i) a serial‐parallel switched‐capacitor circuit with n_c pumping capacitors and (ii) a switched‐inductor booster with m_c resonant capacitors, so as to obtain the high step‐up gain of (n_c + 1) × m_c /(1 ? D) at most, where D is the duty cycle of PWM adopted to enhance output regulation as well as robustness to source/loading variation. Besides, the ASN control is presented with adapting the stage number n (n = 0, 1, 2, …, n_c) of pumping capacitors to obtain a flexible gain of (n + 1) × m_c /(1 ? D), and further in order to make the SISCC operating at a properly small duty cycle for improving switch utilization and/or supply voltage range. Some theoretical analysis and control design include formulation, steady‐state analysis, ASN‐based conversion ratio, efficiency, output ripple, stability, inductance and capacitance selection, and control design. Finally, the performance of this scheme is verified experimentally on an ASN‐based SISCC prototype, and all results are illustrated to show the efficacy of this scheme. Copyright © 2015 John Wiley & Sons, Ltd.     

Fault detection for discrete‐time switched singular time‐delay systems: an average dwell time approach

In this paper, the fault detection problem is investigated for a class of discrete‐time switched singular systems with time‐varying state delays. The residual generator is firstly constructed based on a switched filter, and the design of fault detection filter is formulated as an H _∞ filtering problem, that is, minimizing the error between residual and fault in the H _∞ sense. Then, by constructing an appropriate decay‐rate‐dependent piecewise Lyapunov function and using the average dwell time scheme, a sufficient condition for the residual system to be regular, causal, and exponential stable while satisfying a prescribed H _∞ performance is derived in terms of linear matrix inequalities (LMIs). The corresponding solvability condition for the desired fault detection filters is also established via LMI approach. Finally, a numerical example is presented to show the effectiveness of the developed theoretical results.Copyright © 2012 John Wiley & Sons, Ltd.     

Average consensus with weighting matrix design for quantized communication on directed switching graphs

We study average consensus for directed graphs with quantized communication under fixed and switching topologies. In the presence of quantization errors, conventional consensus algorithms fail to converge and may suffer from an unbounded asymptotic mean square error. We develop robust consensus algorithms to reduce the effect of quantization. Specifically, we introduce a robust weighting matrix design and use the H _∞ performance index to measure the sensitivity from the quantization error to the consensus deviation. Linear matrix inequalities are used as design tools. The mean square deviation is proven to converge and its upper bound is explicitly given in the case of fixed topology with probabilistic quantization. Numerical results demonstrate the effectiveness of this method. Copyright © 2012 John Wiley & Sons, Ltd.     

Synthesis of n‐port resistive networks containing 2n terminals

This paper is concerned with the realizability problem of n‐port resistive networks that contain 2n terminals. A necessary and sufficient condition for any real symmetric matrix to be realizable as the admittance of an n‐port resistive network containing 2n terminals is obtained. This condition is based on the existence of a parameter matrix. Furthermore, the values of the elements are expressed in terms of the entries of the admittance matrix and the parameter matrix. Finally, a numerical example is used to illustrate the results. Copyright © 2013 John Wiley & Sons, Ltd.     

Harmonic fold back reduction at the N‐path filters

In this paper, a method is proposed to reduce harmonic fold back (HFB) problem of N‐path filters, without increasing the input reference clock (f_CLK ) frequency. The HFB at the N‐path filter is analyzed, and simple expressions are extracted to model this problem. Using the results of the analysis, an M‐of‐N‐path filter has been proposed that behaves like an M × N‐path filter in terms of HFB problem; however, the f_CLK frequency of this structure is the same as an N‐path filter. To demonstrate the feasibility of the proposed idea, a 3‐of‐4‐path filter is designed, and its characteristics are compared with 4‐path and 12‐path filters by simulation. Impacts of different non‐idealities like clock‐phase error, mismatch, and parasitic capacitance are investigated. The transistor‐level implementation of this filter is performed in 0.18 µm Complementary Metal Oxide Semiconductor (CMOS) technology. The simulation results show that the filter has the pass‐band gain of 17 dB, tuning range of 0.2–1.2 GHz, −3 dB bandwidth of 25 MHz, quality factor of 8–48, 18 dB out‐of‐band rejection, 16 dB rejection of the third harmonic of switching frequency (f_s ), and the noise figure of 4.35 dB (using ideal G_m cells) and 6.95 dB (for practical G_m cells). The strongest harmonic folding to the filter pass‐band occurs around 11f_s with the attenuation of 23.8 dB. Each G_m cell draws about 12.4 mA from 1.8 V supply, and the out‐of‐band IIP3 and P _{1 dB,CP} are 17 and 4 dBm, respectively. Copyright © 2016 John Wiley & Sons, Ltd.     

Tangential nevanlinna-pick interpolation problem for bounded real matrices—A network approach

This paper deals with the so-called tangential Nevanlinna—Pick interpolation problem for bounded real matrices. This problem can be formulated as follows: given a set of n pairs {(p_i, K _i)}, where p_i are distinct complex numbers with Re p_i > 0 and K _i stands for 2m × l_i constant matrices, assuming that for every pair (p_i, K _i) with p_i complex there exists a complex conjugate pair (p _i, K _i) and that for every pair (p_i, K _i) in which p_i is real K _i is also real, find an m × m bounded real matrix S(p) such that [ S (p_i) 1_m] K _i = 0 for i= 1,…,n. The solution of this problem is obtained in an inductive way through the construction at each step of a real lossless multiport section that realizes two complex conjugate pairs or one real pair. After each step the number of pairs (p_i, K _i) is reduced by two (if p_i is complex) or by one (if p_i is real). the procedure is continued until all pairs have been considered. After the last step the final section may be terminated with any bounded real load. the scattering matrix S (p) of the resulting cascade multiport network is bounded real and satisfies the desired interpolation conditions. In this way the tangential interpolation problem is reduced to classical network cascade synthesis by the use of real lossless multiport sections.     

Online concurrent reinforcement learning algorithm to solve two‐player zero‐sum games for partially unknown nonlinear continuous‐time systems

Online adaptive optimal control methods based on reinforcement learning algorithms typically need to check for the persistence of excitation condition, which is necessary to be known a priori for convergence of the algorithm. However, this condition is often infeasible to implement or monitor online. This paper proposes an online concurrent reinforcement learning algorithm (CRLA) based on neural networks (NNs) to solve the H _∞ control problem of partially unknown continuous‐time systems, in which the need for persistence of excitation condition is relaxed by using the idea of concurrent learning. First, H _∞ control problem is formulated as a two‐player zero‐sum game, and then, online CRLA is employed to obtain the approximation of the optimal value and the Nash equilibrium of the game. The proposed algorithm is implemented on actor–critic–disturbance NN approximator structure to obtain the solution of the Hamilton–Jacobi–Isaacs equation online forward in time. During the implementation of the algorithm, the control input that acts as one player attempts to make the optimal control while the other player, that is, disturbance, tries to make the worst‐case possible disturbance. Novel update laws are derived for adaptation of the critic and actor NN weights. The stability of the closed‐loop system is guaranteed using Lyapunov technique, and the convergence to the Nash solution of the game is obtained. Simulation results show the effectiveness of the proposed method. Copyright © 2014 John Wiley & Sons, Ltd.