Semistate models of electrical circuits including memristors

In this paper we present several semistate or differential‐algebraic models arising in nodal analysis of nonlinear circuits including memristors. The goal is to characterize the tractability index of these models under strict passivity assumptions, a key issue for the numerical simulation of circuit dynamics. We show that the main model, which combines memristors' fluxes and charges, is index two. From a technical point of view, this result is based on the use of a projector along the image of the leading matrix, in contrast to previous index analyses. For charge‐controlled memristors, the elimination of fluxes yields an index one system in topologically nondegenerate circuits, and an index two model otherwise. Analogous results are also proved to hold for flux‐controlled memristors. Our framework accommodates coupling effects among resistors, memristors, capacitors and inductors. Copyright © 2010 John Wiley & Sons, Ltd.     

High‐order sensitivity invariants

The aim of the research reported in this paper is to extend the notion of invariant sensitivity sum, widely known for electrical networks, from first‐order sensitivities to high‐order sensitivities. The results are high‐order invariant sums of sensitivities of the first and the second kind, formulated for nonlinear lumped circuit, which consists of one‐port and two‐ports only. One‐ports are generalized resistances, capacitances, inductances, voltages, and current sources, whereas two‐ports are nonlinear generalizations of four types of controlled sources. It is observed that the invariant sums actually found for nonlinear lumped networks are generalizations of sums given earlier by authors for linear lumped networks. The article is illustrated by numerical sensitivity analysis of simple linear and nonlinear circuits. Copyright © 2010 John Wiley & Sons, Ltd.     

A class of versatile circuits,made up of standard electrical components,are memristors

In this paper, we propose a whole class of memristor circuits. Each element from the class consists of the cascade connection between a static nonlinear two‐port and a dynamic one‐port. The class may be divided into two subclasses depending on the input variable (voltage or current). Within each of these subclasses, two further sets of memristor circuits may be distinguished according to which output voltage and current of the two‐port represents one of the system states. The simplest memristor circuits make only use of purely passive elementary components from circuit theory, an absolute novelty in this field of research. Thus they are suitable circuit primers for the introduction of the topic of memristors to undergraduate students. A sample circuit is built using discrete devices and its memristive nature is validated experimentally. In case the one‐port is purely passive, the proposed circuits feature volatile memristive behavior. Allowing active devices into the dynamic one‐port, non‐volatile dynamics may also emerge, as proved through concepts from the theory of nonlinear dynamics. Given the generality of the proposed class, the topology of the emulators may be adjusted so as to induce a large variety of dynamical behaviors, which may be exploited to accomplish new signal processing tasks, which conventional circuits are unable to perform. Copyright © 2015 John Wiley & Sons, Ltd.     

Some invariant sums of higher‐order sensitivities

In this paper, a new class of invariant sensitivity sums of higher‐order sensitivities is given. Sensitivity sums considered are relevant to a network function of general lumped time‐invariant circuits containing passive and active elements. It is assumed that the circuit is linear and consists of one‐port elements and two‐port elements only. A part of the one‐port elements is described by admittance parameters and the other part by impedance parameters. The rest of the one‐port elements are independent sources. Two‐port elements are only controlled sources. Hybrid matrix should describe functional relationships of the elements. Formulas for invariant sums of sensitivities of first, second, third, and fourth order are presented. Copyright © 2008 John Wiley & Sons, Ltd.     

A generalized family of memristor‐based voltage controlled relaxation oscillator

Recently, memristive oscillators are a significant topic in the nonlinear circuit theory where there is a possibility to build relaxation oscillators without existence of reactive elements. In this paper, a family of voltage‐controlled memristor‐based relaxation oscillator including two memristors is presented. The operation of two memristors‐based voltage relaxation oscillator circuits is demonstrated theoretically with the mathematical analysis and with numerical simulations. The generalized expressions for the oscillation frequency and conditions are derived for different cases, where a closed form is introduced for each case. The effect of changing the circuit parameters on the oscillation frequency and conditions is investigated numerically. In addition, the derived equations are verified using several transient PSPICE simulations. The power consumption of each oscillator is obtained numerically and compared with its PSPICE counterpart. Furthermore, controlling the memristive oscillator with a voltage grants the design an extra degree of freedom which increases the design flexibility. The nonlinear exponential model of memristor is employed to prove the oscillation concept. As an application, two examples of voltage‐controlled memristor‐based relaxation oscillator are provided to elaborate the effect of the reference voltage on the output voltage. This voltage‐controlled memristor‐based relaxation oscillator has nano size with storage property that makes it more efficient compared with the conventional one. It would be helpful in many communication applications.     

Positive‐real property of passive fractional circuits in W‐domain

Fractional circuits have attracted extensive attention of scholars and researchers for their superior performance and potential applications. Fractional circuits constitute a new challenge for the analysis and synthesis methods of traditional circuits theory. Passivity is the fundamental property of traditional circuits (integer order electric circuits). As is known to all, passivity is equivalent to positive realness in traditional linear circuits. However, this equivalence is broken down by introducing fractional elements into electrical networks in s‐domain. To address this issue, on the basis of s‐W transformation, we study the passive criteria of fractional circuits with rational order elements in this paper. Definitions of positive‐real (matrix) function in W‐domain are given, and the equivalence conditions of positive realness are derived. In addition, a conclusion is proposed in which the immittance (matrix) function of passive fractional circuits with rational order elements is positive real in W‐domain. The applications of passive criteria in circuit synthesis are shown.     

A class of digitally programmable nth‐order filters

A family of new high‐order filters capable of providing all filter functions without changing the circuit topology is proposed for integrated circuit applications. The proposed filters are based on simple active elements, namely, digitally controlled current amplifiers (DCCAs) and unity gain voltage buffers (VBs). Gains of DCCAs are digitally programmed to adjust the coefficients of transfer functions. R2R ladders are also utilized to increase the tuning flexibility of the proposed filters. A filter replicating the famous KHN biquad is extended to realize general nth‐order filters. Comparison with the recent works shows that the proposed approach results in more efficient realizations compared with its counterparts based on other current‐mode active elements. Experimental results obtained from a fourth‐order filter implemented using devices fabricated in a 0.35‐µm CMOS process are provided. Copyright © 2011 John Wiley & Sons, Ltd.     

Sensitivity analysis of lossy nonuniform multiconductor transmission lines based on the Lax‐Wendroff technique

This paper applies the Lax‐Wendroff technique, usually used in fluid dynamics, to transmission line sensitivity analysis. A second‐order‐accurate Lax‐Wendroff difference scheme for sensitivity analysis of both uniform and nonuniform transmission lines is derived. Based on this scheme, a new method for analyzing multiconductor transmission line sensitivity, which does not need to be decoupled, is presented by combining with matrix operations. Using numerical experiments, the proposed method is compared with the characteristic method and the fast Fourier transform approach. With the presented method, the sensitivity of a nonlinear circuit including nonuniform multiconductor transmission lines is analyzed and the results are verified by the HSPICE perturbation method. The proposed method can be applied to either linear or nonlinear circuits, which include lossy nonuniform multiconductor transmission lines and is proved to be efficient. Copyright © 2009 John Wiley & Sons, Ltd.     

Novel current‐source multilevel inverter driven by single gate drive power supply

This paper proposes a novel current‐source multilevel inverter, which is based on a current‐source half‐bridge topology. Multilevel inverters are effective for reducing harmonic distortion in the output voltage and the output current. However, the multilevel inverters require many gate drive power supplies to drive switching devices. The gate drive circuits using a bootstrap circuit and a pulse transformer can reduce the number of the gate drive power supplies, but the pulse width of the output PWM waveform is limited. Furthermore, high‐speed power switching devices are indispensable to create a high‐frequency power converter, but various problems, such as high‐frequency noise, arise due to the high dv/dt rate, especially in high‐side switching devices. The proposed current‐source multilevel inverter is composed of a common emitter topology for all switching devices. Therefore, it is possible to operate it with a single power supply for the gate drive circuit, which allows stabilizing the potential level of all the drive circuits. In this paper, the effectiveness of the proposed circuit is verified through experimental results. © 2008 Wiley Periodicals, Inc. Electr Eng Jpn, 166(2): 88–95, 2009; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.20475     

Generation of Kerwin‐Huelsman‐Newcomb biquad filter circuits using nodal admittance matrix expansion

Nodal admittance matrix (NAM) expansion is used to generate a family of grounded passive component Kerwin Huelsman Newcomb (KHN) circuits. The generated KHN circuits have independent control on the selectivity factor and the radian frequency as in the original KHN, besides they have independent control on the gain, which is not achievable in the original KHN circuit. The NAM expansion is based on using nullor elements and voltage mirror and current mirror as well. Two types of the KHN circuit are considered, each includes four classes. For each class it is found that there are 32 different KHN circuit; therefore, there is a total of 128 circuits that belong to type‐A KHN and a similar number for type‐B KHN circuits. Simulation results are included to support the generation method. Copyright © 2010 John Wiley & Sons, Ltd.     

Piecewise linear second moment statistical simulation of ICs affected by non‐linear statistical effects

This paper presents a methodology for statistical simulation of non‐linear integrated circuits affected by device mismatch. This simulation technique is aimed at helping designers maximize yield, since it can be orders of magnitude faster than other readily available methods, e.g. Monte Carlo. Statistical analysis is performed by modeling the electrical effects of tolerances by means of stochastic current or voltage sources, which depend on both device geometry and position across the die. They alter the behavior of both linear and non‐linear components according to stochastic device models, which reflect the statistical properties of circuit devices up to the second order (i.e. covariance functions). DC, AC, and transient analyses are performed by means of the stochastic modified nodal analysis, using a piecewise linear stochastic technique with respect to the stochastic sources, around a few automatically selected points. Several experimental results on significant circuits, encompassing both the analog and the digital domains, prove the effectiveness of the proposed method. Copyright © 2009 John Wiley & Sons, Ltd.     

A matrix pencil approach to the local stability analysis of non‐linear circuits

This paper addresses local stability issues in non‐linear circuits via matrix pencil theory. The limitations of the state–space approach in circuit modelling have led to semistate formulations, currently framed within the context of differential‐algebraic equations (DAEs). Stability results for these DAE models can be stated in terms of matrix pencils, avoiding the need for state–space reductions which are not advisable in actual circuit simulation problems. The stability results here presented are applied to electrical circuits containing non‐linear devices such as Josephson junctions or MOS transistors. Copyright © 2004 John Wiley & Sons, Ltd.     

Relationship of fast‐scale and slow‐scale instabilities in switching circuit with multiple inputs

Power converter circuits, such as current‐controlled or voltage‐controlled converters and inverters often have multiple inputs in the controller. The multiple inputs cause high‐frequency and low‐frequency oscillations. In earlier studies, the characteristics of circuits in fast‐scale and slow‐scale dynamics have been investigated. However, in many cases, circuits with multiple inputs have three or more dimensional topology which makes detailed analysis difficult. In this paper, we analyze a simple interrupted electric circuit in order to understand essential characteristics of fast‐scale and slow‐scale dynamics. The advantage of this simple interrupted circuit is that it is possible to derive a 1‐dimensional map, which facilitates rigorous studies. Based on the structure of the return map and the characteristic multiplier, we explain the characteristics of the system. We report the occurrence of pitchfork, period doubling, and border collision bifurcations in slow scale, and period doubling bifurcation in fast scale. We found that local bifurcation, which appears in fast‐scale dynamics, does not significantly affect the global behavior of the system while instabilities in the slow‐scale dynamics strongly affect the system behavior. Copyright © 2016 John Wiley & Sons, Ltd.     

High output impedance CMQOs using DVCCs and grounded components

In this paper a new circuit topology for realizing second‐order current‐mode quadrature oscillator is proposed. Three additional circuits are further derived from it, thus resulting in four distinct circuits. Each circuit employs three differential voltage current conveyors and all grounded passive components, ideal for IC implementation. All the circuits possess high output impedance. The circuits exhibit non‐interactive frequency control and low THD. The effects of non‐idealities are also analyzed. PSPICE simulations using 0.5 µCMOS parameters confirm the validity and practical utility of the proposed circuits. Copyright © 2010 John Wiley & Sons, Ltd.     

Model order reduction of coupled circuit‐device systems

We consider model order reduction of integrated circuits with semiconductor devices. Such circuits are modeled using modified nodal analysis by differential‐algebraic equations coupled with the nonlinear drift‐diffusion equations. A spatial discretization of these equations with a mixed finite element method yields a high dimensional nonlinear system of differential‐algebraic equations. Balancing‐related model reduction is used to reduce the dimension of the decoupled linear network equations, whereas the semidiscretized semiconductor model is reduced using proper orthogonal decomposition. Because the computational complexity of the reduced‐order model through the nonlinearity of the drift‐diffusion equations still depends on the number of variables of the full model, we apply the discrete empirical interpolation method to further reduce the computational complexity. We provide numerical comparisons that demonstrate the performance of the presented model reduction approach. Copyright © 2012 John Wiley & Sons, Ltd.     

Low‐Noise Fully Differential Amplifiers Using JFET‐CMOS Integration Technology for Smart Sensors

In this paper, CMOS‐based low‐noise amplifiers with JFET‐CMOS technology for high‐resolution sensor interface circuits are presented. A differential difference amplifier (DDA) configuration is employed to realize differential signal amplification with very high input impedance, which is required for the front‐end circuit in many sensor applications. Low‐noise JFET devices are used as input pair of the input differential stages or source‐grounded output load devices, which are dominant in the total noise floor of DDA circuits. A fully differential amplifier circuit with pure CMOS DDA and three types of JFET‐CMOS DDAs were fabricated and their noise performances were compared. The results show that the total noise floor of the JFET‐CMOS amplifier was much lower compared to that of the pure CMOS configuration. The noise‐reduction effect of JFET replacement depends on the circuit configuration. The noise reduction effect by JFET device was maximum of about − 18 dB at 2.5 Hz. JFET‐CMOS technology is very effective in improving the signal‐to‐noise ratio (SNR) of a sensor interface circuit with CMOS‐based sensing systems. © 2008 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Generation and classification of CCII and ICCII based negative impedance converter circuits using NAM expansion

A new simplified generation method of negative impedance converter circuits (NIC) is introduced. The generation method is based on nodal admittance matrix expansion starting from the input admittance of the NIC circuit terminated by a load rather than treating the NIC as a two‐port network element. The four pathological elements, namely nullator, norator, voltage mirror and current mirror, are used in the generation procedure. Two classes of the NIC pathological circuits are defined; each class includes two types. Eight pathological NIC circuits are generated for each class. Two alternative current conveyor and inverting current conveyor‐based realizations for each pathological circuit based on alternative pairing of the pathological elements are defined resulting in a total of 16 NIC circuit for each class and a total of 32 NIC circuits. A new NIC‐based circuits realizing floating negative impedances are also introduced. Copyright © 2010 John Wiley & Sons, Ltd.     

On the symmetry features of some electrical circuits

The use of symmetry of some nonlinear circuits, composed of similar resistive (more generally, algebraic) elements, is considered for the analysis of the input resistive function of such a circuit. The focus is on recursively obtained (‘fractal’‐type) 1‐ports, analysed using the concept of α‐circuit introduced by Gluskin. The methods under study should be of interest for the analysis and calculation of complicated nonlinear resistive (algebraic) 1‐port structures, e.g. grid cuts for different symmetry conditions. Copyright © 2006 John Wiley & Sons, Ltd.