Analytical estimation of propagation delay and short‐circuit power dissipation in CMOS gates

An efficient analytical method for calculating the propagation delay and the short‐circuit power dissipation of CMOS gates is introduced in this paper. Key factors that determine the operation of a gate, such as the different modes of operation of serially connected transistors, the starting point of conduction, the parasitic behaviour of the short‐circuiting block of a gate and the behaviour of parallel transistor structures are analysed and properly modelled. The analysis is performed taking into account second‐order effects of short‐channel devices and for non‐zero transition time inputs. Analytical expressions for the output waveform, the propagation delay and the short‐circuit power dissipation are obtained by solving the differential equations that govern the operation of the gate. The calculated results are in excellent agreement with SPICE simulations. Copyright © 1999 John Wiley & Sons, Ltd.     

Gate‐level body biasing technique for high‐speed sub‐threshold CMOS logic gates

An efficient technique for designing high‐performance logic circuits operating in sub‐threshold region is proposed. A simple gate‐level body biasing circuit is exploited to change dynamically the threshold voltage of transistors on the basis of the gate status. Such an auxiliary circuit prepares the logic gate for fast switching while maintaining energy efficiency. If 200 aJ is the target total energy per operation consumption, a two input NAND (NOR) gate designed as described here shows a delay reduction between 20% (16%) and 40% (48%), with respect to previously proposed sub‐threshold approaches. Copyright 2012 John Wiley & Sons, Ltd.     

Complete delay modeling of sub‐threshold CMOS logic gates for low‐power application

In this paper, the propagation delay of a complementary metal‐oxide semiconductor (CMOS) inverter circuit in sub‐threshold regime has been analyzed thoroughly with respect to variable loads, rise and fall time of input, device dimensions and temperature, without neglecting the significant drain induced barrier lowering (DIBL) and body bias effects. In particular, sub‐threshold slope factor and current strength have been modeled with respect to temperature, which would be efficacious for the analysis of sub‐threshold circuit as temperature plays an important role in propagation delay. Transistor stacking has also been modeled considering variation in threshold voltage, sub‐threshold slope factor and DIBL coefficient owing mainly to fluctuation in doping levels. The CMOS inverter delay model together with transistor stacking model has been incorporated in the analysis of propagation delays of NAND and NOR gates. Extensive simulations have been performed under 45 and 22 nm CMOS technology using simulation program with integrated circuit emphasis (SPICE) to ensure the correctness of the analysis. Simulation shows that this model is applicable for the analysis of digital sub‐threshold circuit in sub‐90 nm technology. Copyright © 2015 John Wiley & Sons, Ltd.     

Alternate characterization technique for static random‐access memory static noise margin determination

The cell static noise margin (SNM) is widely used as a stability criterion for static random‐access memory cells design. This parameter is typically determined through electrical simulations since direct experimental characterization of SNM is not achievable. In this work, we present a methodology that provides an indirect measurement of the SNM on a per‐cell basis for six‐transistor SRAMs. It is based on combining an Adaptive Neuro‐Fuzzy Inference System (ANFIS) with circuit‐level cell experimentally measurable parameters as input variables to the tool. We show that it is possible to obtain the SNM for individual memory cells using the same experimental setup and data than that required for shmoo plot measurements. Results confirm that the SNM can be experimentally estimated with a relative error compared with electrical simulations that is below 0.5%. Copyright © 2012 John Wiley & Sons, Ltd.     

New SRAM design using body bias technique for low‐power and high‐speed applications

In this paper, a new SRAM cell with body‐bias actively controlled by a control circuit and word line is introduced to realize low‐power and high‐speed applications. The cell uses two word lines, which vary between positive and negative voltage levels to control the body bias of cell's transistors. In this design, using a peripheral control circuit with the least possible number of transistors, the access time is decreased and also a trade‐off between static and dynamic power consumption is provided. Compared to a conventional SRAM cell, the proposed cell reduces the static power consumption by 82% and improves the read performance by 40% and the write performance by 27%. Copyright © 2013 John Wiley & Sons, Ltd.     

Low‐frequency noise analysis and minimization in Gilbert‐cell‐based mixers for direct‐conversion (zero‐IF) low‐power front‐ends

Low‐frequency (flicker) noise is one of the most important issues in the design of direct‐conversion zero‐IF front‐ends. Within the front‐end building blocks, the direct‐conversion mixer is critical in terms of flicker noise, since it performs the signal down‐conversion to baseband. This paper analyzes the main sources of low‐frequency noise in Gilbert‐cell‐based direct‐conversion mixers, and several issues for minimizing the flicker noise while keeping a good mixer performance in terms of gain, noise figure and power consumption are introduced in a quantitative manner. In order to verify these issues, a CMOS Gilbert‐cell‐based zero‐IF mixer has been fabricated and measured. A flicker noise as low as 10.4 dB is achieved (NF at 10 kHz) with a power consumption of only 2 mA from a 2.7 V power supply. More than 14.6 dB conversion gain and noise figure lower than 9 dB (DSB) are obtained from DC to 2.5 GHz with an LO power of ?10 dBm, which makes this mixer suitable for a multi‐standard low‐power zero‐IF front‐end. Copyright © 2008 John Wiley & Sons, Ltd.     

Increasing power efficiency in the design of a low power and low phase noise CMOS LC oscillator

This study developed a local oscillator (LO) with low phase noise and low power consumption. The proposed oscillator core comprises a pair of cross‐coupled transistors, which are fed by another pair of transistors that injects current at moments close to the peak of output voltage. The position of the current injection transistors, which are inserted in series with the cross‐coupled transistors, affects the waveform of current injected into an inductive–capacitive (LC) tank. Installing a capacitor on the source node of the cross‐coupled transistors increases the current injected into the LC tank and thereby augments the output voltage amplitude and power efficiency of the LO. The resonator phase shift and Q can be corrected by adjusting the source capacitance, which filters noise. These changes reduce the phase noise to ?123.4 dBc/Hz at a frequency offset of 1 MHz and improve oscillator performance with a figure of merit equal to ?193.5 dBc/Hz. To evaluate the LC tank, a 5 GHz LO was simulated at 1.8 V power supply and 2.5 mW power consumption. The simulation was conducted using a practical 0.18 complementary metal–oxide–semiconductor model manufactured by the Taiwan Semiconductor Manufacturing Company. The simulation results confirmed the analytical findings.     

Control schemes and transient characteristics of a high‐speed phase shifter for power flow control in power transmission systems

In recent years, attention has been paid to the concept of FACTS (Flexible AC Transmission Systems), along with significant progress in power electronic technology. A high‐speed phase shifter, which is one of the most promising devices in the FACTS concept, has the potential of power flow control and/or voltage stability in power transmission systems. In this paper, theory and experiment reveal that conventional high‐speed phase shifters may cause power swings in a transient state as a result of coupling between instantaneous active and reactive power control loops. Thus, two new control schemes for a high‐speed phase shifter are proposed to achieve both power flow control and power swing damping. The second proposed control scheme is based on the control scheme of an already proposed series active filter. Simulated and experimental results agree well with analytical results, not only in steady states but also in transient states. © 1999 Scripta Technica, Electr Eng Jpn, 128(2): 74–82, 1999     

A study of voltage and reactive power control methods for high‐efficiency operation of distribution networks

Transformers with on‐load tap changer and step voltage regulators are most often used for regulating the distribution network voltage. Their use, however, creates certain problems, namely, the voltage control is in discrete steps and the response time is not satisfactory enough. In addition, the power factor (p.f.) compensation relies on capacitors installed by electricity users which creates additional problems manifesting themselves in unexpected overvoltages during light load and increase of power losses. To solve these problems, the authors have proposed a new voltage and p.f. control system for distribution networks based on sophisticated power electronics technology. This paper describes our study on the operating theory of inverter‐controlled regulators and thyristor‐controlled reactors, which play important roles in this system, and the results of simulation through which the usefulness of these equipment has been ascertained. © 1999 Scripta Technica, Electr Eng Jpn, 130(1): 76–87, 2000     

A numerical model for the oscillation frequency,the amplitude and the phase‐noise of MOS‐current‐mode‐logic ring oscillators

This paper presents a new model for the frequency of oscillation, the oscillation amplitude and the phase‐noise of ring oscillators consisting of MOS‐current‐mode‐logic delay cells. The numerical model has been validated through circuit simulations of oscillators designed with a typical 130 nm CMOS technology. A design flow based on the proposed model and on circuit simulations is presented and applied to cells with active loads. The choice of the cell parameters that minimize phase‐noise and power consumption is addressed. Copyright © 2009 John Wiley & Sons, Ltd.     

Application of unified voltage analysis for high‐ and low‐voltage distribution systems by power flow calculation using indication method between nodes

It has been noted that the voltage of connection points rises according to the reverse power flow when grid‐connected photovoltaic systems are concentrated in distribution systems in residential areas. When this happens, the photovoltaic system may control the power generation output to maintain a suitable voltage for the connection point. Designing a demand area power system aiming at free access to a distributed power supply for energy‐effective practical use requires a precise understanding of this problem. When analyzing photovoltaic systems mainly connected to low‐voltage systems, we looked for a method of analysis in which the high‐voltage systems and the low‐voltage single‐phase three‐wire systems are unified. This report concerns use of the indication method between nodes using power flow calculation, for the purpose of developing a technique of analyzing unified high‐voltage systems and low‐voltage single‐phase three‐wire systems. © 2004 Wiley Periodicals, Inc. Electr Eng Jpn, 147(3): 49–62, 2004; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.10255     

Parallel operation of four‐switch full‐bridge power amplifiers and a unique digital control scheme for advanced magnetic resonance imaging

In recent years, magnetic resonance imaging (MRI) systems have been in demand to diagnose moving parts in the human body such as the heart or the blood in angiography, where images should be taken in milliseconds instead of minutes. Gradient power amplifiers, which are small but vital components for advanced MRI, require higher output power capacity as well as faster rise/fall dynamic response characteristics under a variety of specified current reference signals. This paper presents a novel switch‐mode gradient power amplifier using IGBTs which are connected in parallel to a conventional four‐switch full‐bridge power conversion circuit at their inputs/outputs in order to realize a higher power density. To satisfy the design specifications, which require minimized ripple and improved rise/fall dynamic response characteristics of the current in the gradient coil, a unique digital control scheme based on an optimal type 1 servo system is proposed and described in detail. The effectiveness of the above is discussed and evaluated through computer‐aided analysis. It is expected that the proposed techniques will greatly expand the diagnostic targets and improve the image quality of MRI. © 2000 Scripta Technica, Electr Eng Jpn, 132(1): 64–72, 2000     

A transfer‐function approach to the analysis and design of zero‐power controllers for magnetic suspension systems

A transfer function approach is applied to the analysis and design of zero‐power controllers for magnetic suspension systems. The general structures of controllers achieving zero‐power control are derived for both current‐ and voltage‐controlled magnetic suspension systems. For the former type of system, there are two basic approaches: feeding back the velocity signal and introducing a minor feedback of the integral of the current. Both approaches are applicable to the latter type of system. In addition to them, the self‐sensing suspension also achieves zero‐power characteristics automatically. A direct synthesis method for zero‐power control is developed based on the analysis. Several experiments are carried out with a single‐degree‐of‐freedom model. The experimental results show the effectiveness of the proposed synthesis method. © 2002 Wiley Periodicals, Inc. Electr Eng Jpn, 141(2): 67–75, 2002; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.10049     

Interior structure of quality control center on the low‐voltage side for customized power quality service in FRIENDS

The authors have proposed the Flexible Reliable and Intelligent Electric eNergy Delivery System (FRIENDS) as a future electric power distribution system. In order to realize FRIENDS it is indispensable to design the concrete interior structure of the key facility, the Quality Control Center. This paper proposes an interior structure and control schemes for the Quality Control Center from the viewpoint of customized power quality service, which is one of the most important objectives of FRIENDS. The validity of the proposed structure and control schemes is confirmed through transient analysis using PSCAD/EMTDC. © 2002 Wiley Periodicals, Inc. Electr Eng Jpn, 139(3): 45–52, 2002; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.1159     

Coordinated control of OLTC and multi‐CEMSs for overvoltage prevention in power distribution system

The high degree of penetration of residential rooftop photovoltaic systems causes the overvoltage problem in power distribution systems. This paper aims to introduce demand‐side management for a distribution system for overvoltage prevention. A real‐time overvoltage prevention coordination scheme between an on‐load tap changer (OLTC ) and multi‐community energy management systems (multi‐CEMSs ) is proposed. The main objectives of this control are to relieve the stress in the OLTC tap operation using household schedulable loads and to maximize customer profit in each CEMS . The load scheduling performed by each CEMS is formulated as a combinatorial, nonlinear, time‐series scheduling optimization problem and is solved by a sequential search method named voltage‐ranking‐based load combination search algorithm. The effectiveness of the proposed method is validated in a model distribution system with1800 customers. © 2017 Institute of Electrical Engineers of Japan. Published by John Wiley & Sons, Inc.     

Current waveform control of a high‐power‐factor rectifier circuit for harmonic suppression of voltage and current in a distribution system

This paper presents the input current waveform control of the rectifier circuit which realizes simultaneously the high input power factor and the harmonics suppression of the receiving‐end voltage and the source current under the distorted receiving‐end voltage. The proposed input current waveform includes the harmonic components which are in phase with the receiving‐end voltage harmonics. The control parameter in the proposed waveform is designed by examining the characteristics of both the harmonic suppression effect in the distribution system and the input power factor of the rectifier circuit. The effectiveness of the proposed current waveform has been confirmed experimentally. © 2002 Wiley Periodicals, Inc. Electr Eng Jpn, 140(4): 62–71, 2002; Published online in Wiley InterScience ( www.interscience.wiley.com ). DOI 10.1002/eej.10046     

A method for designing the power and capacitance of fuel cells and electric double‐layer capacitors of hybrid railway vehicles

A hybrid railway traction system with fuel cells (FC) and electric double‐layer capacitors (EDLC) is discussed in this paper. This system can save FC costs and absorb regenerative energy. A method for designing FC and EDLC on the basis of the output power and capacitance, respectively, has not been reported, although their design is one of the most important technical issues encountered in the design of hybrid railway vehicles. Such a design method is presented along with a train load pro?le and an energy management strategy. The design results obtained using the proposed method are veri?ed by performing numerical simulations for a running train. These results reveal that the proposed method for designing the EDLC and FC on the basis of the capacitance and power, respectively, and using a method for controlling the EDLC voltage, is su?ciently e?ective in designing e?cient EDLC and FC of hybrid railway traction systems. © 2013 Wiley Periodicals, Inc. Electr Eng Jpn, 184(3): 47–54, 2013; Published online in Wiley Online Library (wileyonlinelibrary.com). DOI 10.1002/eej.22395     

直流电容储能反馈和负载功率前馈的PWM整流器控制策略

首先介绍了三相电压型PWM(pulse width modulation)整流器在dq轴系下的数学模型,分析了整流器的能量和功率交换关系。提出了一种电流内环、直流侧电容储能作为外环的电容储能反馈控制策略,并给出了环路设计方法。为了减小负载的不确定性对整流器系统的影响,引入了负载功率前馈估计算法。最后,实验比较了传统的电压、电流双闭环和本文所提出的控制策略的动、稳态特性。结果表明,本文所提出的控制策略能满足系统稳态时的控制要求,并且较传统的电压、电流双闭环控制策略具有更好的动态特性。     

Reference tracking control and attenuation of unknown periodic disturbances in the presence of noise for unknown minimum‐phase LTI plants

The rejection of unknown periodic disturbances in the plant output through adaptive feedback has been an active area of research. In most successful efforts, it is assumed that the plant model is a known LTI stable system. In this paper, we relax the assumption of stable known plant and consider the case where the plant model can be unstable with unknown parameters. We do assume, however, that the plant model is minimum phase and use the model reference adaptive control structure to meet the objectives of reference tracking and unknown periodic disturbance rejection without amplifying the effect of broadband noises. The cost of achieving these objectives is the use of overparameterization that adds to the number of computations. The main contribution of this paper is that it shows that the problem of rejecting unknown periodic disturbances can be solved for unstable plants with unknown parameters as long as they are minimum phase. Numerical examples illustrate the effectiveness of the proposed control methodology.